powerpc/mm: Make pte_pgprot return all pte bits
Other archs do the same and instead of adding required pte bits (which
got masked out) in __ioremap_at(), make sure we filter only pfn bits
out.
Fixes: 26973fa5ac
("powerpc/mm: use pte helpers in generic code")
Reviewed-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
parent
4ffe713b75
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b9fb4480a3
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@ -48,11 +48,6 @@ static inline bool pte_user(pte_t pte)
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#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HASHPTE | _PAGE_DIRTY | \
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#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HASHPTE | _PAGE_DIRTY | \
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_PAGE_ACCESSED | _PAGE_SPECIAL)
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_PAGE_ACCESSED | _PAGE_SPECIAL)
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/* Mask of bits returned by pte_pgprot() */
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#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
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_PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
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_PAGE_RW | _PAGE_DIRTY)
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/*
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/*
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* We define 2 sets of base prot bits, one for basic pages (ie,
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* We define 2 sets of base prot bits, one for basic pages (ie,
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* cacheable kernel and user pages) and one for non cacheable
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* cacheable kernel and user pages) and one for non cacheable
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@ -396,7 +391,6 @@ static inline int pte_young(pte_t pte) { return !!(pte_val(pte) & _PAGE_ACCESSE
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static inline int pte_special(pte_t pte) { return !!(pte_val(pte) & _PAGE_SPECIAL); }
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static inline int pte_special(pte_t pte) { return !!(pte_val(pte) & _PAGE_SPECIAL); }
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static inline int pte_none(pte_t pte) { return (pte_val(pte) & ~_PTE_NONE_MASK) == 0; }
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static inline int pte_none(pte_t pte) { return (pte_val(pte) & ~_PTE_NONE_MASK) == 0; }
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static inline bool pte_exec(pte_t pte) { return true; }
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static inline bool pte_exec(pte_t pte) { return true; }
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static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
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static inline int pte_present(pte_t pte)
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static inline int pte_present(pte_t pte)
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{
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{
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@ -128,13 +128,6 @@
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#define H_PTE_PKEY (H_PTE_PKEY_BIT0 | H_PTE_PKEY_BIT1 | H_PTE_PKEY_BIT2 | \
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#define H_PTE_PKEY (H_PTE_PKEY_BIT0 | H_PTE_PKEY_BIT1 | H_PTE_PKEY_BIT2 | \
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H_PTE_PKEY_BIT3 | H_PTE_PKEY_BIT4)
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H_PTE_PKEY_BIT3 | H_PTE_PKEY_BIT4)
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/*
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* Mask of bits returned by pte_pgprot()
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*/
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#define PAGE_PROT_BITS (_PAGE_SAO | _PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT | \
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H_PAGE_4K_PFN | _PAGE_PRIVILEGED | _PAGE_ACCESSED | \
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_PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_EXEC | \
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_PAGE_SOFT_DIRTY | H_PTE_PKEY)
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/*
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/*
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* We define 2 sets of base prot bits, one for basic pages (ie,
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* We define 2 sets of base prot bits, one for basic pages (ie,
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* cacheable kernel and user pages) and one for non cacheable
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* cacheable kernel and user pages) and one for non cacheable
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@ -496,7 +489,6 @@ static inline bool pte_exec(pte_t pte)
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return !!(pte_raw(pte) & cpu_to_be64(_PAGE_EXEC));
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return !!(pte_raw(pte) & cpu_to_be64(_PAGE_EXEC));
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}
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}
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static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
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#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
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#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
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static inline bool pte_soft_dirty(pte_t pte)
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static inline bool pte_soft_dirty(pte_t pte)
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@ -73,11 +73,6 @@
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/* Until my rework is finished, 40x still needs atomic PTE updates */
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/* Until my rework is finished, 40x still needs atomic PTE updates */
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#define PTE_ATOMIC_UPDATES 1
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#define PTE_ATOMIC_UPDATES 1
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/* Mask of bits returned by pte_pgprot() */
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#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_NO_CACHE | \
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_PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
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_PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | _PAGE_EXEC)
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#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
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#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
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#define _PAGE_BASE (_PAGE_BASE_NC)
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#define _PAGE_BASE (_PAGE_BASE_NC)
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@ -93,11 +93,6 @@
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#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW)
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#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW)
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#define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW | _PAGE_EXEC)
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#define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW | _PAGE_EXEC)
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/* Mask of bits returned by pte_pgprot() */
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#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
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_PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
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_PAGE_RW | _PAGE_DIRTY | _PAGE_EXEC)
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/* TODO: Add large page lowmem mapping support */
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/* TODO: Add large page lowmem mapping support */
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#define _PMD_PRESENT 0
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#define _PMD_PRESENT 0
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#define _PMD_PRESENT_MASK (PAGE_MASK)
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#define _PMD_PRESENT_MASK (PAGE_MASK)
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@ -55,11 +55,6 @@
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#define _PAGE_KERNEL_RW (_PAGE_SH | _PAGE_DIRTY)
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#define _PAGE_KERNEL_RW (_PAGE_SH | _PAGE_DIRTY)
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#define _PAGE_KERNEL_RWX (_PAGE_SH | _PAGE_DIRTY | _PAGE_EXEC)
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#define _PAGE_KERNEL_RWX (_PAGE_SH | _PAGE_DIRTY | _PAGE_EXEC)
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/* Mask of bits returned by pte_pgprot() */
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#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_NO_CACHE | \
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_PAGE_ACCESSED | _PAGE_RO | _PAGE_NA | \
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_PAGE_SH | _PAGE_DIRTY | _PAGE_EXEC)
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#define _PMD_PRESENT 0x0001
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#define _PMD_PRESENT 0x0001
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#define _PMD_PRESENT_MASK _PMD_PRESENT
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#define _PMD_PRESENT_MASK _PMD_PRESENT
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#define _PMD_BAD 0x0fd0
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#define _PMD_BAD 0x0fd0
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@ -39,11 +39,6 @@
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/* No page size encoding in the linux PTE */
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/* No page size encoding in the linux PTE */
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#define _PAGE_PSIZE 0
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#define _PAGE_PSIZE 0
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/* Mask of bits returned by pte_pgprot() */
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#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
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_PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
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_PAGE_RW | _PAGE_DIRTY | _PAGE_EXEC)
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#define _PMD_PRESENT 0
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#define _PMD_PRESENT 0
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#define _PMD_PRESENT_MASK (PAGE_MASK)
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#define _PMD_PRESENT_MASK (PAGE_MASK)
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#define _PMD_BAD (~PAGE_MASK)
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#define _PMD_BAD (~PAGE_MASK)
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@ -52,7 +52,6 @@ static inline int pte_none(pte_t pte) { return (pte_val(pte) & ~_PTE_NONE_MASK)
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static inline bool pte_hashpte(pte_t pte) { return false; }
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static inline bool pte_hashpte(pte_t pte) { return false; }
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static inline bool pte_ci(pte_t pte) { return pte_val(pte) & _PAGE_NO_CACHE; }
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static inline bool pte_ci(pte_t pte) { return pte_val(pte) & _PAGE_NO_CACHE; }
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static inline bool pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_EXEC; }
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static inline bool pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_EXEC; }
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static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
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#ifdef CONFIG_NUMA_BALANCING
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#ifdef CONFIG_NUMA_BALANCING
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/*
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/*
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@ -82,11 +82,6 @@
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#define _PTE_NONE_MASK 0
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#define _PTE_NONE_MASK 0
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#endif
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#endif
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/* Mask of bits returned by pte_pgprot() */
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#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
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_PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
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_PAGE_PRIVILEGED | _PAGE_RW | _PAGE_DIRTY | _PAGE_EXEC)
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/*
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/*
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* We define 2 sets of base prot bits, one for basic pages (ie,
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* We define 2 sets of base prot bits, one for basic pages (ie,
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* cacheable kernel and user pages) and one for non cacheable
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* cacheable kernel and user pages) and one for non cacheable
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@ -46,6 +46,16 @@ struct mm_struct;
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/* Keep these as a macros to avoid include dependency mess */
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/* Keep these as a macros to avoid include dependency mess */
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#define pte_page(x) pfn_to_page(pte_pfn(x))
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#define pte_page(x) pfn_to_page(pte_pfn(x))
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#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
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#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
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/*
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* Select all bits except the pfn
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*/
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static inline pgprot_t pte_pgprot(pte_t pte)
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{
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unsigned long pte_flags;
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pte_flags = pte_val(pte) & ~PTE_RPN_MASK;
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return __pgprot(pte_flags);
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}
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/*
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/*
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* ZERO_PAGE is a global shared page that is always zero: used
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* ZERO_PAGE is a global shared page that is always zero: used
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