OpenE2K
/
linux
6
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Merge git://git.infradead.org/mtd-2.6 

* git://git.infradead.org/mtd-2.6: (21 commits)
  [MTD] [CHIPS] Remove MTD_OBSOLETE_CHIPS (jedec, amd_flash, sharp)
  [MTD] Delete allegedly obsolete "bank_size" field of mtd_info.
  [MTD] Remove unnecessary user space check from mtd.h.
  [MTD] [MAPS] Remove flash maps for no longer supported 405LP boards
  [MTD] [MAPS] Fix missing printk() parameter in physmap_of.c MTD driver
  [MTD] [NAND] platform NAND driver: add driver
  [MTD] [NAND] platform NAND driver: update header
  [JFFS2] Simplify and clean up jffs2_add_tn_to_tree() some more.
  [JFFS2] Remove another bogus optimisation in jffs2_add_tn_to_tree()
  [JFFS2] Remove broken insert_point optimisation in jffs2_add_tn_to_tree()
  [JFFS2] Remember to calculate overlap on nodes which replace older nodes
  [JFFS2] Don't advance c->wbuf_ofs to next eraseblock after wbuf flush
  [MTD] [NAND] at91_nand.c: CMDLINE_PARTS support
  [MTD] [NAND] Tidy up handling of page number in nand_block_bad()
  [MTD] block2mtd_paramline[] mustn't be __initdata
  [MTD] [NAND] Support multiple chips in CAFÉ driver
  [MTD] [NAND] Rename cafe.c to cafe_nand.c and remove the multi-obj magic
  [MTD] [NAND] Use rslib for CAFÉ ECC
  [RSLIB] Support non-canonical GF representations
  [JFFS2] Remove dead file histo_mips.h
  ...
This commit is contained in:
Linus Torvalds 2007-05-09 13:10:11 -07:00
parent d84c4124c4 b7aa48be1e
commit ba7cc09c9c
27 changed files with 430 additions and 4752 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
MAINTAINERS
View File

@ -2648,6 +2648,12 @@ M: corbet@lwn.net
L: video4linux-list@redhat.com
S: Maintained
ONENAND FLASH DRIVER
P: Kyungmin Park
M: kyungmin.park@samsung.com
L: linux-mtd@lists.infradead.org
S: Maintained
ONSTREAM SCSI TAPE DRIVER
P: Willem Riede
M: osst@riede.org

40
drivers/mtd/chips/Kconfig
View File

@ -1,5 +1,4 @@
# drivers/mtd/chips/Kconfig
# $Id: Kconfig,v 1.18 2005/11/07 11:14:22 gleixner Exp $
menu "RAM/ROM/Flash chip drivers"
depends on MTD!=n
@ -231,45 +230,6 @@ config MTD_ABSENT
the system regardless of media presence. Device nodes created
with this driver will return -ENODEV upon access.
config MTD_OBSOLETE_CHIPS
bool "Older (theoretically obsoleted now) drivers for non-CFI chips"
help
This option does not enable any code directly, but will allow you to
select some other chip drivers which are now considered obsolete,
because the generic CONFIG_JEDECPROBE code above should now detect
the chips which are supported by these drivers, and allow the generic
CFI-compatible drivers to drive the chips. Say 'N' here unless you have
already tried the CONFIG_JEDECPROBE method and reported its failure
to the MTD mailing list at <linux-mtd@lists.infradead.org>
config MTD_AMDSTD
tristate "AMD compatible flash chip support (non-CFI)"
depends on MTD_OBSOLETE_CHIPS && BROKEN
help
This option enables support for flash chips using AMD-compatible
commands, including some which are not CFI-compatible and hence
cannot be used with the CONFIG_MTD_CFI_AMDSTD option.
It also works on AMD compatible chips that do conform to CFI.
config MTD_SHARP
tristate "pre-CFI Sharp chip support"
depends on MTD_OBSOLETE_CHIPS
help
This option enables support for flash chips using Sharp-compatible
commands, including some which are not CFI-compatible and hence
cannot be used with the CONFIG_MTD_CFI_INTELxxx options.
config MTD_JEDEC
tristate "JEDEC device support"
depends on MTD_OBSOLETE_CHIPS && BROKEN
help
Enable older JEDEC flash interface devices for self
programming flash. It is commonly used in older AMD chips. It is
only called JEDEC because the JEDEC association
<http://www.jedec.org/> distributes the identification codes for the
chips.
config MTD_XIP
bool "XIP aware MTD support"
depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && EXPERIMENTAL && ARCH_MTD_XIP

4
drivers/mtd/chips/Makefile
View File

@ -1,19 +1,15 @@
#
# linux/drivers/chips/Makefile
#
# $Id: Makefile.common,v 1.5 2005/11/07 11:14:22 gleixner Exp $
obj-$(CONFIG_MTD) += chipreg.o
obj-$(CONFIG_MTD_AMDSTD) += amd_flash.o
obj-$(CONFIG_MTD_CFI) += cfi_probe.o
obj-$(CONFIG_MTD_CFI_UTIL) += cfi_util.o
obj-$(CONFIG_MTD_CFI_STAA) += cfi_cmdset_0020.o
obj-$(CONFIG_MTD_CFI_AMDSTD) += cfi_cmdset_0002.o
obj-$(CONFIG_MTD_CFI_INTELEXT) += cfi_cmdset_0001.o
obj-$(CONFIG_MTD_GEN_PROBE) += gen_probe.o
obj-$(CONFIG_MTD_JEDEC) += jedec.o
obj-$(CONFIG_MTD_JEDECPROBE) += jedec_probe.o
obj-$(CONFIG_MTD_RAM) += map_ram.o
obj-$(CONFIG_MTD_ROM) += map_rom.o
obj-$(CONFIG_MTD_SHARP) += sharp.o
obj-$(CONFIG_MTD_ABSENT) += map_absent.o

1396
drivers/mtd/chips/amd_flash.c
View File

File diff suppressed because it is too large Load Diff

935
drivers/mtd/chips/jedec.c
View File

@ -1,935 +0,0 @@
/* JEDEC Flash Interface.
* This is an older type of interface for self programming flash. It is
* commonly use in older AMD chips and is obsolete compared with CFI.
* It is called JEDEC because the JEDEC association distributes the ID codes
* for the chips.
*
* See the AMD flash databook for information on how to operate the interface.
*
* This code does not support anything wider than 8 bit flash chips, I am
* not going to guess how to send commands to them, plus I expect they will
* all speak CFI..
*
* $Id: jedec.c,v 1.22 2005/01/05 18:05:11 dwmw2 Exp $
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/mtd/jedec.h>
#include <linux/mtd/map.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/compatmac.h>
static struct mtd_info *jedec_probe(struct map_info *);
static int jedec_probe8(struct map_info *map,unsigned long base,
struct jedec_private *priv);
static int jedec_probe16(struct map_info *map,unsigned long base,
struct jedec_private *priv);
static int jedec_probe32(struct map_info *map,unsigned long base,
struct jedec_private *priv);
static void jedec_flash_chip_scan(struct jedec_private *priv,unsigned long start,
unsigned long len);
static int flash_erase(struct mtd_info *mtd, struct erase_info *instr);
static int flash_write(struct mtd_info *mtd, loff_t start, size_t len,
size_t *retlen, const u_char *buf);
static unsigned long my_bank_size;
/* Listing of parts and sizes. We need this table to learn the sector
size of the chip and the total length */
static const struct JEDECTable JEDEC_table[] = {
{
.jedec = 0x013D,
.name = "AMD Am29F017D",
.size = 2*1024*1024,
.sectorsize = 64*1024,
.capabilities = MTD_CAP_NORFLASH
},
{
.jedec = 0x01AD,
.name = "AMD Am29F016",
.size = 2*1024*1024,
.sectorsize = 64*1024,
.capabilities = MTD_CAP_NORFLASH
},
{
.jedec = 0x01D5,
.name = "AMD Am29F080",
.size = 1*1024*1024,
.sectorsize = 64*1024,
.capabilities = MTD_CAP_NORFLASH
},
{
.jedec = 0x01A4,
.name = "AMD Am29F040",
.size = 512*1024,
.sectorsize = 64*1024,
.capabilities = MTD_CAP_NORFLASH
},
{
.jedec = 0x20E3,
.name = "AMD Am29W040B",
.size = 512*1024,
.sectorsize = 64*1024,
.capabilities = MTD_CAP_NORFLASH
},
{
.jedec = 0xC2AD,
.name = "Macronix MX29F016",
.size = 2*1024*1024,
.sectorsize = 64*1024,
.capabilities = MTD_CAP_NORFLASH
},
{ .jedec = 0x0 }
};
static const struct JEDECTable *jedec_idtoinf(__u8 mfr,__u8 id);
static void jedec_sync(struct mtd_info *mtd) {};
static int jedec_read(struct mtd_info *mtd, loff_t from, size_t len,
size_t *retlen, u_char *buf);
static int jedec_read_banked(struct mtd_info *mtd, loff_t from, size_t len,
size_t *retlen, u_char *buf);
static struct mtd_info *jedec_probe(struct map_info *map);
static struct mtd_chip_driver jedec_chipdrv = {
.probe = jedec_probe,
.name = "jedec",
.module = THIS_MODULE
};
/* Probe entry point */
static struct mtd_info *jedec_probe(struct map_info *map)
{
struct mtd_info *MTD;
struct jedec_private *priv;
unsigned long Base;
unsigned long SectorSize;
unsigned count;
unsigned I,Uniq;
char Part[200];
memset(&priv,0,sizeof(priv));
MTD = kzalloc(sizeof(struct mtd_info) + sizeof(struct jedec_private), GFP_KERNEL);
if (!MTD)
return NULL;
priv = (struct jedec_private *)&MTD[1];
my_bank_size = map->size;
if (map->size/my_bank_size > MAX_JEDEC_CHIPS)
{
printk("mtd: Increase MAX_JEDEC_CHIPS, too many banks.\n");
kfree(MTD);
return NULL;
}
for (Base = 0; Base < map->size; Base += my_bank_size)
{
// Perhaps zero could designate all tests?
if (map->buswidth == 0)
map->buswidth = 1;
if (map->buswidth == 1){
if (jedec_probe8(map,Base,priv) == 0) {
printk("did recognize jedec chip\n");
kfree(MTD);
return NULL;
}
}
if (map->buswidth == 2)
jedec_probe16(map,Base,priv);
if (map->buswidth == 4)
jedec_probe32(map,Base,priv);
}
// Get the biggest sector size
SectorSize = 0;
for (I = 0; priv->chips[I].jedec != 0 && I < MAX_JEDEC_CHIPS; I++)
{
// printk("priv->chips[%d].jedec is %x\n",I,priv->chips[I].jedec);
// printk("priv->chips[%d].sectorsize is %lx\n",I,priv->chips[I].sectorsize);
if (priv->chips[I].sectorsize > SectorSize)
SectorSize = priv->chips[I].sectorsize;
}
// Quickly ensure that the other sector sizes are factors of the largest
for (I = 0; priv->chips[I].jedec != 0 && I < MAX_JEDEC_CHIPS; I++)
{
if ((SectorSize/priv->chips[I].sectorsize)*priv->chips[I].sectorsize != SectorSize)
{
printk("mtd: Failed. Device has incompatible mixed sector sizes\n");
kfree(MTD);
return NULL;
}
}
/* Generate a part name that includes the number of different chips and
other configuration information */
count = 1;
strlcpy(Part,map->name,sizeof(Part)-10);
strcat(Part," ");
Uniq = 0;
for (I = 0; priv->chips[I].jedec != 0 && I < MAX_JEDEC_CHIPS; I++)
{
const struct JEDECTable *JEDEC;
if (priv->chips[I+1].jedec == priv->chips[I].jedec)
{
count++;
continue;
}
// Locate the chip in the jedec table
JEDEC = jedec_idtoinf(priv->chips[I].jedec >> 8,priv->chips[I].jedec);
if (JEDEC == 0)
{
printk("mtd: Internal Error, JEDEC not set\n");
kfree(MTD);
return NULL;
}
if (Uniq != 0)
strcat(Part,",");
Uniq++;
if (count != 1)
sprintf(Part+strlen(Part),"%x*[%s]",count,JEDEC->name);
else
sprintf(Part+strlen(Part),"%s",JEDEC->name);
if (strlen(Part) > sizeof(Part)*2/3)
break;
count = 1;
}
/* Determine if the chips are organized in a linear fashion, or if there
are empty banks. Note, the last bank does not count here, only the
first banks are important. Holes on non-bank boundaries can not exist
due to the way the detection algorithm works. */
if (priv->size < my_bank_size)
my_bank_size = priv->size;
priv->is_banked = 0;
//printk("priv->size is %x, my_bank_size is %x\n",priv->size,my_bank_size);
//printk("priv->bank_fill[0] is %x\n",priv->bank_fill[0]);
if (!priv->size) {
printk("priv->size is zero\n");
kfree(MTD);
return NULL;
}
if (priv->size/my_bank_size) {
if (priv->size/my_bank_size == 1) {
priv->size = my_bank_size;
}
else {
for (I = 0; I != priv->size/my_bank_size - 1; I++)
{
if (priv->bank_fill[I] != my_bank_size)
priv->is_banked = 1;
/* This even could be eliminated, but new de-optimized read/write
functions have to be written */
printk("priv->bank_fill[%d] is %lx, priv->bank_fill[0] is %lx\n",I,priv->bank_fill[I],priv->bank_fill[0]);
if (priv->bank_fill[I] != priv->bank_fill[0])
{
printk("mtd: Failed. Cannot handle unsymmetric banking\n");
kfree(MTD);
return NULL;
}
}
}
}
if (priv->is_banked == 1)
strcat(Part,", banked");
// printk("Part: '%s'\n",Part);
memset(MTD,0,sizeof(*MTD));
// strlcpy(MTD->name,Part,sizeof(MTD->name));
MTD->name = map->name;
MTD->type = MTD_NORFLASH;
MTD->flags = MTD_CAP_NORFLASH;
MTD->writesize = 1;
MTD->erasesize = SectorSize*(map->buswidth);
// printk("MTD->erasesize is %x\n",(unsigned int)MTD->erasesize);
MTD->size = priv->size;
// printk("MTD->size is %x\n",(unsigned int)MTD->size);
//MTD->module = THIS_MODULE; // ? Maybe this should be the low level module?
MTD->erase = flash_erase;
if (priv->is_banked == 1)
MTD->read = jedec_read_banked;
else
MTD->read = jedec_read;
MTD->write = flash_write;
MTD->sync = jedec_sync;
MTD->priv = map;
map->fldrv_priv = priv;
map->fldrv = &jedec_chipdrv;
__module_get(THIS_MODULE);
return MTD;
}
/* Helper for the JEDEC function, JEDEC numbers all have odd parity */
static int checkparity(u_char C)
{
u_char parity = 0;
while (C != 0)
{
parity ^= C & 1;
C >>= 1;
}
return parity == 1;
}
/* Take an array of JEDEC numbers that represent interleved flash chips
and process them. Check to make sure they are good JEDEC numbers, look
them up and then add them to the chip list */
static int handle_jedecs(struct map_info *map,__u8 *Mfg,__u8 *Id,unsigned Count,
unsigned long base,struct jedec_private *priv)
{
unsigned I,J;
unsigned long Size;
unsigned long SectorSize;
const struct JEDECTable *JEDEC;
// Test #2 JEDEC numbers exhibit odd parity
for (I = 0; I != Count; I++)
{
if (checkparity(Mfg[I]) == 0 || checkparity(Id[I]) == 0)
return 0;
}
// Finally, just make sure all the chip sizes are the same
JEDEC = jedec_idtoinf(Mfg[0],Id[0]);
if (JEDEC == 0)
{
printk("mtd: Found JEDEC flash chip, but do not have a table entry for %x:%x\n",Mfg[0],Mfg[1]);
return 0;
}
Size = JEDEC->size;
SectorSize = JEDEC->sectorsize;
for (I = 0; I != Count; I++)
{
JEDEC = jedec_idtoinf(Mfg[0],Id[0]);
if (JEDEC == 0)
{
printk("mtd: Found JEDEC flash chip, but do not have a table entry for %x:%x\n",Mfg[0],Mfg[1]);
return 0;
}
if (Size != JEDEC->size || SectorSize != JEDEC->sectorsize)
{
printk("mtd: Failed. Interleved flash does not have matching characteristics\n");
return 0;
}
}
// Load the Chips
for (I = 0; I != MAX_JEDEC_CHIPS; I++)
{
if (priv->chips[I].jedec == 0)
break;
}
if (I + Count > MAX_JEDEC_CHIPS)
{
printk("mtd: Device has too many chips. Increase MAX_JEDEC_CHIPS\n");
return 0;
}
// Add them to the table
for (J = 0; J != Count; J++)
{
unsigned long Bank;
JEDEC = jedec_idtoinf(Mfg[J],Id[J]);
priv->chips[I].jedec = (Mfg[J] << 8) | Id[J];
priv->chips[I].size = JEDEC->size;
priv->chips[I].sectorsize = JEDEC->sectorsize;
priv->chips[I].base = base + J;
priv->chips[I].datashift = J*8;
priv->chips[I].capabilities = JEDEC->capabilities;
priv->chips[I].offset = priv->size + J;
// log2 n :|
priv->chips[I].addrshift = 0;
for (Bank = Count; Bank != 1; Bank >>= 1, priv->chips[I].addrshift++);
// Determine how filled this bank is.
Bank = base & (~(my_bank_size-1));
if (priv->bank_fill[Bank/my_bank_size] < base +
(JEDEC->size << priv->chips[I].addrshift) - Bank)
priv->bank_fill[Bank/my_bank_size] = base + (JEDEC->size << priv->chips[I].addrshift) - Bank;
I++;
}
priv->size += priv->chips[I-1].size*Count;
return priv->chips[I-1].size;
}
/* Lookup the chip information from the JEDEC ID table. */
static const struct JEDECTable *jedec_idtoinf(__u8 mfr,__u8 id)
{
__u16 Id = (mfr << 8) | id;
unsigned long I = 0;
for (I = 0; JEDEC_table[I].jedec != 0; I++)
if (JEDEC_table[I].jedec == Id)
return JEDEC_table + I;
return NULL;
}
// Look for flash using an 8 bit bus interface
static int jedec_probe8(struct map_info *map,unsigned long base,
struct jedec_private *priv)
{
#define flread(x) map_read8(map,base+x)
#define flwrite(v,x) map_write8(map,v,base+x)
const unsigned long AutoSel1 = 0xAA;
const unsigned long AutoSel2 = 0x55;
const unsigned long AutoSel3 = 0x90;
const unsigned long Reset = 0xF0;
__u32 OldVal;
__u8 Mfg[1];
__u8 Id[1];
unsigned I;
unsigned long Size;
// Wait for any write/erase operation to settle
OldVal = flread(base);
for (I = 0; OldVal != flread(base) && I < 10000; I++)
OldVal = flread(base);
// Reset the chip
flwrite(Reset,0x555);
// Send the sequence
flwrite(AutoSel1,0x555);
flwrite(AutoSel2,0x2AA);
flwrite(AutoSel3,0x555);
// Get the JEDEC numbers
Mfg[0] = flread(0);
Id[0] = flread(1);
// printk("Mfg is %x, Id is %x\n",Mfg[0],Id[0]);
Size = handle_jedecs(map,Mfg,Id,1,base,priv);
// printk("handle_jedecs Size is %x\n",(unsigned int)Size);
if (Size == 0)
{
flwrite(Reset,0x555);
return 0;
}
// Reset.
flwrite(Reset,0x555);
return 1;
#undef flread
#undef flwrite
}
// Look for flash using a 16 bit bus interface (ie 2 8-bit chips)
static int jedec_probe16(struct map_info *map,unsigned long base,
struct jedec_private *priv)
{
return 0;
}
// Look for flash using a 32 bit bus interface (ie 4 8-bit chips)
static int jedec_probe32(struct map_info *map,unsigned long base,
struct jedec_private *priv)
{
#define flread(x) map_read32(map,base+((x)<<2))
#define flwrite(v,x) map_write32(map,v,base+((x)<<2))
const unsigned long AutoSel1 = 0xAAAAAAAA;
const unsigned long AutoSel2 = 0x55555555;
const unsigned long AutoSel3 = 0x90909090;
const unsigned long Reset = 0xF0F0F0F0;
__u32 OldVal;
__u8 Mfg[4];
__u8 Id[4];
unsigned I;
unsigned long Size;
// Wait for any write/erase operation to settle
OldVal = flread(base);
for (I = 0; OldVal != flread(base) && I < 10000; I++)
OldVal = flread(base);
// Reset the chip
flwrite(Reset,0x555);
// Send the sequence
flwrite(AutoSel1,0x555);
flwrite(AutoSel2,0x2AA);
flwrite(AutoSel3,0x555);
// Test #1, JEDEC numbers are readable from 0x??00/0x??01
if (flread(0) != flread(0x100) ||
flread(1) != flread(0x101))
{
flwrite(Reset,0x555);
return 0;
}
// Split up the JEDEC numbers
OldVal = flread(0);
for (I = 0; I != 4; I++)
Mfg[I] = (OldVal >> (I*8));
OldVal = flread(1);
for (I = 0; I != 4; I++)
Id[I] = (OldVal >> (I*8));
Size = handle_jedecs(map,Mfg,Id,4,base,priv);
if (Size == 0)
{
flwrite(Reset,0x555);
return 0;
}
/* Check if there is address wrap around within a single bank, if this
returns JEDEC numbers then we assume that it is wrap around. Notice
we call this routine with the JEDEC return still enabled, if two or
more flashes have a truncated address space the probe test will still
work */
if (base + (Size<<2)+0x555 < map->size &&
base + (Size<<2)+0x555 < (base & (~(my_bank_size-1))) + my_bank_size)
{
if (flread(base+Size) != flread(base+Size + 0x100) ||
flread(base+Size + 1) != flread(base+Size + 0x101))
{
jedec_probe32(map,base+Size,priv);
}
}
// Reset.
flwrite(0xF0F0F0F0,0x555);
return 1;
#undef flread
#undef flwrite
}
/* Linear read. */
static int jedec_read(struct mtd_info *mtd, loff_t from, size_t len,
size_t *retlen, u_char *buf)
{
struct map_info *map = mtd->priv;
map_copy_from(map, buf, from, len);
*retlen = len;
return 0;
}
/* Banked read. Take special care to jump past the holes in the bank
mapping. This version assumes symetry in the holes.. */
static int jedec_read_banked(struct mtd_info *mtd, loff_t from, size_t len,
size_t *retlen, u_char *buf)
{
struct map_info *map = mtd->priv;
struct jedec_private *priv = map->fldrv_priv;
*retlen = 0;
while (len > 0)
{
// Determine what bank and offset into that bank the first byte is
unsigned long bank = from & (~(priv->bank_fill[0]-1));
unsigned long offset = from & (priv->bank_fill[0]-1);
unsigned long get = len;
if (priv->bank_fill[0] - offset < len)
get = priv->bank_fill[0] - offset;
bank /= priv->bank_fill[0];
map_copy_from(map,buf + *retlen,bank*my_bank_size + offset,get);
len -= get;
*retlen += get;
from += get;
}
return 0;
}
/* Pass the flags value that the flash return before it re-entered read
mode. */
static void jedec_flash_failed(unsigned char code)
{
/* Bit 5 being high indicates that there was an internal device
failure, erasure time limits exceeded or something */
if ((code & (1 << 5)) != 0)
{
printk("mtd: Internal Flash failure\n");
return;
}
printk("mtd: Programming didn't take\n");
}
/* This uses the erasure function described in the AMD Flash Handbook,
it will work for flashes with a fixed sector size only. Flashes with
a selection of sector sizes (ie the AMD Am29F800B) will need a different
routine. This routine tries to parallize erasing multiple chips/sectors
where possible */
static int flash_erase(struct mtd_info *mtd, struct erase_info *instr)
{
// Does IO to the currently selected chip
#define flread(x) map_read8(map,chip->base+((x)<<chip->addrshift))
#define flwrite(v,x) map_write8(map,v,chip->base+((x)<<chip->addrshift))
unsigned long Time = 0;
unsigned long NoTime = 0;
unsigned long start = instr->addr, len = instr->len;
unsigned int I;
struct map_info *map = mtd->priv;
struct jedec_private *priv = map->fldrv_priv;
// Verify the arguments..
if (start + len > mtd->size ||
(start % mtd->erasesize) != 0 ||
(len % mtd->erasesize) != 0 ||
(len/mtd->erasesize) == 0)
return -EINVAL;
jedec_flash_chip_scan(priv,start,len);
// Start the erase sequence on each chip
for (I = 0; priv->chips[I].jedec != 0 && I < MAX_JEDEC_CHIPS; I++)
{
unsigned long off;
struct jedec_flash_chip *chip = priv->chips + I;
if (chip->length == 0)
continue;
if (chip->start + chip->length > chip->size)
{
printk("DIE\n");
return -EIO;
}
flwrite(0xF0,chip->start + 0x555);
flwrite(0xAA,chip->start + 0x555);
flwrite(0x55,chip->start + 0x2AA);
flwrite(0x80,chip->start + 0x555);
flwrite(0xAA,chip->start + 0x555);
flwrite(0x55,chip->start + 0x2AA);
/* Once we start selecting the erase sectors the delay between each
command must not exceed 50us or it will immediately start erasing
and ignore the other sectors */
for (off = 0; off < len; off += chip->sectorsize)
{
// Check to make sure we didn't timeout
flwrite(0x30,chip->start + off);
if (off == 0)
continue;
if ((flread(chip->start + off) & (1 << 3)) != 0)
{
printk("mtd: Ack! We timed out the erase timer!\n");
return -EIO;
}
}
}
/* We could split this into a timer routine and return early, performing
background erasure.. Maybe later if the need warrents */
/* Poll the flash for erasure completion, specs say this can take as long
as 480 seconds to do all the sectors (for a 2 meg flash).
Erasure time is dependent on chip age, temp and wear.. */
/* This being a generic routine assumes a 32 bit bus. It does read32s
and bundles interleved chips into the same grouping. This will work
for all bus widths */
Time = 0;
NoTime = 0;
for (I = 0; priv->chips[I].jedec != 0 && I < MAX_JEDEC_CHIPS; I++)
{
struct jedec_flash_chip *chip = priv->chips + I;
unsigned long off = 0;
unsigned todo[4] = {0,0,0,0};
unsigned todo_left = 0;
unsigned J;
if (chip->length == 0)
continue;
/* Find all chips in this data line, realistically this is all
or nothing up to the interleve count */
for (J = 0; priv->chips[J].jedec != 0 && J < MAX_JEDEC_CHIPS; J++)
{
if ((priv->chips[J].base & (~((1<<chip->addrshift)-1))) ==
(chip->base & (~((1<<chip->addrshift)-1))))
{
todo_left++;
todo[priv->chips[J].base & ((1<<chip->addrshift)-1)] = 1;
}
}
/* printk("todo: %x %x %x %x\n",(short)todo[0],(short)todo[1],
(short)todo[2],(short)todo[3]);
*/
while (1)
{
__u32 Last[4];
unsigned long Count = 0;
/* During erase bit 7 is held low and bit 6 toggles, we watch this,
should it stop toggling or go high then the erase is completed,
or this is not really flash ;> */
switch (map->buswidth) {
case 1:
Last[0] = map_read8(map,(chip->base >> chip->addrshift) + chip->start + off);
Last[1] = map_read8(map,(chip->base >> chip->addrshift) + chip->start + off);
Last[2] = map_read8(map,(chip->base >> chip->addrshift) + chip->start + off);
break;
case 2:
Last[0] = map_read16(map,(chip->base >> chip->addrshift) + chip->start + off);
Last[1] = map_read16(map,(chip->base >> chip->addrshift) + chip->start + off);
Last[2] = map_read16(map,(chip->base >> chip->addrshift) + chip->start + off);
break;
case 3:
Last[0] = map_read32(map,(chip->base >> chip->addrshift) + chip->start + off);
Last[1] = map_read32(map,(chip->base >> chip->addrshift) + chip->start + off);
Last[2] = map_read32(map,(chip->base >> chip->addrshift) + chip->start + off);
break;
}
Count = 3;
while (todo_left != 0)
{
for (J = 0; J != 4; J++)
{
__u8 Byte1 = (Last[(Count-1)%4] >> (J*8)) & 0xFF;
__u8 Byte2 = (Last[(Count-2)%4] >> (J*8)) & 0xFF;
__u8 Byte3 = (Last[(Count-3)%4] >> (J*8)) & 0xFF;
if (todo[J] == 0)
continue;
if ((Byte1 & (1 << 7)) == 0 && Byte1 != Byte2)
{
// printk("Check %x %x %x\n",(short)J,(short)Byte1,(short)Byte2);
continue;
}
if (Byte1 == Byte2)
{
jedec_flash_failed(Byte3);
return -EIO;
}
todo[J] = 0;
todo_left--;
}
/* if (NoTime == 0)
Time += HZ/10 - schedule_timeout(HZ/10);*/
NoTime = 0;
switch (map->buswidth) {
case 1:
Last[Count % 4] = map_read8(map,(chip->base >> chip->addrshift) + chip->start + off);
break;
case 2:
Last[Count % 4] = map_read16(map,(chip->base >> chip->addrshift) + chip->start + off);
break;
case 4:
Last[Count % 4] = map_read32(map,(chip->base >> chip->addrshift) + chip->start + off);
break;
}
Count++;
/* // Count time, max of 15s per sector (according to AMD)
if (Time > 15*len/mtd->erasesize*HZ)
{
printk("mtd: Flash Erase Timed out\n");
return -EIO;
} */
}
// Skip to the next chip if we used chip erase
if (chip->length == chip->size)
off = chip->size;
else
off += chip->sectorsize;
if (off >= chip->length)
break;
NoTime = 1;
}
for (J = 0; priv->chips[J].jedec != 0 && J < MAX_JEDEC_CHIPS; J++)
{
if ((priv->chips[J].base & (~((1<<chip->addrshift)-1))) ==
(chip->base & (~((1<<chip->addrshift)-1))))
priv->chips[J].length = 0;
}
}
//printk("done\n");
instr->state = MTD_ERASE_DONE;
mtd_erase_callback(instr);
return 0;
#undef flread
#undef flwrite
}
/* This is the simple flash writing function. It writes to every byte, in
sequence. It takes care of how to properly address the flash if
the flash is interleved. It can only be used if all the chips in the
array are identical!*/
static int flash_write(struct mtd_info *mtd, loff_t start, size_t len,
size_t *retlen, const u_char *buf)
{
/* Does IO to the currently selected chip. It takes the bank addressing
base (which is divisible by the chip size) adds the necessary lower bits
of addrshift (interleave index) and then adds the control register index. */
#define flread(x) map_read8(map,base+(off&((1<<chip->addrshift)-1))+((x)<<chip->addrshift))
#define flwrite(v,x) map_write8(map,v,base+(off&((1<<chip->addrshift)-1))+((x)<<chip->addrshift))
struct map_info *map = mtd->priv;
struct jedec_private *priv = map->fldrv_priv;
unsigned long base;
unsigned long off;
size_t save_len = len;
if (start + len > mtd->size)
return -EIO;
//printk("Here");
//printk("flash_write: start is %x, len is %x\n",start,(unsigned long)len);
while (len != 0)
{
struct jedec_flash_chip *chip = priv->chips;
unsigned long bank;
unsigned long boffset;
// Compute the base of the flash.
off = ((unsigned long)start) % (chip->size << chip->addrshift);
base = start - off;
// Perform banked addressing translation.
bank = base & (~(priv->bank_fill[0]-1));
boffset = base & (priv->bank_fill[0]-1);
bank = (bank/priv->bank_fill[0])*my_bank_size;
base = bank + boffset;
// printk("Flasing %X %X %X\n",base,chip->size,len);
// printk("off is %x, compare with %x\n",off,chip->size << chip->addrshift);
// Loop over this page
for (; off != (chip->size << chip->addrshift) && len != 0; start++, len--, off++,buf++)
{
unsigned char oldbyte = map_read8(map,base+off);
unsigned char Last[4];
unsigned long Count = 0;
if (oldbyte == *buf) {
// printk("oldbyte and *buf is %x,len is %x\n",oldbyte,len);
continue;
}
if (((~oldbyte) & *buf) != 0)
printk("mtd: warn: Trying to set a 0 to a 1\n");
// Write
flwrite(0xAA,0x555);
flwrite(0x55,0x2AA);
flwrite(0xA0,0x555);
map_write8(map,*buf,base + off);
Last[0] = map_read8(map,base + off);
Last[1] = map_read8(map,base + off);
Last[2] = map_read8(map,base + off);
/* Wait for the flash to finish the operation. We store the last 4
status bytes that have been retrieved so we can determine why
it failed. The toggle bits keep toggling when there is a
failure */
for (Count = 3; Last[(Count - 1) % 4] != Last[(Count - 2) % 4] &&
Count < 10000; Count++)
Last[Count % 4] = map_read8(map,base + off);
if (Last[(Count - 1) % 4] != *buf)
{
jedec_flash_failed(Last[(Count - 3) % 4]);
return -EIO;
}
}
}
*retlen = save_len;
return 0;
}
/* This is used to enhance the speed of the erase routine,
when things are being done to multiple chips it is possible to
parallize the operations, particularly full memory erases of multi
chip memories benifit */
static void jedec_flash_chip_scan(struct jedec_private *priv,unsigned long start,
unsigned long len)
{
unsigned int I;
// Zero the records
for (I = 0; priv->chips[I].jedec != 0 && I < MAX_JEDEC_CHIPS; I++)
priv->chips[I].start = priv->chips[I].length = 0;
// Intersect the region with each chip
for (I = 0; priv->chips[I].jedec != 0 && I < MAX_JEDEC_CHIPS; I++)
{
struct jedec_flash_chip *chip = priv->chips + I;
unsigned long ByteStart;
unsigned long ChipEndByte = chip->offset + (chip->size << chip->addrshift);
// End is before this chip or the start is after it
if (start+len < chip->offset ||
ChipEndByte - (1 << chip->addrshift) < start)
continue;
if (start < chip->offset)
{
ByteStart = chip->offset;
chip->start = 0;
}
else
{
chip->start = (start - chip->offset + (1 << chip->addrshift)-1) >> chip->addrshift;
ByteStart = start;
}
if (start + len >= ChipEndByte)
chip->length = (ChipEndByte - ByteStart) >> chip->addrshift;
else
chip->length = (start + len - ByteStart + (1 << chip->addrshift)-1) >> chip->addrshift;
}
}
int __init jedec_init(void)
{
register_mtd_chip_driver(&jedec_chipdrv);
return 0;
}
static void __exit jedec_exit(void)
{
unregister_mtd_chip_driver(&jedec_chipdrv);
}
module_init(jedec_init);
module_exit(jedec_exit);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Jason Gunthorpe <jgg@deltatee.com> et al.");
MODULE_DESCRIPTION("Old MTD chip driver for JEDEC-compliant flash chips");

601
drivers/mtd/chips/sharp.c
View File

@ -1,601 +0,0 @@
/*
* MTD chip driver for pre-CFI Sharp flash chips
*
* Copyright 2000,2001 David A. Schleef <ds@schleef.org>
* 2000,2001 Lineo, Inc.
*
* $Id: sharp.c,v 1.17 2005/11/29 14:28:28 gleixner Exp $
*
* Devices supported:
* LH28F016SCT Symmetrical block flash memory, 2Mx8
* LH28F008SCT Symmetrical block flash memory, 1Mx8
*
* Documentation:
* http://www.sharpmeg.com/datasheets/memic/flashcmp/
* http://www.sharpmeg.com/datasheets/memic/flashcmp/01symf/16m/016sctl9.pdf
* 016sctl9.pdf
*
* Limitations:
* This driver only supports 4x1 arrangement of chips.
* Not tested on anything but PowerPC.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/mtd/map.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/cfi.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/slab.h>
#define CMD_RESET 0xffffffff
#define CMD_READ_ID 0x90909090
#define CMD_READ_STATUS 0x70707070
#define CMD_CLEAR_STATUS 0x50505050
#define CMD_BLOCK_ERASE_1 0x20202020
#define CMD_BLOCK_ERASE_2 0xd0d0d0d0
#define CMD_BYTE_WRITE 0x40404040
#define CMD_SUSPEND 0xb0b0b0b0
#define CMD_RESUME 0xd0d0d0d0
#define CMD_SET_BLOCK_LOCK_1 0x60606060
#define CMD_SET_BLOCK_LOCK_2 0x01010101
#define CMD_SET_MASTER_LOCK_1 0x60606060
#define CMD_SET_MASTER_LOCK_2 0xf1f1f1f1
#define CMD_CLEAR_BLOCK_LOCKS_1 0x60606060
#define CMD_CLEAR_BLOCK_LOCKS_2 0xd0d0d0d0
#define SR_READY 0x80808080 // 1 = ready
#define SR_ERASE_SUSPEND 0x40404040 // 1 = block erase suspended
#define SR_ERROR_ERASE 0x20202020 // 1 = error in block erase or clear lock bits
#define SR_ERROR_WRITE 0x10101010 // 1 = error in byte write or set lock bit
#define SR_VPP 0x08080808 // 1 = Vpp is low
#define SR_WRITE_SUSPEND 0x04040404 // 1 = byte write suspended
#define SR_PROTECT 0x02020202 // 1 = lock bit set
#define SR_RESERVED 0x01010101
#define SR_ERRORS (SR_ERROR_ERASE|SR_ERROR_WRITE|SR_VPP|SR_PROTECT)
/* Configuration options */
#undef AUTOUNLOCK /* automatically unlocks blocks before erasing */
static struct mtd_info *sharp_probe(struct map_info *);
static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd);
static int sharp_read(struct mtd_info *mtd, loff_t from, size_t len,
size_t *retlen, u_char *buf);
static int sharp_write(struct mtd_info *mtd, loff_t from, size_t len,
size_t *retlen, const u_char *buf);
static int sharp_erase(struct mtd_info *mtd, struct erase_info *instr);
static void sharp_sync(struct mtd_info *mtd);
static int sharp_suspend(struct mtd_info *mtd);
static void sharp_resume(struct mtd_info *mtd);
static void sharp_destroy(struct mtd_info *mtd);
static int sharp_write_oneword(struct map_info *map, struct flchip *chip,
unsigned long adr, __u32 datum);
static int sharp_erase_oneblock(struct map_info *map, struct flchip *chip,
unsigned long adr);
#ifdef AUTOUNLOCK
static void sharp_unlock_oneblock(struct map_info *map, struct flchip *chip,
unsigned long adr);
#endif
struct sharp_info{
struct flchip *chip;
int bogus;
int chipshift;
int numchips;
struct flchip chips[1];
};
static void sharp_destroy(struct mtd_info *mtd);
static struct mtd_chip_driver sharp_chipdrv = {
.probe = sharp_probe,
.destroy = sharp_destroy,
.name = "sharp",
.module = THIS_MODULE
};
static struct mtd_info *sharp_probe(struct map_info *map)
{
struct mtd_info *mtd = NULL;
struct sharp_info *sharp = NULL;
int width;
mtd = kzalloc(sizeof(*mtd), GFP_KERNEL);
if(!mtd)
return NULL;
sharp = kzalloc(sizeof(*sharp), GFP_KERNEL);
if(!sharp) {
kfree(mtd);
return NULL;
}
width = sharp_probe_map(map,mtd);
if(!width){
kfree(mtd);
kfree(sharp);
return NULL;
}
mtd->priv = map;
mtd->type = MTD_NORFLASH;
mtd->erase = sharp_erase;
mtd->read = sharp_read;
mtd->write = sharp_write;
mtd->sync = sharp_sync;
mtd->suspend = sharp_suspend;
mtd->resume = sharp_resume;
mtd->flags = MTD_CAP_NORFLASH;
mtd->writesize = 1;
mtd->name = map->name;
sharp->chipshift = 23;
sharp->numchips = 1;
sharp->chips[0].start = 0;
sharp->chips[0].state = FL_READY;
sharp->chips[0].mutex = &sharp->chips[0]._spinlock;
sharp->chips[0].word_write_time = 0;
init_waitqueue_head(&sharp->chips[0].wq);
spin_lock_init(&sharp->chips[0]._spinlock);
map->fldrv = &sharp_chipdrv;
map->fldrv_priv = sharp;
__module_get(THIS_MODULE);
return mtd;
}
static inline void sharp_send_cmd(struct map_info *map, unsigned long cmd, unsigned long adr)
{
map_word map_cmd;
map_cmd.x[0] = cmd;
map_write(map, map_cmd, adr);
}
static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd)
{
map_word tmp, read0, read4;
unsigned long base = 0;
int width = 4;
tmp = map_read(map, base+0);
sharp_send_cmd(map, CMD_READ_ID, base+0);
read0 = map_read(map, base+0);
read4 = map_read(map, base+4);
if(read0.x[0] == 0x89898989){
printk("Looks like sharp flash\n");
switch(read4.x[0]){
case 0xaaaaaaaa:
case 0xa0a0a0a0:
/* aa - LH28F016SCT-L95 2Mx8, 32 64k blocks*/
/* a0 - LH28F016SCT-Z4 2Mx8, 32 64k blocks*/
mtd->erasesize = 0x10000 * width;
mtd->size = 0x200000 * width;
return width;
case 0xa6a6a6a6:
/* a6 - LH28F008SCT-L12 1Mx8, 16 64k blocks*/
/* a6 - LH28F008SCR-L85 1Mx8, 16 64k blocks*/
mtd->erasesize = 0x10000 * width;
mtd->size = 0x100000 * width;
return width;
#if 0
case 0x00000000: /* unknown */
/* XX - LH28F004SCT 512kx8, 8 64k blocks*/
mtd->erasesize = 0x10000 * width;
mtd->size = 0x80000 * width;
return width;
#endif
default:
printk("Sort-of looks like sharp flash, 0x%08lx 0x%08lx\n",
read0.x[0], read4.x[0]);
}
}else if((map_read(map, base+0).x[0] == CMD_READ_ID)){
/* RAM, probably */
printk("Looks like RAM\n");
map_write(map, tmp, base+0);
}else{
printk("Doesn't look like sharp flash, 0x%08lx 0x%08lx\n",
read0.x[0], read4.x[0]);
}
return 0;
}
/* This function returns with the chip->mutex lock held. */
static int sharp_wait(struct map_info *map, struct flchip *chip)
{
int i;
map_word status;
unsigned long timeo = jiffies + HZ;
DECLARE_WAITQUEUE(wait, current);
int adr = 0;
retry:
spin_lock_bh(chip->mutex);
switch(chip->state){
case FL_READY:
sharp_send_cmd(map, CMD_READ_STATUS, adr);
chip->state = FL_STATUS;
case FL_STATUS:
for(i=0;i<100;i++){
status = map_read(map, adr);
if((status.x[0] & SR_READY)==SR_READY)
break;
udelay(1);
}
break;
default:
printk("Waiting for chip\n");
set_current_state(TASK_INTERRUPTIBLE);
add_wait_queue(&chip->wq, &wait);
spin_unlock_bh(chip->mutex);
schedule();
remove_wait_queue(&chip->wq, &wait);
if(signal_pending(current))
return -EINTR;
timeo = jiffies + HZ;
goto retry;
}
sharp_send_cmd(map, CMD_RESET, adr);
chip->state = FL_READY;
return 0;
}
static void sharp_release(struct flchip *chip)
{
wake_up(&chip->wq);
spin_unlock_bh(chip->mutex);
}
static int sharp_read(struct mtd_info *mtd, loff_t from, size_t len,
size_t *retlen, u_char *buf)
{
struct map_info *map = mtd->priv;
struct sharp_info *sharp = map->fldrv_priv;
int chipnum;
int ret = 0;
int ofs = 0;
chipnum = (from >> sharp->chipshift);
ofs = from & ((1 << sharp->chipshift)-1);
*retlen = 0;
while(len){
unsigned long thislen;
if(chipnum>=sharp->numchips)
break;
thislen = len;
if(ofs+thislen >= (1<<sharp->chipshift))
thislen = (1<<sharp->chipshift) - ofs;
ret = sharp_wait(map,&sharp->chips[chipnum]);
if(ret<0)
break;
map_copy_from(map,buf,ofs,thislen);
sharp_release(&sharp->chips[chipnum]);
*retlen += thislen;
len -= thislen;
buf += thislen;
ofs = 0;
chipnum++;
}
return ret;
}
static int sharp_write(struct mtd_info *mtd, loff_t to, size_t len,
size_t *retlen, const u_char *buf)
{
struct map_info *map = mtd->priv;
struct sharp_info *sharp = map->fldrv_priv;
int ret = 0;
int i,j;
int chipnum;
unsigned long ofs;
union { u32 l; unsigned char uc[4]; } tbuf;
*retlen = 0;
while(len){
tbuf.l = 0xffffffff;
chipnum = to >> sharp->chipshift;
ofs = to & ((1<<sharp->chipshift)-1);
j=0;
for(i=ofs&3;i<4 && len;i++){
tbuf.uc[i] = *buf;
buf++;
to++;
len--;
j++;
}
sharp_write_oneword(map, &sharp->chips[chipnum], ofs&~3, tbuf.l);
if(ret<0)
return ret;
(*retlen)+=j;
}
return 0;
}
static int sharp_write_oneword(struct map_info *map, struct flchip *chip,
unsigned long adr, __u32 datum)
{
int ret;
int timeo;
int try;
int i;
map_word data, status;
status.x[0] = 0;
ret = sharp_wait(map,chip);
for(try=0;try<10;try++){
sharp_send_cmd(map, CMD_BYTE_WRITE, adr);
/* cpu_to_le32 -> hack to fix the writel be->le conversion */
data.x[0] = cpu_to_le32(datum);
map_write(map, data, adr);
chip->state = FL_WRITING;
timeo = jiffies + (HZ/2);
sharp_send_cmd(map, CMD_READ_STATUS, adr);
for(i=0;i<100;i++){
status = map_read(map, adr);
if((status.x[0] & SR_READY) == SR_READY)
break;
}
if(i==100){
printk("sharp: timed out writing\n");
}
if(!(status.x[0] & SR_ERRORS))
break;
printk("sharp: error writing byte at addr=%08lx status=%08lx\n", adr, status.x[0]);
sharp_send_cmd(map, CMD_CLEAR_STATUS, adr);
}
sharp_send_cmd(map, CMD_RESET, adr);
chip->state = FL_READY;
wake_up(&chip->wq);
spin_unlock_bh(chip->mutex);
return 0;
}
static int sharp_erase(struct mtd_info *mtd, struct erase_info *instr)
{
struct map_info *map = mtd->priv;
struct sharp_info *sharp = map->fldrv_priv;
unsigned long adr,len;
int chipnum, ret=0;
//printk("sharp_erase()\n");
if(instr->addr & (mtd->erasesize - 1))
return -EINVAL;
if(instr->len & (mtd->erasesize - 1))
return -EINVAL;
if(instr->len + instr->addr > mtd->size)
return -EINVAL;
chipnum = instr->addr >> sharp->chipshift;
adr = instr->addr & ((1<<sharp->chipshift)-1);
len = instr->len;
while(len){
ret = sharp_erase_oneblock(map, &sharp->chips[chipnum], adr);
if(ret)return ret;
adr += mtd->erasesize;
len -= mtd->erasesize;
if(adr >> sharp->chipshift){
adr = 0;
chipnum++;
if(chipnum>=sharp->numchips)
break;
}
}
instr->state = MTD_ERASE_DONE;
mtd_erase_callback(instr);
return 0;
}
static int sharp_do_wait_for_ready(struct map_info *map, struct flchip *chip,
unsigned long adr)
{
int ret;
unsigned long timeo;
map_word status;
DECLARE_WAITQUEUE(wait, current);
sharp_send_cmd(map, CMD_READ_STATUS, adr);
status = map_read(map, adr);
timeo = jiffies + HZ;
while(time_before(jiffies, timeo)){
sharp_send_cmd(map, CMD_READ_STATUS, adr);
status = map_read(map, adr);
if((status.x[0] & SR_READY)==SR_READY){
ret = 0;
goto out;
}
set_current_state(TASK_INTERRUPTIBLE);
add_wait_queue(&chip->wq, &wait);
//spin_unlock_bh(chip->mutex);
schedule_timeout(1);
schedule();
remove_wait_queue(&chip->wq, &wait);
//spin_lock_bh(chip->mutex);
if (signal_pending(current)){
ret = -EINTR;
goto out;
}
}
ret = -ETIME;
out:
return ret;
}
static int sharp_erase_oneblock(struct map_info *map, struct flchip *chip,
unsigned long adr)
{
int ret;
//int timeo;
map_word status;
//int i;
//printk("sharp_erase_oneblock()\n");
#ifdef AUTOUNLOCK
/* This seems like a good place to do an unlock */
sharp_unlock_oneblock(map,chip,adr);
#endif
sharp_send_cmd(map, CMD_BLOCK_ERASE_1, adr);
sharp_send_cmd(map, CMD_BLOCK_ERASE_2, adr);
chip->state = FL_ERASING;
ret = sharp_do_wait_for_ready(map,chip,adr);
if(ret<0)return ret;
sharp_send_cmd(map, CMD_READ_STATUS, adr);
status = map_read(map, adr);
if(!(status.x[0] & SR_ERRORS)){
sharp_send_cmd(map, CMD_RESET, adr);
chip->state = FL_READY;
//spin_unlock_bh(chip->mutex);
return 0;
}
printk("sharp: error erasing block at addr=%08lx status=%08lx\n", adr, status.x[0]);
sharp_send_cmd(map, CMD_CLEAR_STATUS, adr);
//spin_unlock_bh(chip->mutex);
return -EIO;
}
#ifdef AUTOUNLOCK
static void sharp_unlock_oneblock(struct map_info *map, struct flchip *chip,
unsigned long adr)
{
int i;
map_word status;
sharp_send_cmd(map, CMD_CLEAR_BLOCK_LOCKS_1, adr);
sharp_send_cmd(map, CMD_CLEAR_BLOCK_LOCKS_2, adr);
udelay(100);
status = map_read(map, adr);
printk("status=%08lx\n", status.x[0]);
for(i=0;i<1000;i++){
//sharp_send_cmd(map, CMD_READ_STATUS, adr);
status = map_read(map, adr);
if((status.x[0] & SR_READY) == SR_READY)
break;
udelay(100);
}
if(i==1000){
printk("sharp: timed out unlocking block\n");
}
if(!(status.x[0] & SR_ERRORS)){
sharp_send_cmd(map, CMD_RESET, adr);
chip->state = FL_READY;
return;
}
printk("sharp: error unlocking block at addr=%08lx status=%08lx\n", adr, status.x[0]);
sharp_send_cmd(map, CMD_CLEAR_STATUS, adr);
}
#endif
static void sharp_sync(struct mtd_info *mtd)
{
//printk("sharp_sync()\n");
}
static int sharp_suspend(struct mtd_info *mtd)
{
printk("sharp_suspend()\n");
return -EINVAL;
}
static void sharp_resume(struct mtd_info *mtd)
{
printk("sharp_resume()\n");
}
static void sharp_destroy(struct mtd_info *mtd)
{
printk("sharp_destroy()\n");
}
static int __init sharp_probe_init(void)
{
printk("MTD Sharp chip driver <ds@lineo.com>\n");
register_mtd_chip_driver(&sharp_chipdrv);
return 0;
}
static void __exit sharp_probe_exit(void)
{
unregister_mtd_chip_driver(&sharp_chipdrv);
}
module_init(sharp_probe_init);
module_exit(sharp_probe_exit);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("David Schleef <ds@schleef.org>");
MODULE_DESCRIPTION("Old MTD chip driver for pre-CFI Sharp flash chips");

2
drivers/mtd/devices/block2mtd.c
View File

@ -373,7 +373,7 @@ static inline void kill_final_newline(char *str)
#ifndef MODULE
static int block2mtd_init_called = 0;
static __initdata char block2mtd_paramline[80 + 12]; /* 80 for device, 12 for erase size */
static char block2mtd_paramline[80 + 12]; /* 80 for device, 12 for erase size */
#endif

16
drivers/mtd/maps/Kconfig
View File

@ -358,22 +358,6 @@ config MTD_CFI_FLAGADM
Mapping for the Flaga digital module. If you don't have one, ignore
this setting.
config MTD_BEECH
tristate "CFI Flash device mapped on IBM 405LP Beech"
depends on MTD_CFI && BEECH
help
This enables access routines for the flash chips on the IBM
405LP Beech board. If you have one of these boards and would like
to use the flash chips on it, say 'Y'.
config MTD_ARCTIC
tristate "CFI Flash device mapped on IBM 405LP Arctic"
depends on MTD_CFI && ARCTIC2
help
This enables access routines for the flash chips on the IBM 405LP
Arctic board. If you have one of these boards and would like to
use the flash chips on it, say 'Y'.
config MTD_WALNUT
tristate "Flash device mapped on IBM 405GP Walnut"
depends on MTD_JEDECPROBE && WALNUT

2
drivers/mtd/maps/Makefile
View File

@ -58,8 +58,6 @@ obj-$(CONFIG_MTD_NETtel) += nettel.o
obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o
obj-$(CONFIG_MTD_EBONY) += ebony.o
obj-$(CONFIG_MTD_OCOTEA) += ocotea.o
obj-$(CONFIG_MTD_BEECH) += beech-mtd.o
obj-$(CONFIG_MTD_ARCTIC) += arctic-mtd.o
obj-$(CONFIG_MTD_WALNUT) += walnut.o
obj-$(CONFIG_MTD_H720X) += h720x-flash.o
obj-$(CONFIG_MTD_SBC8240) += sbc8240.o

145
drivers/mtd/maps/arctic-mtd.c
View File

@ -1,145 +0,0 @@
/*
* $Id: arctic-mtd.c,v 1.14 2005/11/07 11:14:26 gleixner Exp $
*
* drivers/mtd/maps/arctic-mtd.c MTD mappings and partition tables for
* IBM 405LP Arctic boards.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* Copyright (C) 2002, International Business Machines Corporation
* All Rights Reserved.
*
* Bishop Brock
* IBM Research, Austin Center for Low-Power Computing
* bcbrock@us.ibm.com
* March 2002
*
* modified for Arctic by,
* David Gibson
* IBM OzLabs, Canberra, Australia
* <arctic@gibson.dropbear.id.au>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
#include <asm/io.h>
#include <asm/ibm4xx.h>
/*
* 0 : 0xFE00 0000 - 0xFEFF FFFF : Filesystem 1 (16MiB)
* 1 : 0xFF00 0000 - 0xFF4F FFFF : kernel (5.12MiB)
* 2 : 0xFF50 0000 - 0xFFF5 FFFF : Filesystem 2 (10.624MiB) (if non-XIP)
* 3 : 0xFFF6 0000 - 0xFFFF FFFF : PIBS Firmware (640KiB)
*/
#define FFS1_SIZE 0x01000000 /* 16MiB */
#define KERNEL_SIZE 0x00500000 /* 5.12MiB */
#define FFS2_SIZE 0x00a60000 /* 10.624MiB */
#define FIRMWARE_SIZE 0x000a0000 /* 640KiB */
#define NAME "Arctic Linux Flash"
#define PADDR SUBZERO_BOOTFLASH_PADDR
#define BUSWIDTH 2
#define SIZE SUBZERO_BOOTFLASH_SIZE
#define PARTITIONS 4
/* Flash memories on these boards are memory resources, accessed big-endian. */
{
/* do nothing for now */
}
static struct map_info arctic_mtd_map = {
.name = NAME,
.size = SIZE,
.bankwidth = BUSWIDTH,
.phys = PADDR,
};
static struct mtd_info *arctic_mtd;
static struct mtd_partition arctic_partitions[PARTITIONS] = {
{ .name = "Filesystem",
.size = FFS1_SIZE,
.offset = 0,},
{ .name = "Kernel",
.size = KERNEL_SIZE,
.offset = FFS1_SIZE,},
{ .name = "Filesystem",
.size = FFS2_SIZE,
.offset = FFS1_SIZE + KERNEL_SIZE,},
{ .name = "Firmware",
.size = FIRMWARE_SIZE,
.offset = SUBZERO_BOOTFLASH_SIZE - FIRMWARE_SIZE,},
};
static int __init
init_arctic_mtd(void)
{
int err;
printk("%s: 0x%08x at 0x%08x\n", NAME, SIZE, PADDR);
arctic_mtd_map.virt = ioremap(PADDR, SIZE);
if (!arctic_mtd_map.virt) {
printk("%s: failed to ioremap 0x%x\n", NAME, PADDR);
return -EIO;
}
simple_map_init(&arctic_mtd_map);
printk("%s: probing %d-bit flash bus\n", NAME, BUSWIDTH * 8);
arctic_mtd = do_map_probe("cfi_probe", &arctic_mtd_map);
if (!arctic_mtd) {
iounmap(arctic_mtd_map.virt);
return -ENXIO;
}
arctic_mtd->owner = THIS_MODULE;
err = add_mtd_partitions(arctic_mtd, arctic_partitions, PARTITIONS);
if (err) {
printk("%s: add_mtd_partitions failed\n", NAME);
iounmap(arctic_mtd_map.virt);
}
return err;
}
static void __exit
cleanup_arctic_mtd(void)
{
if (arctic_mtd) {
del_mtd_partitions(arctic_mtd);
map_destroy(arctic_mtd);
iounmap((void *) arctic_mtd_map.virt);
}
}
module_init(init_arctic_mtd);
module_exit(cleanup_arctic_mtd);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("David Gibson <arctic@gibson.dropbear.id.au>");
MODULE_DESCRIPTION("MTD map and partitions for IBM 405LP Arctic boards");

122
drivers/mtd/maps/beech-mtd.c
View File

@ -1,122 +0,0 @@
/*
* $Id: beech-mtd.c,v 1.11 2005/11/07 11:14:26 gleixner Exp $
*
* drivers/mtd/maps/beech-mtd.c MTD mappings and partition tables for
* IBM 405LP Beech boards.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* Copyright (C) 2002, International Business Machines Corporation
* All Rights Reserved.
*
* Bishop Brock
* IBM Research, Austin Center for Low-Power Computing
* bcbrock@us.ibm.com
* March 2002
*
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
#include <asm/io.h>
#include <asm/ibm4xx.h>
#define NAME "Beech Linux Flash"
#define PADDR BEECH_BIGFLASH_PADDR
#define SIZE BEECH_BIGFLASH_SIZE
#define BUSWIDTH 1
/* Flash memories on these boards are memory resources, accessed big-endian. */
static struct map_info beech_mtd_map = {
.name = NAME,
.size = SIZE,
.bankwidth = BUSWIDTH,
.phys = PADDR
};
static struct mtd_info *beech_mtd;
static struct mtd_partition beech_partitions[2] = {
{
.name = "Linux Kernel",
.size = BEECH_KERNEL_SIZE,
.offset = BEECH_KERNEL_OFFSET
}, {
.name = "Free Area",
.size = BEECH_FREE_AREA_SIZE,
.offset = BEECH_FREE_AREA_OFFSET
}
};
static int __init
init_beech_mtd(void)
{
int err;
printk("%s: 0x%08x at 0x%08x\n", NAME, SIZE, PADDR);
beech_mtd_map.virt = ioremap(PADDR, SIZE);
if (!beech_mtd_map.virt) {
printk("%s: failed to ioremap 0x%x\n", NAME, PADDR);
return -EIO;
}
simple_map_init(&beech_mtd_map);
printk("%s: probing %d-bit flash bus\n", NAME, BUSWIDTH * 8);
beech_mtd = do_map_probe("cfi_probe", &beech_mtd_map);
if (!beech_mtd) {
iounmap(beech_mtd_map.virt);
return -ENXIO;
}
beech_mtd->owner = THIS_MODULE;
err = add_mtd_partitions(beech_mtd, beech_partitions, 2);
if (err) {
printk("%s: add_mtd_partitions failed\n", NAME);
iounmap(beech_mtd_map.virt);
}
return err;
}
static void __exit
cleanup_beech_mtd(void)
{
if (beech_mtd) {
del_mtd_partitions(beech_mtd);
map_destroy(beech_mtd);
iounmap((void *) beech_mtd_map.virt);
}
}
module_init(init_beech_mtd);
module_exit(cleanup_beech_mtd);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Bishop Brock <bcbrock@us.ibm.com>");
MODULE_DESCRIPTION("MTD map and partitions for IBM 405LP Beech boards");

2
drivers/mtd/maps/physmap_of.c
View File

@ -186,7 +186,7 @@ static int __devinit of_physmap_probe(struct of_device *dev, const struct of_dev
else {
if (strcmp(of_probe, "ROM"))
dev_dbg(&dev->dev, "map_probe: don't know probe type "
"'%s', mapping as rom\n");
"'%s', mapping as rom\n", of_probe);
info->mtd = do_map_probe("mtd_rom", &info->map);
}
if (info->mtd == NULL) {

1
drivers/mtd/mtdpart.c
View File

@ -347,7 +347,6 @@ int add_mtd_partitions(struct mtd_info *master,
slave->mtd.subpage_sft = master->subpage_sft;
slave->mtd.name = parts[i].name;
slave->mtd.bank_size = master->bank_size;
slave->mtd.owner = master->owner;
slave->mtd.read = part_read;

21
drivers/mtd/nand/Kconfig
View File

@ -232,11 +232,13 @@ config MTD_NAND_BASLER_EXCITE
will be named "excite_nandflash.ko".
config MTD_NAND_CAFE
tristate "NAND support for OLPC CAFÉ chip"
depends on PCI
help
Use NAND flash attached to the CAFÉ chip designed for the $100
laptop.
tristate "NAND support for OLPC CAFÉ chip"
depends on PCI
select REED_SOLOMON
select REED_SOLOMON_DEC16
help
Use NAND flash attached to the CAFÉ chip designed for the $100
laptop.
config MTD_NAND_CS553X
tristate "NAND support for CS5535/CS5536 (AMD Geode companion chip)"
@ -270,4 +272,13 @@ config MTD_NAND_NANDSIM
The simulator may simulate various NAND flash chips for the
MTD nand layer.
config MTD_NAND_PLATFORM
tristate "Support for generic platform NAND driver"
depends on MTD_NAND
help
This implements a generic NAND driver for on-SOC platform
devices. You will need to provide platform-specific functions
via platform_data.
endif # MTD_NAND

2
drivers/mtd/nand/Makefile
View File

@ -26,6 +26,6 @@ obj-$(CONFIG_MTD_NAND_NDFC) += ndfc.o
obj-$(CONFIG_MTD_NAND_AT91) += at91_nand.o
obj-$(CONFIG_MTD_NAND_CM_X270) += cmx270_nand.o
obj-$(CONFIG_MTD_NAND_BASLER_EXCITE) += excite_nandflash.o
obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
nand-objs := nand_base.o nand_bbt.o
cafe_nand-objs := cafe.o cafe_ecc.o

10
drivers/mtd/nand/at91_nand.c
View File

@ -82,6 +82,10 @@ static void at91_nand_disable(struct at91_nand_host *host)
at91_set_gpio_value(host->board->enable_pin, 1);
}
#ifdef CONFIG_MTD_PARTITIONS
const char *part_probes[] = { "cmdlinepart", NULL };
#endif
/*
* Probe for the NAND device.
*/
@ -151,6 +155,12 @@ static int __init at91_nand_probe(struct platform_device *pdev)
#ifdef CONFIG_MTD_PARTITIONS
if (host->board->partition_info)
partitions = host->board->partition_info(mtd->size, &num_partitions);
#ifdef CONFIG_MTD_CMDLINE_PARTS
else {
mtd->name = "at91_nand";
num_partitions = parse_mtd_partitions(mtd, part_probes, &partitions, 0);
}
#endif
if ((!partitions) || (num_partitions == 0)) {
printk(KERN_ERR "at91_nand: No parititions defined, or unsupported device.\n");

1381
drivers/mtd/nand/cafe_ecc.c
View File

File diff suppressed because it is too large Load Diff

137
drivers/mtd/nand/cafe.c → drivers/mtd/nand/cafe_nand.c
View File

@ -11,6 +11,7 @@
#undef DEBUG
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/rslib.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
@ -46,13 +47,14 @@
#define CAFE_GLOBAL_IRQ_MASK 0x300c
#define CAFE_NAND_RESET 0x3034
int cafe_correct_ecc(unsigned char *buf,
unsigned short *chk_syndrome_list);
/* Missing from the datasheet: bit 19 of CTRL1 sets CE0 vs. CE1 */
#define CTRL1_CHIPSELECT (1<<19)
struct cafe_priv {
struct nand_chip nand;
struct pci_dev *pdev;
void __iomem *mmio;
struct rs_control *rs;
uint32_t ctl1;
uint32_t ctl2;
int datalen;
@ -195,8 +197,8 @@ static void cafe_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
cafe->data_pos = cafe->datalen = 0;
/* Set command valid bit */
ctl1 = 0x80000000 | command;
/* Set command valid bit, mask in the chip select bit */
ctl1 = 0x80000000 | command | (cafe->ctl1 & CTRL1_CHIPSELECT);
/* Set RD or WR bits as appropriate */
if (command == NAND_CMD_READID || command == NAND_CMD_STATUS) {
@ -309,8 +311,16 @@ static void cafe_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
static void cafe_select_chip(struct mtd_info *mtd, int chipnr)
{
//struct cafe_priv *cafe = mtd->priv;
// cafe_dev_dbg(&cafe->pdev->dev, "select_chip %d\n", chipnr);
struct cafe_priv *cafe = mtd->priv;
cafe_dev_dbg(&cafe->pdev->dev, "select_chip %d\n", chipnr);
/* Mask the appropriate bit into the stored value of ctl1
which will be used by cafe_nand_cmdfunc() */
if (chipnr)
cafe->ctl1 |= CTRL1_CHIPSELECT;
else
cafe->ctl1 &= ~CTRL1_CHIPSELECT;
}
static int cafe_nand_interrupt(int irq, void *id)
@ -374,28 +384,66 @@ static int cafe_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip,
chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
if (checkecc && cafe_readl(cafe, NAND_ECC_RESULT) & (1<<18)) {
unsigned short syn[8];
int i;
unsigned short syn[8], pat[4];
int pos[4];
u8 *oob = chip->oob_poi;
int i, n;
for (i=0; i<8; i+=2) {
uint32_t tmp = cafe_readl(cafe, NAND_ECC_SYN01 + (i*2));
syn[i] = tmp & 0xfff;
syn[i+1] = (tmp >> 16) & 0xfff;
syn[i] = cafe->rs->index_of[tmp & 0xfff];
syn[i+1] = cafe->rs->index_of[(tmp >> 16) & 0xfff];
}
if ((i = cafe_correct_ecc(buf, syn)) < 0) {
n = decode_rs16(cafe->rs, NULL, NULL, 1367, syn, 0, pos, 0,
pat);
for (i = 0; i < n; i++) {
int p = pos[i];
/* The 12-bit symbols are mapped to bytes here */
if (p > 1374) {
/* out of range */
n = -1374;
} else if (p == 0) {
/* high four bits do not correspond to data */
if (pat[i] > 0xff)
n = -2048;
else
buf[0] ^= pat[i];
} else if (p == 1365) {
buf[2047] ^= pat[i] >> 4;
oob[0] ^= pat[i] << 4;
} else if (p > 1365) {
if ((p & 1) == 1) {
oob[3*p/2 - 2048] ^= pat[i] >> 4;
oob[3*p/2 - 2047] ^= pat[i] << 4;
} else {
oob[3*p/2 - 2049] ^= pat[i] >> 8;
oob[3*p/2 - 2048] ^= pat[i];
}
} else if ((p & 1) == 1) {
buf[3*p/2] ^= pat[i] >> 4;
buf[3*p/2 + 1] ^= pat[i] << 4;
} else {
buf[3*p/2 - 1] ^= pat[i] >> 8;
buf[3*p/2] ^= pat[i];
}
}
if (n < 0) {
dev_dbg(&cafe->pdev->dev, "Failed to correct ECC at %08x\n",
cafe_readl(cafe, NAND_ADDR2) * 2048);
for (i=0; i< 0x5c; i+=4)
for (i = 0; i < 0x5c; i += 4)
printk("Register %x: %08x\n", i, readl(cafe->mmio + i));
mtd->ecc_stats.failed++;
} else {
dev_dbg(&cafe->pdev->dev, "Corrected %d symbol errors\n", i);
mtd->ecc_stats.corrected += i;
dev_dbg(&cafe->pdev->dev, "Corrected %d symbol errors\n", n);
mtd->ecc_stats.corrected += n;
}
}
return 0;
}
@ -416,7 +464,7 @@ static uint8_t cafe_mirror_pattern_512[] = { 0xBC };
static struct nand_bbt_descr cafe_bbt_main_descr_2048 = {
.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
| NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
| NAND_BBT_2BIT | NAND_BBT_VERSION,
.offs = 14,
.len = 4,
.veroffs = 18,
@ -426,7 +474,7 @@ static struct nand_bbt_descr cafe_bbt_main_descr_2048 = {
static struct nand_bbt_descr cafe_bbt_mirror_descr_2048 = {
.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
| NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
| NAND_BBT_2BIT | NAND_BBT_VERSION,
.offs = 14,
.len = 4,
.veroffs = 18,
@ -442,7 +490,7 @@ static struct nand_ecclayout cafe_oobinfo_512 = {
static struct nand_bbt_descr cafe_bbt_main_descr_512 = {
.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
| NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
| NAND_BBT_2BIT | NAND_BBT_VERSION,
.offs = 14,
.len = 1,
.veroffs = 15,
@ -452,7 +500,7 @@ static struct nand_bbt_descr cafe_bbt_main_descr_512 = {
static struct nand_bbt_descr cafe_bbt_mirror_descr_512 = {
.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
| NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
| NAND_BBT_2BIT | NAND_BBT_VERSION,
.offs = 14,
.len = 1,
.veroffs = 15,
@ -525,6 +573,48 @@ static int cafe_nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
return 0;
}
/* F_2[X]/(X**6+X+1) */
static unsigned short __devinit gf64_mul(u8 a, u8 b)
{
u8 c;
unsigned int i;
c = 0;
for (i = 0; i < 6; i++) {
if (a & 1)
c ^= b;
a >>= 1;
b <<= 1;
if ((b & 0x40) != 0)
b ^= 0x43;
}
return c;
}
/* F_64[X]/(X**2+X+A**-1) with A the generator of F_64[X] */
static u16 __devinit gf4096_mul(u16 a, u16 b)
{
u8 ah, al, bh, bl, ch, cl;
ah = a >> 6;
al = a & 0x3f;
bh = b >> 6;
bl = b & 0x3f;
ch = gf64_mul(ah ^ al, bh ^ bl) ^ gf64_mul(al, bl);
cl = gf64_mul(gf64_mul(ah, bh), 0x21) ^ gf64_mul(al, bl);
return (ch << 6) ^ cl;
}
static int __devinit cafe_mul(int x)
{
if (x == 0)
return 1;
return gf4096_mul(x, 0xe01);
}
static int __devinit cafe_nand_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
@ -564,6 +654,12 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
}
cafe->nand.buffers = (void *)cafe->dmabuf + 2112;
cafe->rs = init_rs_non_canonical(12, &cafe_mul, 0, 1, 8);
if (!cafe->rs) {
err = -ENOMEM;
goto out_ior;
}
cafe->nand.cmdfunc = cafe_nand_cmdfunc;
cafe->nand.dev_ready = cafe_device_ready;
cafe->nand.read_byte = cafe_read_byte;
@ -646,7 +742,7 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
cafe_readl(cafe, GLOBAL_CTRL), cafe_readl(cafe, GLOBAL_IRQ_MASK));
/* Scan to find existence of the device */
if (nand_scan_ident(mtd, 1)) {
if (nand_scan_ident(mtd, 2)) {
err = -ENXIO;
goto out_irq;
}
@ -713,6 +809,7 @@ static void __devexit cafe_nand_remove(struct pci_dev *pdev)
cafe_writel(cafe, ~1 & cafe_readl(cafe, GLOBAL_IRQ_MASK), GLOBAL_IRQ_MASK);
free_irq(pdev->irq, mtd);
nand_release(mtd);
free_rs(cafe->rs);
pci_iounmap(pdev, cafe->mmio);
dma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr);
kfree(mtd);

11
drivers/mtd/nand/nand_base.c
View File

@ -303,28 +303,27 @@ static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
struct nand_chip *chip = mtd->priv;
u16 bad;
page = (int)(ofs >> chip->page_shift) & chip->pagemask;
if (getchip) {
page = (int)(ofs >> chip->page_shift);
chipnr = (int)(ofs >> chip->chip_shift);
nand_get_device(chip, mtd, FL_READING);
/* Select the NAND device */
chip->select_chip(mtd, chipnr);
} else
page = (int)(ofs >> chip->page_shift);
}
if (chip->options & NAND_BUSWIDTH_16) {
chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE,
page & chip->pagemask);
page);
bad = cpu_to_le16(chip->read_word(mtd));
if (chip->badblockpos & 0x1)
bad >>= 8;
if ((bad & 0xFF) != 0xff)
res = 1;
} else {
chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos,
page & chip->pagemask);
chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page);
if (chip->read_byte(mtd) != 0xff)
res = 1;
}

150
drivers/mtd/nand/plat_nand.c Normal file
View File

@ -0,0 +1,150 @@
/*
* Generic NAND driver
*
* Author: Vitaly Wool <vitalywool@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/io.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
struct plat_nand_data {
struct nand_chip chip;
struct mtd_info mtd;
void __iomem *io_base;
#ifdef CONFIG_MTD_PARTITIONS
int nr_parts;
struct mtd_partition *parts;
#endif
};
/*
* Probe for the NAND device.
*/
static int __init plat_nand_probe(struct platform_device *pdev)
{
struct platform_nand_data *pdata = pdev->dev.platform_data;
struct plat_nand_data *data;
int res = 0;
/* Allocate memory for the device structure (and zero it) */
data = kzalloc(sizeof(struct plat_nand_data), GFP_KERNEL);
if (!data) {
dev_err(&pdev->dev, "failed to allocate device structure.\n");
return -ENOMEM;
}
data->io_base = ioremap(pdev->resource[0].start,
pdev->resource[0].end - pdev->resource[0].start + 1);
if (data->io_base == NULL) {
dev_err(&pdev->dev, "ioremap failed\n");
kfree(data);
return -EIO;
}
data->chip.priv = &data;
data->mtd.priv = &data->chip;
data->mtd.owner = THIS_MODULE;
data->chip.IO_ADDR_R = data->io_base;
data->chip.IO_ADDR_W = data->io_base;
data->chip.cmd_ctrl = pdata->ctrl.cmd_ctrl;
data->chip.dev_ready = pdata->ctrl.dev_ready;
data->chip.select_chip = pdata->ctrl.select_chip;
data->chip.chip_delay = pdata->chip.chip_delay;
data->chip.options |= pdata->chip.options;
data->chip.ecc.hwctl = pdata->ctrl.hwcontrol;
data->chip.ecc.layout = pdata->chip.ecclayout;
data->chip.ecc.mode = NAND_ECC_SOFT;
platform_set_drvdata(pdev, data);
/* Scan to find existance of the device */
if (nand_scan(&data->mtd, 1)) {
res = -ENXIO;
goto out;
}
#ifdef CONFIG_MTD_PARTITIONS
if (pdata->chip.part_probe_types) {
res = parse_mtd_partitions(&data->mtd,
pdata->chip.part_probe_types,
&data->parts, 0);
if (res > 0) {
add_mtd_partitions(&data->mtd, data->parts, res);
return 0;
}
}
if (pdata->chip.partitions) {
data->parts = pdata->chip.partitions;
res = add_mtd_partitions(&data->mtd, data->parts,
pdata->chip.nr_partitions);
} else
#endif
res = add_mtd_device(&data->mtd);
if (!res)
return res;
nand_release(&data->mtd);
out:
platform_set_drvdata(pdev, NULL);
iounmap(data->io_base);
kfree(data);
return res;
}
/*
* Remove a NAND device.
*/
static int __devexit plat_nand_remove(struct platform_device *pdev)
{
struct plat_nand_data *data = platform_get_drvdata(pdev);
struct platform_nand_data *pdata = pdev->dev.platform_data;
nand_release(&data->mtd);
#ifdef CONFIG_MTD_PARTITIONS
if (data->parts && data->parts != pdata->chip.partitions)
kfree(data->parts);
#endif
iounmap(data->io_base);
kfree(data);
return 0;
}
static struct platform_driver plat_nand_driver = {
.probe = plat_nand_probe,
.remove = plat_nand_remove,
.driver = {
.name = "gen_nand",
.owner = THIS_MODULE,
},
};
static int __init plat_nand_init(void)
{
return platform_driver_register(&plat_nand_driver);
}
static void __exit plat_nand_exit(void)
{
platform_driver_unregister(&plat_nand_driver);
}
module_init(plat_nand_init);
module_exit(plat_nand_exit);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Vitaly Wool");
MODULE_DESCRIPTION("Simple generic NAND driver");

2
fs/jffs2/histo_mips.h
View File

@ -1,2 +0,0 @@
#define BIT_DIVIDER_MIPS 1043
static int bits_mips[8] = { 277,249,290,267,229,341,212,241}; /* mips32 */

80
fs/jffs2/readinode.c
View File

@ -219,9 +219,9 @@ static int jffs2_add_tn_to_tree(struct jffs2_sb_info *c,
struct jffs2_tmp_dnode_info *tn)
{
uint32_t fn_end = tn->fn->ofs + tn->fn->size;
struct jffs2_tmp_dnode_info *insert_point = NULL, *this;
struct jffs2_tmp_dnode_info *this;
dbg_readinode("insert fragment %#04x-%#04x, ver %u\n", tn->fn->ofs, fn_end, tn->version);
dbg_readinode("insert fragment %#04x-%#04x, ver %u at %08x\n", tn->fn->ofs, fn_end, tn->version, ref_offset(tn->fn->raw));
/* If a node has zero dsize, we only have to keep if it if it might be the
node with highest version -- i.e. the one which will end up as f->metadata.
@ -240,24 +240,17 @@ static int jffs2_add_tn_to_tree(struct jffs2_sb_info *c,
/* Find the earliest node which _may_ be relevant to this one */
this = jffs2_lookup_tn(&rii->tn_root, tn->fn->ofs);
if (!this) {
/* First addition to empty tree. $DEITY how I love the easy cases */
rb_link_node(&tn->rb, NULL, &rii->tn_root.rb_node);
rb_insert_color(&tn->rb, &rii->tn_root);
dbg_readinode("keep new frag\n");
return 0;
if (this) {
/* If the node is coincident with another at a lower address,
back up until the other node is found. It may be relevant */
while (this->overlapped)
this = tn_prev(this);
/* First node should never be marked overlapped */
BUG_ON(!this);
dbg_readinode("'this' found %#04x-%#04x (%s)\n", this->fn->ofs, this->fn->ofs + this->fn->size, this->fn ? "data" : "hole");
}
/* If we add a new node it'll be somewhere under here. */
insert_point = this;
/* If the node is coincident with another at a lower address,
back up until the other node is found. It may be relevant */
while (tn->overlapped)
tn = tn_prev(tn);
dbg_readinode("'this' found %#04x-%#04x (%s)\n", this->fn->ofs, this->fn->ofs + this->fn->size, this->fn ? "data" : "hole");
while (this) {
if (this->fn->ofs > fn_end)
break;
@ -274,11 +267,10 @@ static int jffs2_add_tn_to_tree(struct jffs2_sb_info *c,
return 0;
} else {
/* Who cares if the new one is good; keep it for now anyway. */
rb_replace_node(&this->rb, &tn->rb, &rii->tn_root);
/* Same overlapping from in front and behind */
tn->overlapped = this->overlapped;
jffs2_kill_tn(c, this);
dbg_readinode("Like new node. Throw away old\n");
rb_replace_node(&this->rb, &tn->rb, &rii->tn_root);
jffs2_kill_tn(c, this);
/* Same overlapping from in front and behind */
return 0;
}
}
@ -291,13 +283,8 @@ static int jffs2_add_tn_to_tree(struct jffs2_sb_info *c,
jffs2_kill_tn(c, tn);
return 0;
}
/* ... and is good. Kill 'this'... */
rb_replace_node(&this->rb, &tn->rb, &rii->tn_root);
tn->overlapped = this->overlapped;
jffs2_kill_tn(c, this);
/* ... and any subsequent nodes which are also overlapped */
this = tn_next(tn);
while (this && this->fn->ofs + this->fn->size < fn_end) {
/* ... and is good. Kill 'this' and any subsequent nodes which are also overlapped */
while (this && this->fn->ofs + this->fn->size <= fn_end) {
struct jffs2_tmp_dnode_info *next = tn_next(this);
if (this->version < tn->version) {
tn_erase(this, &rii->tn_root);
@ -308,8 +295,8 @@ static int jffs2_add_tn_to_tree(struct jffs2_sb_info *c,
}
this = next;
}
dbg_readinode("Done inserting new\n");
return 0;
dbg_readinode("Done killing overlapped nodes\n");
continue;
}
if (this->version > tn->version &&
this->fn->ofs <= tn->fn->ofs &&
@ -321,29 +308,21 @@ static int jffs2_add_tn_to_tree(struct jffs2_sb_info *c,
return 0;
}
/* ... but 'this' was bad. Replace it... */
rb_replace_node(&this->rb, &tn->rb, &rii->tn_root);
dbg_readinode("Bad CRC on old overlapping node. Kill it\n");
tn_erase(this, &rii->tn_root);
jffs2_kill_tn(c, this);
return 0;
break;
}
/* We want to be inserted under the last node which is
either at a lower offset _or_ has a smaller range */
if (this->fn->ofs < tn->fn->ofs ||
(this->fn->ofs == tn->fn->ofs &&
this->fn->size <= tn->fn->size))
insert_point = this;
this = tn_next(this);
}
dbg_readinode("insert_point %p, ver %d, 0x%x-0x%x, ov %d\n",
insert_point, insert_point->version, insert_point->fn->ofs,
insert_point->fn->ofs+insert_point->fn->size,
insert_point->overlapped);
/* We neither completely obsoleted nor were completely
obsoleted by an earlier node. Insert under insert_point */
obsoleted by an earlier node. Insert into the tree */
{
struct rb_node *parent = &insert_point->rb;
struct rb_node **link = &parent;
struct rb_node *parent;
struct rb_node **link = &rii->tn_root.rb_node;
struct jffs2_tmp_dnode_info *insert_point = NULL;
while (*link) {
parent = *link;
@ -359,6 +338,7 @@ static int jffs2_add_tn_to_tree(struct jffs2_sb_info *c,
rb_link_node(&tn->rb, &insert_point->rb, link);
rb_insert_color(&tn->rb, &rii->tn_root);
}
/* If there's anything behind that overlaps us, note it */
this = tn_prev(tn);
if (this) {
@ -457,7 +437,7 @@ static int jffs2_build_inode_fragtree(struct jffs2_sb_info *c,
this = tn_last(&rii->tn_root);
while (this) {
dbg_readinode("tn %p ver %d range 0x%x-0x%x ov %d\n", this, this->version, this->fn->ofs,
this->fn->ofs+this->fn->size, this->overlapped);
this->fn->ofs+this->fn->size, this->overlapped);
this = tn_prev(this);
}
#endif
@ -483,7 +463,7 @@ static int jffs2_build_inode_fragtree(struct jffs2_sb_info *c,
vers_next = tn_prev(this);
eat_last(&ver_root, &this->rb);
if (check_tn_node(c, this)) {
dbg_readinode("node ver %x, 0x%x-0x%x failed CRC\n",
dbg_readinode("node ver %d, 0x%x-0x%x failed CRC\n",
this->version, this->fn->ofs,
this->fn->ofs+this->fn->size);
jffs2_kill_tn(c, this);
@ -496,7 +476,7 @@ static int jffs2_build_inode_fragtree(struct jffs2_sb_info *c,
high_ver = this->version;
rii->latest_ref = this->fn->raw;
}
dbg_readinode("Add %p (v %x, 0x%x-0x%x, ov %d) to fragtree\n",
dbg_readinode("Add %p (v %d, 0x%x-0x%x, ov %d) to fragtree\n",
this, this->version, this->fn->ofs,
this->fn->ofs+this->fn->size, this->overlapped);
@ -850,7 +830,7 @@ static inline int read_dnode(struct jffs2_sb_info *c, struct jffs2_raw_node_ref
return ret;
}
#ifdef JFFS2_DBG_READINODE_MESSAGES
dbg_readinode("After adding ver %d:\n", tn->version);
dbg_readinode("After adding ver %d:\n", je32_to_cpu(rd->version));
tn = tn_first(&rii->tn_root);
while (tn) {
dbg_readinode("%p: v %d r 0x%x-0x%x ov %d\n",

5
fs/jffs2/wbuf.c
View File

@ -637,7 +637,10 @@ static int __jffs2_flush_wbuf(struct jffs2_sb_info *c, int pad)
memset(c->wbuf,0xff,c->wbuf_pagesize);
/* adjust write buffer offset, else we get a non contiguous write bug */
c->wbuf_ofs += c->wbuf_pagesize;
if (SECTOR_ADDR(c->wbuf_ofs) == SECTOR_ADDR(c->wbuf_ofs+c->wbuf_pagesize))
c->wbuf_ofs += c->wbuf_pagesize;
else
c->wbuf_ofs = 0xffffffff;
c->wbuf_len = 0;
return 0;
}

7
include/linux/mtd/mtd.h
View File

@ -9,10 +9,6 @@
#ifndef __MTD_MTD_H__
#define __MTD_MTD_H__
#ifndef __KERNEL__
#error This is a kernel header. Perhaps include mtd-user.h instead?
#endif
#include <linux/types.h>
#include <linux/module.h>
#include <linux/uio.h>
@ -137,9 +133,6 @@ struct mtd_info {
int numeraseregions;
struct mtd_erase_region_info *eraseregions;
/* This really shouldn't be here. It can go away in 2.5 */
u_int32_t bank_size;
int (*erase) (struct mtd_info *mtd, struct erase_info *instr);
/* This stuff for eXecute-In-Place */

16
include/linux/mtd/nand.h
View File

@ -560,6 +560,7 @@ extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
* @chip_delay: R/B delay value in us
* @options: Option flags, e.g. 16bit buswidth
* @ecclayout: ecc layout info structure
* @part_probe_types: NULL-terminated array of probe types
* @priv: hardware controller specific settings
*/
struct platform_nand_chip {
@ -570,6 +571,7 @@ struct platform_nand_chip {
struct nand_ecclayout *ecclayout;
int chip_delay;
unsigned int options;
const char **part_probe_types;
void *priv;
};
@ -578,6 +580,8 @@ struct platform_nand_chip {
* @hwcontrol: platform specific hardware control structure
* @dev_ready: platform specific function to read ready/busy pin
* @select_chip: platform specific chip select function
* @cmd_ctrl: platform specific function for controlling
* ALE/CLE/nCE. Also used to write command and address
* @priv: private data to transport driver specific settings
*
* All fields are optional and depend on the hardware driver requirements
@ -586,9 +590,21 @@ struct platform_nand_ctrl {
void (*hwcontrol)(struct mtd_info *mtd, int cmd);
int (*dev_ready)(struct mtd_info *mtd);
void (*select_chip)(struct mtd_info *mtd, int chip);
void (*cmd_ctrl)(struct mtd_info *mtd, int dat,
unsigned int ctrl);
void *priv;
};
/**
* struct platform_nand_data - container structure for platform-specific data
* @chip: chip level chip structure
* @ctrl: controller level device structure
*/
struct platform_nand_data {
struct platform_nand_chip chip;
struct platform_nand_ctrl ctrl;
};
/* Some helpers to access the data structures */
static inline
struct platform_nand_chip *get_platform_nandchip(struct mtd_info *mtd)

4
include/linux/rslib.h
View File

@ -34,6 +34,7 @@
* @prim: Primitive element, index form
* @iprim: prim-th root of 1, index form
* @gfpoly: The primitive generator polynominal
* @gffunc: Function to generate the field, if non-canonical representation
* @users: Users of this structure
* @list: List entry for the rs control list
*/
@ -48,6 +49,7 @@ struct rs_control {
int prim;
int iprim;
int gfpoly;
int (*gffunc)(int);
int users;
struct list_head list;
};
@ -77,6 +79,8 @@ int decode_rs16(struct rs_control *rs, uint16_t *data, uint16_t *par, int len,
/* Create or get a matching rs control structure */
struct rs_control *init_rs(int symsize, int gfpoly, int fcr, int prim,
int nroots);
struct rs_control *init_rs_non_canonical(int symsize, int (*func)(int),
int fcr, int prim, int nroots);
/* Release a rs control structure */
void free_rs(struct rs_control *rs);

84
lib/reed_solomon/reed_solomon.c
View File

@ -56,6 +56,7 @@ static DEFINE_MUTEX(rslistlock);
* rs_init - Initialize a Reed-Solomon codec
* @symsize: symbol size, bits (1-8)
* @gfpoly: Field generator polynomial coefficients
* @gffunc: Field generator function
* @fcr: first root of RS code generator polynomial, index form
* @prim: primitive element to generate polynomial roots
* @nroots: RS code generator polynomial degree (number of roots)
@ -63,8 +64,8 @@ static DEFINE_MUTEX(rslistlock);
* Allocate a control structure and the polynom arrays for faster
* en/decoding. Fill the arrays according to the given parameters.
*/
static struct rs_control *rs_init(int symsize, int gfpoly, int fcr,
int prim, int nroots)
static struct rs_control *rs_init(int symsize, int gfpoly, int (*gffunc)(int),
int fcr, int prim, int nroots)
{
struct rs_control *rs;
int i, j, sr, root, iprim;
@ -82,6 +83,7 @@ static struct rs_control *rs_init(int symsize, int gfpoly, int fcr,
rs->prim = prim;
rs->nroots = nroots;
rs->gfpoly = gfpoly;
rs->gffunc = gffunc;
/* Allocate the arrays */
rs->alpha_to = kmalloc(sizeof(uint16_t) * (rs->nn + 1), GFP_KERNEL);
@ -99,17 +101,26 @@ static struct rs_control *rs_init(int symsize, int gfpoly, int fcr,
/* Generate Galois field lookup tables */
rs->index_of[0] = rs->nn; /* log(zero) = -inf */
rs->alpha_to[rs->nn] = 0; /* alpha**-inf = 0 */
sr = 1;
for (i = 0; i < rs->nn; i++) {
rs->index_of[sr] = i;
rs->alpha_to[i] = sr;
sr <<= 1;
if (sr & (1 << symsize))
sr ^= gfpoly;
sr &= rs->nn;
if (gfpoly) {
sr = 1;
for (i = 0; i < rs->nn; i++) {
rs->index_of[sr] = i;
rs->alpha_to[i] = sr;
sr <<= 1;
if (sr & (1 << symsize))
sr ^= gfpoly;
sr &= rs->nn;
}
} else {
sr = gffunc(0);
for (i = 0; i < rs->nn; i++) {
rs->index_of[sr] = i;
rs->alpha_to[i] = sr;
sr = gffunc(sr);
}
}
/* If it's not primitive, exit */
if(sr != 1)
if(sr != rs->alpha_to[0])
goto errpol;
/* Find prim-th root of 1, used in decoding */
@ -173,18 +184,22 @@ void free_rs(struct rs_control *rs)
}
/**
* init_rs - Find a matching or allocate a new rs control structure
* init_rs_internal - Find a matching or allocate a new rs control structure
* @symsize: the symbol size (number of bits)
* @gfpoly: the extended Galois field generator polynomial coefficients,
* with the 0th coefficient in the low order bit. The polynomial
* must be primitive;
* @gffunc: pointer to function to generate the next field element,
* or the multiplicative identity element if given 0. Used
* instead of gfpoly if gfpoly is 0
* @fcr: the first consecutive root of the rs code generator polynomial
* in index form
* @prim: primitive element to generate polynomial roots
* @nroots: RS code generator polynomial degree (number of roots)
*/
struct rs_control *init_rs(int symsize, int gfpoly, int fcr, int prim,
int nroots)
static struct rs_control *init_rs_internal(int symsize, int gfpoly,
int (*gffunc)(int), int fcr,
int prim, int nroots)
{
struct list_head *tmp;
struct rs_control *rs;
@ -208,6 +223,8 @@ struct rs_control *init_rs(int symsize, int gfpoly, int fcr, int prim,
continue;
if (gfpoly != rs->gfpoly)
continue;
if (gffunc != rs->gffunc)
continue;
if (fcr != rs->fcr)
continue;
if (prim != rs->prim)
@ -220,7 +237,7 @@ struct rs_control *init_rs(int symsize, int gfpoly, int fcr, int prim,
}
/* Create a new one */
rs = rs_init(symsize, gfpoly, fcr, prim, nroots);
rs = rs_init(symsize, gfpoly, gffunc, fcr, prim, nroots);
if (rs) {
rs->users = 1;
list_add(&rs->list, &rslist);
@ -230,6 +247,42 @@ out:
return rs;
}
/**
* init_rs - Find a matching or allocate a new rs control structure
* @symsize: the symbol size (number of bits)
* @gfpoly: the extended Galois field generator polynomial coefficients,
* with the 0th coefficient in the low order bit. The polynomial
* must be primitive;
* @fcr: the first consecutive root of the rs code generator polynomial
* in index form
* @prim: primitive element to generate polynomial roots
* @nroots: RS code generator polynomial degree (number of roots)
*/
struct rs_control *init_rs(int symsize, int gfpoly, int fcr, int prim,
int nroots)
{
return init_rs_internal(symsize, gfpoly, NULL, fcr, prim, nroots);
}
/**
* init_rs_non_canonical - Find a matching or allocate a new rs control
* structure, for fields with non-canonical
* representation
* @symsize: the symbol size (number of bits)
* @gffunc: pointer to function to generate the next field element,
* or the multiplicative identity element if given 0. Used
* instead of gfpoly if gfpoly is 0
* @fcr: the first consecutive root of the rs code generator polynomial
* in index form
* @prim: primitive element to generate polynomial roots
* @nroots: RS code generator polynomial degree (number of roots)
*/
struct rs_control *init_rs_non_canonical(int symsize, int (*gffunc)(int),
int fcr, int prim, int nroots)
{
return init_rs_internal(symsize, 0, gffunc, fcr, prim, nroots);
}
#ifdef CONFIG_REED_SOLOMON_ENC8
/**
* encode_rs8 - Calculate the parity for data values (8bit data width)
@ -321,6 +374,7 @@ EXPORT_SYMBOL_GPL(decode_rs16);
#endif
EXPORT_SYMBOL_GPL(init_rs);
EXPORT_SYMBOL_GPL(init_rs_non_canonical);
EXPORT_SYMBOL_GPL(free_rs);
MODULE_LICENSE("GPL");