pinctrl: sh-pfc: r8a7795: Add support for INTC-EX IRQ pins
Most pins on the r8a7795 SoC can be configured in GPIO mode for interrupt and GPIO functionality, while a couple of them can also be routed to the INTC-EX hardware block (formerly known as IRQC). On r8a7795 the INTC-EX hardware handles pins IRQ0 -> IRQ5 and this patch adds support for them to the PFC driver as "intc_ex_irqN". Tested on r8a7795 Salvator-X with an external loop back adapter on EXIO_D that connects pin 9 (IRQ2/GP2_02) and pin 26 (ExA22/GP2_06). Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -1835,6 +1835,50 @@ static const unsigned int i2c6_c_mux[] = {
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SDA6_C_MARK, SCL6_C_MARK,
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};
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/* - INTC-EX ---------------------------------------------------------------- */
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static const unsigned int intc_ex_irq0_pins[] = {
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/* IRQ0 */
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RCAR_GP_PIN(2, 0),
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};
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static const unsigned int intc_ex_irq0_mux[] = {
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IRQ0_MARK,
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};
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static const unsigned int intc_ex_irq1_pins[] = {
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/* IRQ1 */
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RCAR_GP_PIN(2, 1),
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};
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static const unsigned int intc_ex_irq1_mux[] = {
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IRQ1_MARK,
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};
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static const unsigned int intc_ex_irq2_pins[] = {
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/* IRQ2 */
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RCAR_GP_PIN(2, 2),
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};
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static const unsigned int intc_ex_irq2_mux[] = {
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IRQ2_MARK,
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};
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static const unsigned int intc_ex_irq3_pins[] = {
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/* IRQ3 */
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RCAR_GP_PIN(2, 3),
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};
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static const unsigned int intc_ex_irq3_mux[] = {
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IRQ3_MARK,
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};
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static const unsigned int intc_ex_irq4_pins[] = {
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/* IRQ4 */
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RCAR_GP_PIN(2, 4),
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};
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static const unsigned int intc_ex_irq4_mux[] = {
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IRQ4_MARK,
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};
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static const unsigned int intc_ex_irq5_pins[] = {
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/* IRQ5 */
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RCAR_GP_PIN(2, 5),
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};
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static const unsigned int intc_ex_irq5_mux[] = {
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IRQ5_MARK,
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};
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/* - MSIOF0 ----------------------------------------------------------------- */
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static const unsigned int msiof0_clk_pins[] = {
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/* SCK */
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@ -3173,6 +3217,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(i2c6_a),
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SH_PFC_PIN_GROUP(i2c6_b),
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SH_PFC_PIN_GROUP(i2c6_c),
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SH_PFC_PIN_GROUP(intc_ex_irq0),
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SH_PFC_PIN_GROUP(intc_ex_irq1),
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SH_PFC_PIN_GROUP(intc_ex_irq2),
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SH_PFC_PIN_GROUP(intc_ex_irq3),
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SH_PFC_PIN_GROUP(intc_ex_irq4),
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SH_PFC_PIN_GROUP(intc_ex_irq5),
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SH_PFC_PIN_GROUP(msiof0_clk),
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SH_PFC_PIN_GROUP(msiof0_sync),
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SH_PFC_PIN_GROUP(msiof0_ss1),
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@ -3439,6 +3489,15 @@ static const char * const i2c6_groups[] = {
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"i2c6_c",
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};
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static const char * const intc_ex_groups[] = {
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"intc_ex_irq0",
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"intc_ex_irq1",
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"intc_ex_irq2",
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"intc_ex_irq3",
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"intc_ex_irq4",
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"intc_ex_irq5",
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};
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static const char * const msiof0_groups[] = {
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"msiof0_clk",
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"msiof0_sync",
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@ -3686,6 +3745,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(i2c1),
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SH_PFC_FUNCTION(i2c2),
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SH_PFC_FUNCTION(i2c6),
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SH_PFC_FUNCTION(intc_ex),
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SH_PFC_FUNCTION(msiof0),
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SH_PFC_FUNCTION(msiof1),
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SH_PFC_FUNCTION(msiof2),
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