Linux 4.5-rc6
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJW0yM6AAoJEHm+PkMAQRiGeUwIAJRTHFPJTFpJcJjeZEV4/EL1 7Pl0WSHs/CWBkXIevAg2HgkECSQ9NI9FAUFvoGxCldDpFAnL1U2QV8+Ur2qhiXMG 5v0jILJuiw57qT/NfhEudZolerlRoHILmB3JRTb+DUV4GHZuWpTkJfUSI9j5aTEl w83XUgtK4bKeIyFbHdWQk6xqfzfFBSuEITuSXreOMwkFfMmeScE0WXOPLBZWyhPa v0rARJLYgM+vmRAnJjnG8unH+SgnqiNcn2oOFpevKwmpVcOjcEmeuxh/HdeZf7HM /R8F86OwdmXsO+z8dQxfcucLg+I9YmKfFr8b6hopu1sRztss2+Uk6H1j2J7IFIg= =tvkh -----END PGP SIGNATURE----- Merge tag 'v4.5-rc6' into core/resources, to resolve conflict Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
commit
bc94b99636
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@ -7,7 +7,7 @@ This is the authoritative documentation on the design, interface and
|
|||
conventions of cgroup v2. It describes all userland-visible aspects
|
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of cgroup including core and specific controller behaviors. All
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future changes must be reflected in this document. Documentation for
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v1 is available under Documentation/cgroup-legacy/.
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v1 is available under Documentation/cgroup-v1/.
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CONTENTS
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@ -843,6 +843,10 @@ PAGE_SIZE multiple when read back.
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Amount of memory used to cache filesystem data,
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including tmpfs and shared memory.
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sock
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Amount of memory used in network transmission buffers
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file_mapped
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Amount of cached filesystem data mapped with mmap()
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|
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@ -30,7 +30,7 @@ that they are defined using standard clock bindings with following
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clock-output-names:
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- "xin24m" - crystal input - required,
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- "ext_i2s" - external I2S clock - optional,
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- "ext_gmac" - external GMAC clock - optional
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- "rmii_clkin" - external EMAC clock - optional
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Example: Clock controller node:
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@ -24,9 +24,8 @@ Main node required properties:
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1 = edge triggered
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4 = level triggered
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Cells 4 and beyond are reserved for future use. When the 1st cell
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has a value of 0 or 1, cells 4 and beyond act as padding, and may be
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ignored. It is recommended that padding cells have a value of 0.
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Cells 4 and beyond are reserved for future use and must have a value
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of 0 if present.
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- reg : Specifies base physical address(s) and size of the GIC
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registers, in the following order:
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@ -68,7 +68,7 @@ ethernet@f0b60000 {
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phy1: ethernet-phy@1 {
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max-speed = <1000>;
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reg = <0x1>;
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compatible = "brcm,28nm-gphy", "ethernet-phy-ieee802.3-c22";
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compatible = "ethernet-phy-ieee802.3-c22";
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};
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};
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};
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@ -115,7 +115,7 @@ ethernet@f0ba0000 {
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phy0: ethernet-phy@0 {
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max-speed = <1000>;
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reg = <0x0>;
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compatible = "brcm,bcm53125", "ethernet-phy-ieee802.3-c22";
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compatible = "ethernet-phy-ieee802.3-c22";
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};
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};
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};
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@ -4,8 +4,6 @@ Required properties:
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- compatible: should be "hisilicon,hns-dsaf-v1" or "hisilicon,hns-dsaf-v2".
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"hisilicon,hns-dsaf-v1" is for hip05.
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"hisilicon,hns-dsaf-v2" is for Hi1610 and Hi1612.
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- dsa-name: dsa fabric name who provide this interface.
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should be "dsafX", X is the dsaf id.
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- mode: dsa fabric mode string. only support one of dsaf modes like these:
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"2port-64vf",
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"6port-16rss",
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@ -26,9 +24,8 @@ Required properties:
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Example:
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dsa: dsa@c7000000 {
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dsaf0: dsa@c7000000 {
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compatible = "hisilicon,hns-dsaf-v1";
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dsa_name = "dsaf0";
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mode = "6port-16rss";
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interrupt-parent = <&mbigen_dsa>;
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reg = <0x0 0xC0000000 0x0 0x420000
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@ -4,8 +4,9 @@ Required properties:
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- compatible: "hisilicon,hns-nic-v1" or "hisilicon,hns-nic-v2".
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"hisilicon,hns-nic-v1" is for hip05.
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"hisilicon,hns-nic-v2" is for Hi1610 and Hi1612.
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- ae-name: accelerator name who provides this interface,
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is simply a name referring to the name of name in the accelerator node.
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- ae-handle: accelerator engine handle for hns,
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specifies a reference to the associating hardware driver node.
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see Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt
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- port-id: is the index of port provided by DSAF (the accelerator). DSAF can
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connect to 8 PHYs. Port 0 to 1 are both used for adminstration purpose. They
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are called debug ports.
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@ -41,7 +42,7 @@ Example:
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ethernet@0{
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compatible = "hisilicon,hns-nic-v1";
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ae-name = "dsaf0";
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ae-handle = <&dsaf0>;
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port-id = <0>;
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local-mac-address = [a2 14 e4 4b 56 76];
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};
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@ -6,12 +6,17 @@ Required properties:
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- interrupts: interrupt for the device
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- phy: See ethernet.txt file in the same directory.
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- phy-mode: See ethernet.txt file in the same directory
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- clocks: a pointer to the reference clock for this device.
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- clocks: List of clocks for this device. At least one clock is
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mandatory for the core clock. If several clocks are given, then the
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clock-names property must be used to identify them.
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Optional properties:
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- tx-csum-limit: maximum mtu supported by port that allow TX checksum.
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Value is presented in bytes. If not used, by default 1600B is set for
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"marvell,armada-370-neta" and 9800B for others.
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- clock-names: List of names corresponding to clocks property; shall be
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"core" for core clock and "bus" for the optional bus clock.
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Example:
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@ -38,7 +38,6 @@ Example :
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phy11: ethernet-phy@1 {
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reg = <1>;
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compatible = "marvell,88e1149r";
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marvell,reg-init = <3 0x10 0 0x5777>,
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<3 0x11 0 0x00aa>,
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<3 0x12 0 0x4105>,
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@ -48,7 +47,6 @@ Example :
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};
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phy12: ethernet-phy@2 {
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reg = <2>;
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compatible = "marvell,88e1149r";
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marvell,reg-init = <3 0x10 0 0x5777>,
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<3 0x11 0 0x00aa>,
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<3 0x12 0 0x4105>,
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@ -58,7 +56,6 @@ Example :
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};
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phy13: ethernet-phy@3 {
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reg = <3>;
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compatible = "marvell,88e1149r";
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marvell,reg-init = <3 0x10 0 0x5777>,
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<3 0x11 0 0x00aa>,
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<3 0x12 0 0x4105>,
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@ -68,7 +65,6 @@ Example :
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};
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phy14: ethernet-phy@4 {
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reg = <4>;
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compatible = "marvell,88e1149r";
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marvell,reg-init = <3 0x10 0 0x5777>,
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<3 0x11 0 0x00aa>,
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<3 0x12 0 0x4105>,
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@ -85,7 +81,6 @@ Example :
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phy21: ethernet-phy@1 {
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reg = <1>;
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compatible = "marvell,88e1149r";
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marvell,reg-init = <3 0x10 0 0x5777>,
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<3 0x11 0 0x00aa>,
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<3 0x12 0 0x4105>,
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@ -95,7 +90,6 @@ Example :
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};
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phy22: ethernet-phy@2 {
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reg = <2>;
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compatible = "marvell,88e1149r";
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marvell,reg-init = <3 0x10 0 0x5777>,
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<3 0x11 0 0x00aa>,
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<3 0x12 0 0x4105>,
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@ -105,7 +99,6 @@ Example :
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};
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phy23: ethernet-phy@3 {
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reg = <3>;
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compatible = "marvell,88e1149r";
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marvell,reg-init = <3 0x10 0 0x5777>,
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<3 0x11 0 0x00aa>,
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<3 0x12 0 0x4105>,
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@ -115,7 +108,6 @@ Example :
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};
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phy24: ethernet-phy@4 {
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reg = <4>;
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compatible = "marvell,88e1149r";
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marvell,reg-init = <3 0x10 0 0x5777>,
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<3 0x11 0 0x00aa>,
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<3 0x12 0 0x4105>,
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@ -47,7 +47,6 @@ Example :
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phy11: ethernet-phy@1 {
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reg = <1>;
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compatible = "marvell,88e1149r";
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marvell,reg-init = <3 0x10 0 0x5777>,
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<3 0x11 0 0x00aa>,
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<3 0x12 0 0x4105>,
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@ -57,7 +56,6 @@ Example :
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};
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phy12: ethernet-phy@2 {
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reg = <2>;
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compatible = "marvell,88e1149r";
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marvell,reg-init = <3 0x10 0 0x5777>,
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<3 0x11 0 0x00aa>,
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<3 0x12 0 0x4105>,
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@ -67,7 +65,6 @@ Example :
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};
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phy13: ethernet-phy@3 {
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reg = <3>;
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compatible = "marvell,88e1149r";
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marvell,reg-init = <3 0x10 0 0x5777>,
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<3 0x11 0 0x00aa>,
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<3 0x12 0 0x4105>,
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@ -77,7 +74,6 @@ Example :
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};
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phy14: ethernet-phy@4 {
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reg = <4>;
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compatible = "marvell,88e1149r";
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marvell,reg-init = <3 0x10 0 0x5777>,
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<3 0x11 0 0x00aa>,
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<3 0x12 0 0x4105>,
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@ -94,7 +90,6 @@ Example :
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phy21: ethernet-phy@1 {
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reg = <1>;
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compatible = "marvell,88e1149r";
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marvell,reg-init = <3 0x10 0 0x5777>,
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<3 0x11 0 0x00aa>,
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<3 0x12 0 0x4105>,
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@ -104,7 +99,6 @@ Example :
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};
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phy22: ethernet-phy@2 {
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reg = <2>;
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compatible = "marvell,88e1149r";
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marvell,reg-init = <3 0x10 0 0x5777>,
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<3 0x11 0 0x00aa>,
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<3 0x12 0 0x4105>,
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@ -114,7 +108,6 @@ Example :
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};
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phy23: ethernet-phy@3 {
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reg = <3>;
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compatible = "marvell,88e1149r";
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marvell,reg-init = <3 0x10 0 0x5777>,
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<3 0x11 0 0x00aa>,
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<3 0x12 0 0x4105>,
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@ -124,7 +117,6 @@ Example :
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};
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phy24: ethernet-phy@4 {
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reg = <4>;
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compatible = "marvell,88e1149r";
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marvell,reg-init = <3 0x10 0 0x5777>,
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<3 0x11 0 0x00aa>,
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<3 0x12 0 0x4105>,
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|
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@ -17,8 +17,7 @@ Optional Properties:
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"ethernet-phy-ieee802.3-c22" or "ethernet-phy-ieee802.3-c45" for
|
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PHYs that implement IEEE802.3 clause 22 or IEEE802.3 clause 45
|
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specifications. If neither of these are specified, the default is to
|
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assume clause 22. The compatible list may also contain other
|
||||
elements.
|
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assume clause 22.
|
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|
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If the phy's identifier is known then the list may contain an entry
|
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of the form: "ethernet-phy-idAAAA.BBBB" where
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|
@ -28,6 +27,9 @@ Optional Properties:
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4 hex digits. This is the chip vendor OUI bits 19:24,
|
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followed by 10 bits of a vendor specific ID.
|
||||
|
||||
The compatible list should not contain other values than those
|
||||
listed here.
|
||||
|
||||
- max-speed: Maximum PHY supported speed (10, 100, 1000...)
|
||||
|
||||
- broken-turn-around: If set, indicates the PHY device does not correctly
|
||||
|
|
|
@ -82,8 +82,8 @@ Example:
|
|||
"ch16", "ch17", "ch18", "ch19",
|
||||
"ch20", "ch21", "ch22", "ch23",
|
||||
"ch24";
|
||||
clocks = <&mstp8_clks R8A7795_CLK_ETHERAVB>;
|
||||
power-domains = <&cpg_clocks>;
|
||||
clocks = <&cpg CPG_MOD 812>;
|
||||
power-domains = <&cpg>;
|
||||
phy-mode = "rgmii-id";
|
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phy-handle = <&phy0>;
|
||||
|
||||
|
|
|
@ -8,6 +8,7 @@ OHCI and EHCI controllers.
|
|||
Required properties:
|
||||
- compatible: "renesas,pci-r8a7790" for the R8A7790 SoC;
|
||||
"renesas,pci-r8a7791" for the R8A7791 SoC;
|
||||
"renesas,pci-r8a7793" for the R8A7793 SoC;
|
||||
"renesas,pci-r8a7794" for the R8A7794 SoC;
|
||||
"renesas,pci-rcar-gen2" for a generic R-Car Gen2 compatible device
|
||||
|
||||
|
|
|
@ -4,6 +4,7 @@ Required properties:
|
|||
compatible: "renesas,pcie-r8a7779" for the R8A7779 SoC;
|
||||
"renesas,pcie-r8a7790" for the R8A7790 SoC;
|
||||
"renesas,pcie-r8a7791" for the R8A7791 SoC;
|
||||
"renesas,pcie-r8a7793" for the R8A7793 SoC;
|
||||
"renesas,pcie-r8a7795" for the R8A7795 SoC;
|
||||
"renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible device.
|
||||
|
||||
|
|
|
@ -26,11 +26,7 @@ Example:
|
|||
ti,pmic-shutdown-controller;
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: dcdc1 {
|
||||
reg = <0>;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
|
@ -38,7 +34,6 @@ Example:
|
|||
};
|
||||
|
||||
dcdc2_reg: dcdc2 {
|
||||
reg = <1>;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
|
@ -46,7 +41,6 @@ Example:
|
|||
};
|
||||
|
||||
dcdc3_reg: dcc3 {
|
||||
reg = <2>;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-boot-on;
|
||||
|
@ -54,7 +48,6 @@ Example:
|
|||
};
|
||||
|
||||
ldo1_reg: ldo1 {
|
||||
reg = <3>;
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
|
@ -62,7 +55,6 @@ Example:
|
|||
};
|
||||
|
||||
ldo2_reg: ldo2 {
|
||||
reg = <4>;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
|
@ -70,7 +62,6 @@ Example:
|
|||
};
|
||||
|
||||
ldo3_reg: ldo3 {
|
||||
reg = <5>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
|
@ -78,7 +69,6 @@ Example:
|
|||
};
|
||||
|
||||
ldo4_reg: ldo4 {
|
||||
reg = <6>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
|
|
|
@ -14,6 +14,10 @@ Required properties:
|
|||
interrupt number is the rtc alarm interrupt and second interrupt number
|
||||
is the rtc tick interrupt. The number of cells representing a interrupt
|
||||
depends on the parent interrupt controller.
|
||||
- clocks: Must contain a list of phandle and clock specifier for the rtc
|
||||
and source clocks.
|
||||
- clock-names: Must contain "rtc" and "rtc_src" entries sorted in the
|
||||
same order as the clocks property.
|
||||
|
||||
Example:
|
||||
|
||||
|
@ -21,4 +25,6 @@ Example:
|
|||
compatible = "samsung,s3c6410-rtc";
|
||||
reg = <0x10070000 0x100>;
|
||||
interrupts = <44 0 45 0>;
|
||||
clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
|
||||
clock-names = "rtc", "rtc_src";
|
||||
};
|
||||
|
|
|
@ -9,7 +9,7 @@ Optional properties:
|
|||
- fsl,uart-has-rtscts : Indicate the uart has rts and cts
|
||||
- fsl,irda-mode : Indicate the uart supports irda mode
|
||||
- fsl,dte-mode : Indicate the uart works in DTE mode. The uart works
|
||||
is DCE mode by default.
|
||||
in DCE mode by default.
|
||||
|
||||
Note: Each uart controller should have an alias correctly numbered
|
||||
in "aliases" node.
|
||||
|
|
|
@ -30,6 +30,8 @@ The compatible list for this generic sound card currently:
|
|||
"fsl,imx-audio-sgtl5000"
|
||||
(compatible with Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt)
|
||||
|
||||
"fsl,imx-audio-wm8960"
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : Contains one of entries in the compatible list.
|
||||
|
|
|
@ -1,8 +1,9 @@
|
|||
* Renesas R-Car Thermal
|
||||
|
||||
Required properties:
|
||||
- compatible : "renesas,thermal-<soctype>", "renesas,rcar-thermal"
|
||||
as fallback.
|
||||
- compatible : "renesas,thermal-<soctype>",
|
||||
"renesas,rcar-gen2-thermal" (with thermal-zone) or
|
||||
"renesas,rcar-thermal" (without thermal-zone) as fallback.
|
||||
Examples with soctypes are:
|
||||
- "renesas,thermal-r8a73a4" (R-Mobile APE6)
|
||||
- "renesas,thermal-r8a7779" (R-Car H1)
|
||||
|
@ -36,3 +37,35 @@ thermal@e61f0000 {
|
|||
0xe61f0300 0x38>;
|
||||
interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
Example (with thermal-zone):
|
||||
|
||||
thermal-zones {
|
||||
cpu_thermal: cpu-thermal {
|
||||
polling-delay-passive = <1000>;
|
||||
polling-delay = <5000>;
|
||||
|
||||
thermal-sensors = <&thermal>;
|
||||
|
||||
trips {
|
||||
cpu-crit {
|
||||
temperature = <115000>;
|
||||
hysteresis = <0>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
cooling-maps {
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
thermal: thermal@e61f0000 {
|
||||
compatible = "renesas,thermal-r8a7790",
|
||||
"renesas,rcar-gen2-thermal",
|
||||
"renesas,rcar-thermal";
|
||||
reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
|
||||
interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp5_clks R8A7790_CLK_THERMAL>;
|
||||
power-domains = <&cpg_clocks>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
|
|
@ -14,3 +14,10 @@ filesystem.
|
|||
efivarfs is typically mounted like this,
|
||||
|
||||
mount -t efivarfs none /sys/firmware/efi/efivars
|
||||
|
||||
Due to the presence of numerous firmware bugs where removing non-standard
|
||||
UEFI variables causes the system firmware to fail to POST, efivarfs
|
||||
files that are not well-known standardized variables are created
|
||||
as immutable files. This doesn't prevent removal - "chattr -i" will work -
|
||||
but it does prevent this kind of failure from being accomplished
|
||||
accidentally.
|
||||
|
|
|
@ -240,8 +240,8 @@ Table 1-2: Contents of the status files (as of 4.1)
|
|||
RssFile size of resident file mappings
|
||||
RssShmem size of resident shmem memory (includes SysV shm,
|
||||
mapping of tmpfs and shared anonymous mappings)
|
||||
VmData size of data, stack, and text segments
|
||||
VmStk size of data, stack, and text segments
|
||||
VmData size of private data segments
|
||||
VmStk size of stack segments
|
||||
VmExe size of text segment
|
||||
VmLib size of shared library code
|
||||
VmPTE size of page table entries
|
||||
|
@ -356,7 +356,7 @@ address perms offset dev inode pathname
|
|||
a7cb1000-a7cb2000 ---p 00000000 00:00 0
|
||||
a7cb2000-a7eb2000 rw-p 00000000 00:00 0
|
||||
a7eb2000-a7eb3000 ---p 00000000 00:00 0
|
||||
a7eb3000-a7ed5000 rw-p 00000000 00:00 0 [stack:1001]
|
||||
a7eb3000-a7ed5000 rw-p 00000000 00:00 0
|
||||
a7ed5000-a8008000 r-xp 00000000 03:00 4222 /lib/libc.so.6
|
||||
a8008000-a800a000 r--p 00133000 03:00 4222 /lib/libc.so.6
|
||||
a800a000-a800b000 rw-p 00135000 03:00 4222 /lib/libc.so.6
|
||||
|
@ -388,7 +388,6 @@ is not associated with a file:
|
|||
|
||||
[heap] = the heap of the program
|
||||
[stack] = the stack of the main process
|
||||
[stack:1001] = the stack of the thread with tid 1001
|
||||
[vdso] = the "virtual dynamic shared object",
|
||||
the kernel system call handler
|
||||
|
||||
|
@ -396,10 +395,8 @@ is not associated with a file:
|
|||
|
||||
The /proc/PID/task/TID/maps is a view of the virtual memory from the viewpoint
|
||||
of the individual tasks of a process. In this file you will see a mapping marked
|
||||
as [stack] if that task sees it as a stack. This is a key difference from the
|
||||
content of /proc/PID/maps, where you will see all mappings that are being used
|
||||
as stack by all of those tasks. Hence, for the example above, the task-level
|
||||
map, i.e. /proc/PID/task/TID/maps for thread 1001 will look like this:
|
||||
as [stack] if that task sees it as a stack. Hence, for the example above, the
|
||||
task-level map, i.e. /proc/PID/task/TID/maps for thread 1001 will look like this:
|
||||
|
||||
08048000-08049000 r-xp 00000000 03:00 8312 /opt/test
|
||||
08049000-0804a000 rw-p 00001000 03:00 8312 /opt/test
|
||||
|
|
|
@ -1496,6 +1496,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
could change it dynamically, usually by
|
||||
/sys/module/printk/parameters/ignore_loglevel.
|
||||
|
||||
ignore_rlimit_data
|
||||
Ignore RLIMIT_DATA setting for data mappings,
|
||||
print warning at first misuse. Can be changed via
|
||||
/sys/module/kernel/parameters/ignore_rlimit_data.
|
||||
|
||||
ihash_entries= [KNL]
|
||||
Set number of hash buckets for inode cache.
|
||||
|
||||
|
@ -4230,6 +4235,17 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
The default value of this parameter is determined by
|
||||
the config option CONFIG_WQ_POWER_EFFICIENT_DEFAULT.
|
||||
|
||||
workqueue.debug_force_rr_cpu
|
||||
Workqueue used to implicitly guarantee that work
|
||||
items queued without explicit CPU specified are put
|
||||
on the local CPU. This guarantee is no longer true
|
||||
and while local CPU is still preferred work items
|
||||
may be put on foreign CPUs. This debug option
|
||||
forces round-robin CPU selection to flush out
|
||||
usages which depend on the now broken guarantee.
|
||||
When enabled, memory and cache locality will be
|
||||
impacted.
|
||||
|
||||
x2apic_phys [X86-64,APIC] Use x2apic physical mode instead of
|
||||
default x2apic cluster mode on platforms
|
||||
supporting x2apic.
|
||||
|
|
|
@ -594,7 +594,7 @@ tcp_fastopen - INTEGER
|
|||
|
||||
tcp_syn_retries - INTEGER
|
||||
Number of times initial SYNs for an active TCP connection attempt
|
||||
will be retransmitted. Should not be higher than 255. Default value
|
||||
will be retransmitted. Should not be higher than 127. Default value
|
||||
is 6, which corresponds to 63seconds till the last retransmission
|
||||
with the current initial RTO of 1second. With this the final timeout
|
||||
for an active TCP connection attempt will happen after 127seconds.
|
||||
|
|
|
@ -1,9 +1,7 @@
|
|||
High Precision Event Timer Driver for Linux
|
||||
|
||||
The High Precision Event Timer (HPET) hardware follows a specification
|
||||
by Intel and Microsoft which can be found at
|
||||
|
||||
http://www.intel.com/hardwaredesign/hpetspec_1.pdf
|
||||
by Intel and Microsoft, revision 1.
|
||||
|
||||
Each HPET has one fixed-rate counter (at 10+ MHz, hence "High Precision")
|
||||
and up to 32 comparators. Normally three or more comparators are provided,
|
||||
|
|
108
MAINTAINERS
108
MAINTAINERS
|
@ -223,9 +223,7 @@ F: drivers/scsi/aacraid/
|
|||
|
||||
ABI/API
|
||||
L: linux-api@vger.kernel.org
|
||||
F: Documentation/ABI/
|
||||
F: include/linux/syscalls.h
|
||||
F: include/uapi/
|
||||
F: kernel/sys_ni.c
|
||||
|
||||
ABIT UGURU 1,2 HARDWARE MONITOR DRIVER
|
||||
|
@ -686,13 +684,6 @@ M: Michael Hanselmann <linux-kernel@hansmi.ch>
|
|||
S: Supported
|
||||
F: drivers/macintosh/ams/
|
||||
|
||||
AMSO1100 RNIC DRIVER
|
||||
M: Tom Tucker <tom@opengridcomputing.com>
|
||||
M: Steve Wise <swise@opengridcomputing.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/infiniband/hw/amso1100/
|
||||
|
||||
ANALOG DEVICES INC AD9389B DRIVER
|
||||
M: Hans Verkuil <hans.verkuil@cisco.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
|
@ -929,17 +920,24 @@ M: Emilio López <emilio@elopez.com.ar>
|
|||
S: Maintained
|
||||
F: drivers/clk/sunxi/
|
||||
|
||||
ARM/Amlogic MesonX SoC support
|
||||
ARM/Amlogic Meson SoC support
|
||||
M: Carlo Caione <carlo@caione.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-meson@googlegroups.com
|
||||
W: http://linux-meson.com/
|
||||
S: Maintained
|
||||
F: drivers/media/rc/meson-ir.c
|
||||
N: meson[x68]
|
||||
F: arch/arm/mach-meson/
|
||||
F: arch/arm/boot/dts/meson*
|
||||
N: meson
|
||||
|
||||
ARM/Annapurna Labs ALPINE ARCHITECTURE
|
||||
M: Tsahee Zidenberg <tsahee@annapurnalabs.com>
|
||||
M: Antoine Tenart <antoine.tenart@free-electrons.com>
|
||||
S: Maintained
|
||||
F: arch/arm/mach-alpine/
|
||||
F: arch/arm/boot/dts/alpine*
|
||||
F: arch/arm64/boot/dts/al/
|
||||
F: drivers/*/*alpine*
|
||||
|
||||
ARM/ATMEL AT91RM9200, AT91SAM9 AND SAMA5 SOC SUPPORT
|
||||
M: Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
|
@ -967,6 +965,8 @@ M: Rob Herring <robh@kernel.org>
|
|||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/mach-highbank/
|
||||
F: arch/arm/boot/dts/highbank.dts
|
||||
F: arch/arm/boot/dts/ecx-*.dts*
|
||||
|
||||
ARM/CAVIUM NETWORKS CNS3XXX MACHINE SUPPORT
|
||||
M: Krzysztof Halasa <khalasa@piap.pl>
|
||||
|
@ -1042,6 +1042,7 @@ M: Barry Song <baohua@kernel.org>
|
|||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/prima2*
|
||||
F: arch/arm/mach-prima2/
|
||||
F: drivers/clk/sirf/
|
||||
F: drivers/clocksource/timer-prima2.c
|
||||
|
@ -1143,6 +1144,10 @@ W: http://www.hisilicon.com
|
|||
S: Supported
|
||||
T: git git://github.com/hisilicon/linux-hisi.git
|
||||
F: arch/arm/mach-hisi/
|
||||
F: arch/arm/boot/dts/hi3*
|
||||
F: arch/arm/boot/dts/hip*
|
||||
F: arch/arm/boot/dts/hisi*
|
||||
F: arch/arm64/boot/dts/hisilicon/
|
||||
|
||||
ARM/HP JORNADA 7XX MACHINE SUPPORT
|
||||
M: Kristoffer Ericson <kristoffer.ericson@gmail.com>
|
||||
|
@ -1219,6 +1224,7 @@ M: Santosh Shilimkar <ssantosh@kernel.org>
|
|||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/mach-keystone/
|
||||
F: arch/arm/boot/dts/k2*
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git
|
||||
|
||||
ARM/TEXAS INSTRUMENT KEYSTONE CLOCK FRAMEWORK
|
||||
|
@ -1287,6 +1293,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
|||
S: Maintained
|
||||
F: arch/arm/mach-berlin/
|
||||
F: arch/arm/boot/dts/berlin*
|
||||
F: arch/arm64/boot/dts/marvell/berlin*
|
||||
|
||||
|
||||
ARM/Marvell Dove/MV78xx0/Orion SOC support
|
||||
|
@ -1425,6 +1432,7 @@ S: Maintained
|
|||
F: arch/arm/boot/dts/qcom-*.dts
|
||||
F: arch/arm/boot/dts/qcom-*.dtsi
|
||||
F: arch/arm/mach-qcom/
|
||||
F: arch/arm64/boot/dts/qcom/*
|
||||
F: drivers/soc/qcom/
|
||||
F: drivers/tty/serial/msm_serial.h
|
||||
F: drivers/tty/serial/msm_serial.c
|
||||
|
@ -1441,8 +1449,8 @@ S: Maintained
|
|||
ARM/RENESAS ARM64 ARCHITECTURE
|
||||
M: Simon Horman <horms@verge.net.au>
|
||||
M: Magnus Damm <magnus.damm@gmail.com>
|
||||
L: linux-sh@vger.kernel.org
|
||||
Q: http://patchwork.kernel.org/project/linux-sh/list/
|
||||
L: linux-renesas-soc@vger.kernel.org
|
||||
Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git next
|
||||
S: Supported
|
||||
F: arch/arm64/boot/dts/renesas/
|
||||
|
@ -1484,6 +1492,8 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
|||
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/s3c*
|
||||
F: arch/arm/boot/dts/s5p*
|
||||
F: arch/arm/boot/dts/samsung*
|
||||
F: arch/arm/boot/dts/exynos*
|
||||
F: arch/arm64/boot/dts/exynos/
|
||||
F: arch/arm/plat-samsung/
|
||||
|
@ -1563,6 +1573,7 @@ S: Maintained
|
|||
F: arch/arm/mach-socfpga/
|
||||
F: arch/arm/boot/dts/socfpga*
|
||||
F: arch/arm/configs/socfpga_defconfig
|
||||
F: arch/arm64/boot/dts/altera/
|
||||
W: http://www.rocketboards.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git
|
||||
|
||||
|
@ -1716,7 +1727,7 @@ M: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
|
|||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/vexpress*
|
||||
F: arch/arm64/boot/dts/arm/vexpress*
|
||||
F: arch/arm64/boot/dts/arm/
|
||||
F: arch/arm/mach-vexpress/
|
||||
F: */*/vexpress*
|
||||
F: */*/*/vexpress*
|
||||
|
@ -2343,6 +2354,7 @@ F: arch/arm/mach-bcm/
|
|||
F: arch/arm/boot/dts/bcm113*
|
||||
F: arch/arm/boot/dts/bcm216*
|
||||
F: arch/arm/boot/dts/bcm281*
|
||||
F: arch/arm64/boot/dts/broadcom/
|
||||
F: arch/arm/configs/bcm_defconfig
|
||||
F: drivers/mmc/host/sdhci-bcm-kona.c
|
||||
F: drivers/clocksource/bcm_kona_timer.c
|
||||
|
@ -2357,14 +2369,6 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi.git
|
|||
S: Maintained
|
||||
N: bcm2835
|
||||
|
||||
BROADCOM BCM33XX MIPS ARCHITECTURE
|
||||
M: Kevin Cernekee <cernekee@gmail.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
S: Maintained
|
||||
F: arch/mips/bcm3384/*
|
||||
F: arch/mips/include/asm/mach-bcm3384/*
|
||||
F: arch/mips/kernel/*bmips*
|
||||
|
||||
BROADCOM BCM47XX MIPS ARCHITECTURE
|
||||
M: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
M: Rafał Miłecki <zajec5@gmail.com>
|
||||
|
@ -3445,9 +3449,8 @@ S: Maintained
|
|||
F: drivers/usb/dwc2/
|
||||
|
||||
DESIGNWARE USB3 DRD IP DRIVER
|
||||
M: Felipe Balbi <balbi@ti.com>
|
||||
M: Felipe Balbi <balbi@kernel.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
L: linux-omap@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
|
||||
S: Maintained
|
||||
F: drivers/usb/dwc3/
|
||||
|
@ -4184,13 +4187,6 @@ W: http://aeschi.ch.eu.org/efs/
|
|||
S: Orphan
|
||||
F: fs/efs/
|
||||
|
||||
EHCA (IBM GX bus InfiniBand adapter) DRIVER
|
||||
M: Hoang-Nam Nguyen <hnguyen@de.ibm.com>
|
||||
M: Christoph Raisch <raisch@de.ibm.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/infiniband/hw/ehca/
|
||||
|
||||
EHEA (IBM pSeries eHEA 10Gb ethernet adapter) DRIVER
|
||||
M: Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com>
|
||||
L: netdev@vger.kernel.org
|
||||
|
@ -5809,12 +5805,6 @@ M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar>
|
|||
S: Maintained
|
||||
F: net/ipv4/netfilter/ipt_MASQUERADE.c
|
||||
|
||||
IPATH DRIVER
|
||||
M: Mike Marciniszyn <infinipath@intel.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/staging/rdma/ipath/
|
||||
|
||||
IPMI SUBSYSTEM
|
||||
M: Corey Minyard <minyard@acm.org>
|
||||
L: openipmi-developer@lists.sourceforge.net (moderated for non-subscribers)
|
||||
|
@ -6144,7 +6134,7 @@ F: include/uapi/linux/sunrpc/
|
|||
|
||||
KERNEL SELFTEST FRAMEWORK
|
||||
M: Shuah Khan <shuahkh@osg.samsung.com>
|
||||
L: linux-api@vger.kernel.org
|
||||
L: linux-kselftest@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/shuah/linux-kselftest
|
||||
S: Maintained
|
||||
F: tools/testing/selftests
|
||||
|
@ -7370,7 +7360,7 @@ F: drivers/tty/isicom.c
|
|||
F: include/linux/isicom.h
|
||||
|
||||
MUSB MULTIPOINT HIGH SPEED DUAL-ROLE CONTROLLER
|
||||
M: Felipe Balbi <balbi@ti.com>
|
||||
M: Bin Liu <b-liu@ti.com>
|
||||
L: linux-usb@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
|
||||
S: Maintained
|
||||
|
@ -7702,13 +7692,13 @@ S: Maintained
|
|||
F: arch/nios2/
|
||||
|
||||
NOKIA N900 POWER SUPPLY DRIVERS
|
||||
M: Pali Rohár <pali.rohar@gmail.com>
|
||||
S: Maintained
|
||||
R: Pali Rohár <pali.rohar@gmail.com>
|
||||
F: include/linux/power/bq2415x_charger.h
|
||||
F: include/linux/power/bq27xxx_battery.h
|
||||
F: include/linux/power/isp1704_charger.h
|
||||
F: drivers/power/bq2415x_charger.c
|
||||
F: drivers/power/bq27xxx_battery.c
|
||||
F: drivers/power/bq27xxx_battery_i2c.c
|
||||
F: drivers/power/isp1704_charger.c
|
||||
F: drivers/power/rx51_battery.c
|
||||
|
||||
|
@ -7939,11 +7929,9 @@ F: drivers/media/platform/omap3isp/
|
|||
F: drivers/staging/media/omap4iss/
|
||||
|
||||
OMAP USB SUPPORT
|
||||
M: Felipe Balbi <balbi@ti.com>
|
||||
L: linux-usb@vger.kernel.org
|
||||
L: linux-omap@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/usb/*/*omap*
|
||||
F: arch/arm/*omap*/usb*
|
||||
|
||||
|
@ -8818,6 +8806,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
|||
T: git git://github.com/hzhuang1/linux.git
|
||||
T: git git://github.com/rjarzmik/linux.git
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/pxa*
|
||||
F: arch/arm/mach-pxa/
|
||||
F: drivers/dma/pxa*
|
||||
F: drivers/pcmcia/pxa2xx*
|
||||
|
@ -8847,6 +8836,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
|||
T: git git://github.com/hzhuang1/linux.git
|
||||
T: git git://git.linaro.org/people/ycmiao/pxa-linux.git
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/mmp*
|
||||
F: arch/arm/mach-mmp/
|
||||
|
||||
PXA MMCI DRIVER
|
||||
|
@ -9572,6 +9562,12 @@ M: Andreas Noever <andreas.noever@gmail.com>
|
|||
S: Maintained
|
||||
F: drivers/thunderbolt/
|
||||
|
||||
TI BQ27XXX POWER SUPPLY DRIVER
|
||||
R: Andrew F. Davis <afd@ti.com>
|
||||
F: include/linux/power/bq27xxx_battery.h
|
||||
F: drivers/power/bq27xxx_battery.c
|
||||
F: drivers/power/bq27xxx_battery_i2c.c
|
||||
|
||||
TIMEKEEPING, CLOCKSOURCE CORE, NTP, ALARMTIMER
|
||||
M: John Stultz <john.stultz@linaro.org>
|
||||
M: Thomas Gleixner <tglx@linutronix.de>
|
||||
|
@ -9793,10 +9789,11 @@ S: Supported
|
|||
F: drivers/scsi/be2iscsi/
|
||||
|
||||
Emulex 10Gbps NIC BE2, BE3-R, Lancer, Skyhawk-R DRIVER
|
||||
M: Sathya Perla <sathya.perla@avagotech.com>
|
||||
M: Ajit Khaparde <ajit.khaparde@avagotech.com>
|
||||
M: Padmanabh Ratnakar <padmanabh.ratnakar@avagotech.com>
|
||||
M: Sriharsha Basavapatna <sriharsha.basavapatna@avagotech.com>
|
||||
M: Sathya Perla <sathya.perla@broadcom.com>
|
||||
M: Ajit Khaparde <ajit.khaparde@broadcom.com>
|
||||
M: Padmanabh Ratnakar <padmanabh.ratnakar@broadcom.com>
|
||||
M: Sriharsha Basavapatna <sriharsha.basavapatna@broadcom.com>
|
||||
M: Somnath Kotur <somnath.kotur@broadcom.com>
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://www.emulex.com
|
||||
S: Supported
|
||||
|
@ -10158,6 +10155,7 @@ S: Supported
|
|||
F: drivers/media/pci/solo6x10/
|
||||
|
||||
SOFTWARE RAID (Multiple Disks) SUPPORT
|
||||
M: Shaohua Li <shli@kernel.org>
|
||||
L: linux-raid@vger.kernel.org
|
||||
T: git git://neil.brown.name/md
|
||||
S: Supported
|
||||
|
@ -10173,7 +10171,7 @@ F: drivers/net/ethernet/natsemi/sonic.*
|
|||
|
||||
SONICS SILICON BACKPLANE DRIVER (SSB)
|
||||
M: Michael Buesch <m@bues.ch>
|
||||
L: netdev@vger.kernel.org
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/ssb/
|
||||
F: include/linux/ssb/
|
||||
|
@ -10291,6 +10289,7 @@ L: spear-devel@list.st.com
|
|||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
W: http://www.st.com/spear
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/spear*
|
||||
F: arch/arm/mach-spear/
|
||||
|
||||
SPEAR CLOCK FRAMEWORK SUPPORT
|
||||
|
@ -11318,7 +11317,7 @@ F: Documentation/usb/ehci.txt
|
|||
F: drivers/usb/host/ehci*
|
||||
|
||||
USB GADGET/PERIPHERAL SUBSYSTEM
|
||||
M: Felipe Balbi <balbi@ti.com>
|
||||
M: Felipe Balbi <balbi@kernel.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
W: http://www.linux-usb.org/gadget
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
|
||||
|
@ -11394,7 +11393,7 @@ S: Maintained
|
|||
F: drivers/net/usb/pegasus.*
|
||||
|
||||
USB PHY LAYER
|
||||
M: Felipe Balbi <balbi@ti.com>
|
||||
M: Felipe Balbi <balbi@kernel.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
|
||||
S: Maintained
|
||||
|
@ -12024,7 +12023,6 @@ F: arch/arm64/xen/
|
|||
F: arch/arm64/include/asm/xen/
|
||||
|
||||
XEN NETWORK BACKEND DRIVER
|
||||
M: Ian Campbell <ian.campbell@citrix.com>
|
||||
M: Wei Liu <wei.liu2@citrix.com>
|
||||
L: xen-devel@lists.xenproject.org (moderated for non-subscribers)
|
||||
L: netdev@vger.kernel.org
|
||||
|
@ -12133,7 +12131,7 @@ F: drivers/net/hamradio/*scc.c
|
|||
F: drivers/net/hamradio/z8530.h
|
||||
|
||||
ZBUD COMPRESSED PAGE ALLOCATOR
|
||||
M: Seth Jennings <sjennings@variantweb.net>
|
||||
M: Seth Jennings <sjenning@redhat.com>
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
F: mm/zbud.c
|
||||
|
@ -12188,7 +12186,7 @@ F: include/linux/zsmalloc.h
|
|||
F: Documentation/vm/zsmalloc.txt
|
||||
|
||||
ZSWAP COMPRESSED SWAP CACHING
|
||||
M: Seth Jennings <sjennings@variantweb.net>
|
||||
M: Seth Jennings <sjenning@redhat.com>
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
F: mm/zswap.c
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 5
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc6
|
||||
NAME = Blurry Fish Butt
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -12,8 +12,6 @@ config ARC
|
|||
select BUILDTIME_EXTABLE_SORT
|
||||
select COMMON_CLK
|
||||
select CLONE_BACKWARDS
|
||||
# ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
|
||||
select DEVTMPFS if !INITRAMFS_SOURCE=""
|
||||
select GENERIC_ATOMIC64
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select GENERIC_FIND_FIRST_BIT
|
||||
|
@ -275,14 +273,6 @@ config ARC_DCCM_BASE
|
|||
default "0xA0000000"
|
||||
depends on ARC_HAS_DCCM
|
||||
|
||||
config ARC_HAS_HW_MPY
|
||||
bool "Use Hardware Multiplier (Normal or Faster XMAC)"
|
||||
default y
|
||||
help
|
||||
Influences how gcc generates code for MPY operations.
|
||||
If enabled, MPYxx insns are generated, provided by Standard/XMAC
|
||||
Multipler. Otherwise software multipy lib is used
|
||||
|
||||
choice
|
||||
prompt "MMU Version"
|
||||
default ARC_MMU_V3 if ARC_CPU_770
|
||||
|
@ -338,6 +328,19 @@ config ARC_PAGE_SIZE_4K
|
|||
|
||||
endchoice
|
||||
|
||||
choice
|
||||
prompt "MMU Super Page Size"
|
||||
depends on ISA_ARCV2 && TRANSPARENT_HUGEPAGE
|
||||
default ARC_HUGEPAGE_2M
|
||||
|
||||
config ARC_HUGEPAGE_2M
|
||||
bool "2MB"
|
||||
|
||||
config ARC_HUGEPAGE_16M
|
||||
bool "16MB"
|
||||
|
||||
endchoice
|
||||
|
||||
if ISA_ARCOMPACT
|
||||
|
||||
config ARC_COMPACT_IRQ_LEVELS
|
||||
|
@ -410,7 +413,7 @@ config ARC_HAS_RTC
|
|||
default n
|
||||
depends on !SMP
|
||||
|
||||
config ARC_HAS_GRTC
|
||||
config ARC_HAS_GFRC
|
||||
bool "SMP synchronized 64-bit cycle counter"
|
||||
default y
|
||||
depends on SMP
|
||||
|
@ -529,14 +532,6 @@ config ARC_DBG_TLB_MISS_COUNT
|
|||
Counts number of I and D TLB Misses and exports them via Debugfs
|
||||
The counters can be cleared via Debugfs as well
|
||||
|
||||
if SMP
|
||||
|
||||
config ARC_IPI_DBG
|
||||
bool "Debug Inter Core interrupts"
|
||||
default n
|
||||
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
config ARC_UBOOT_SUPPORT
|
||||
|
@ -566,6 +561,12 @@ endmenu
|
|||
endmenu # "ARC Architecture Configuration"
|
||||
|
||||
source "mm/Kconfig"
|
||||
|
||||
config FORCE_MAX_ZONEORDER
|
||||
int "Maximum zone order"
|
||||
default "12" if ARC_HUGEPAGE_16M
|
||||
default "11"
|
||||
|
||||
source "net/Kconfig"
|
||||
source "drivers/Kconfig"
|
||||
source "fs/Kconfig"
|
||||
|
|
|
@ -74,10 +74,6 @@ ldflags-$(CONFIG_CPU_BIG_ENDIAN) += -EB
|
|||
# --build-id w/o "-marclinux". Default arc-elf32-ld is OK
|
||||
ldflags-$(upto_gcc44) += -marclinux
|
||||
|
||||
ifndef CONFIG_ARC_HAS_HW_MPY
|
||||
cflags-y += -mno-mpy
|
||||
endif
|
||||
|
||||
LIBGCC := $(shell $(CC) $(cflags-y) --print-libgcc-file-name)
|
||||
|
||||
# Modules with short calls might break for calls into builtin-kernel
|
||||
|
|
|
@ -39,6 +39,7 @@ CONFIG_IP_PNP_RARP=y
|
|||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FIRMWARE_IN_KERNEL is not set
|
||||
|
@ -73,7 +74,6 @@ CONFIG_I2C_CHARDEV=y
|
|||
CONFIG_I2C_DESIGNWARE_PLATFORM=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_FB=y
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
|
||||
CONFIG_LOGO=y
|
||||
|
@ -91,12 +91,10 @@ CONFIG_MMC_SDHCI_PLTFM=y
|
|||
CONFIG_MMC_DW=y
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_NTFS_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
|
|
|
@ -39,14 +39,10 @@ CONFIG_IP_PNP_RARP=y
|
|||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FIRMWARE_IN_KERNEL is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_AXS=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_NETDEVICES=y
|
||||
|
@ -78,14 +74,12 @@ CONFIG_I2C_CHARDEV=y
|
|||
CONFIG_I2C_DESIGNWARE_PLATFORM=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_FB=y
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
|
||||
CONFIG_LOGO=y
|
||||
# CONFIG_LOGO_LINUX_MONO is not set
|
||||
# CONFIG_LOGO_LINUX_VGA16 is not set
|
||||
# CONFIG_LOGO_LINUX_CLUT224 is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_HCD_PLATFORM=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
|
@ -97,12 +91,10 @@ CONFIG_MMC_SDHCI_PLTFM=y
|
|||
CONFIG_MMC_DW=y
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_NTFS_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
|
|
|
@ -40,14 +40,10 @@ CONFIG_IP_PNP_RARP=y
|
|||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FIRMWARE_IN_KERNEL is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_AXS=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_NETDEVICES=y
|
||||
|
@ -79,14 +75,12 @@ CONFIG_I2C_CHARDEV=y
|
|||
CONFIG_I2C_DESIGNWARE_PLATFORM=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_FB=y
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
|
||||
CONFIG_LOGO=y
|
||||
# CONFIG_LOGO_LINUX_MONO is not set
|
||||
# CONFIG_LOGO_LINUX_VGA16 is not set
|
||||
# CONFIG_LOGO_LINUX_CLUT224 is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_HCD_PLATFORM=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
|
@ -98,12 +92,10 @@ CONFIG_MMC_SDHCI_PLTFM=y
|
|||
CONFIG_MMC_DW=y
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_NTFS_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
|
|
|
@ -4,6 +4,7 @@ CONFIG_DEFAULT_HOSTNAME="ARCLinux"
|
|||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
|
@ -26,7 +27,6 @@ CONFIG_ARC_PLAT_SIM=y
|
|||
CONFIG_ARC_BUILTIN_DTB_NAME="nsim_700"
|
||||
CONFIG_PREEMPT=y
|
||||
# CONFIG_COMPACTION is not set
|
||||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
|
@ -34,6 +34,7 @@ CONFIG_UNIX_DIAG=y
|
|||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FIRMWARE_IN_KERNEL is not set
|
||||
|
@ -51,7 +52,6 @@ CONFIG_SERIAL_ARC=y
|
|||
CONFIG_SERIAL_ARC_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
# CONFIG_HID is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
|
@ -63,4 +63,3 @@ CONFIG_NFS_FS=y
|
|||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
# CONFIG_ENABLE_MUST_CHECK is not set
|
||||
# CONFIG_DEBUG_PREEMPT is not set
|
||||
CONFIG_XZ_DEC=y
|
||||
|
|
|
@ -35,6 +35,7 @@ CONFIG_UNIX_DIAG=y
|
|||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FIRMWARE_IN_KERNEL is not set
|
||||
|
@ -49,7 +50,6 @@ CONFIG_SERIAL_ARC=y
|
|||
CONFIG_SERIAL_ARC_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
# CONFIG_HID is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
|
@ -61,4 +61,3 @@ CONFIG_NFS_FS=y
|
|||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
# CONFIG_ENABLE_MUST_CHECK is not set
|
||||
# CONFIG_DEBUG_PREEMPT is not set
|
||||
CONFIG_XZ_DEC=y
|
||||
|
|
|
@ -2,6 +2,7 @@ CONFIG_CROSS_COMPILE="arc-linux-"
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
|
||||
# CONFIG_SWAP is not set
|
||||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
|
@ -21,13 +22,11 @@ CONFIG_MODULES=y
|
|||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARC_PLAT_SIM=y
|
||||
CONFIG_ARC_BOARD_ML509=y
|
||||
CONFIG_ISA_ARCV2=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="nsim_hs_idu"
|
||||
CONFIG_PREEMPT=y
|
||||
# CONFIG_COMPACTION is not set
|
||||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
|
@ -35,6 +34,7 @@ CONFIG_UNIX_DIAG=y
|
|||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FIRMWARE_IN_KERNEL is not set
|
||||
|
@ -49,7 +49,6 @@ CONFIG_SERIAL_ARC=y
|
|||
CONFIG_SERIAL_ARC_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
# CONFIG_HID is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
|
@ -60,4 +59,3 @@ CONFIG_TMPFS=y
|
|||
CONFIG_NFS_FS=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
# CONFIG_ENABLE_MUST_CHECK is not set
|
||||
CONFIG_XZ_DEC=y
|
||||
|
|
|
@ -33,6 +33,7 @@ CONFIG_UNIX_DIAG=y
|
|||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FIRMWARE_IN_KERNEL is not set
|
||||
|
@ -58,7 +59,6 @@ CONFIG_SERIAL_OF_PLATFORM=y
|
|||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_FB=y
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_LOGO=y
|
||||
# CONFIG_HID is not set
|
||||
|
|
|
@ -34,12 +34,12 @@ CONFIG_UNIX_DIAG=y
|
|||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FIRMWARE_IN_KERNEL is not set
|
||||
# CONFIG_BLK_DEV is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_NET_OSCI_LAN=y
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
# CONFIG_MOUSE_PS2_ALPS is not set
|
||||
# CONFIG_MOUSE_PS2_LOGIPS2PP is not set
|
||||
|
@ -58,7 +58,6 @@ CONFIG_SERIAL_OF_PLATFORM=y
|
|||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_FB=y
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_LOGO=y
|
||||
# CONFIG_HID is not set
|
||||
|
|
|
@ -2,6 +2,7 @@ CONFIG_CROSS_COMPILE="arc-linux-"
|
|||
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_IKCONFIG=y
|
||||
|
@ -18,15 +19,11 @@ CONFIG_MODULES=y
|
|||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARC_PLAT_SIM=y
|
||||
CONFIG_ARC_BOARD_ML509=y
|
||||
CONFIG_ISA_ARCV2=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_ARC_HAS_LL64=y
|
||||
# CONFIG_ARC_HAS_RTSC is not set
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci_hs_idu"
|
||||
CONFIG_PREEMPT=y
|
||||
# CONFIG_COMPACTION is not set
|
||||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_PACKET_DIAG=y
|
||||
|
@ -40,6 +37,7 @@ CONFIG_INET=y
|
|||
# CONFIG_INET_LRO is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FIRMWARE_IN_KERNEL is not set
|
||||
|
@ -56,14 +54,11 @@ CONFIG_NETDEVICES=y
|
|||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_NET_OSCI_LAN=y
|
||||
# CONFIG_WLAN is not set
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
CONFIG_MOUSE_PS2_TOUCHKIT=y
|
||||
# CONFIG_SERIO_SERPORT is not set
|
||||
CONFIG_SERIO_LIBPS2=y
|
||||
CONFIG_SERIO_ARC_PS2=y
|
||||
CONFIG_VT_HW_CONSOLE_BINDING=y
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
# CONFIG_DEVKMEM is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
|
@ -75,9 +70,6 @@ CONFIG_SERIAL_OF_PLATFORM=y
|
|||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_FB=y
|
||||
CONFIG_ARCPGU_RGB888=y
|
||||
CONFIG_ARCPGU_DISPTYPE=0
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_LOGO=y
|
||||
# CONFIG_HID is not set
|
||||
|
|
|
@ -3,6 +3,7 @@ CONFIG_CROSS_COMPILE="arc-linux-"
|
|||
CONFIG_DEFAULT_HOSTNAME="tb10x"
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
CONFIG_BSD_PROCESS_ACCT_V3=y
|
||||
|
@ -26,12 +27,10 @@ CONFIG_MODULE_UNLOAD=y
|
|||
# CONFIG_BLOCK is not set
|
||||
CONFIG_ARC_PLAT_TB10X=y
|
||||
CONFIG_ARC_CACHE_LINE_SHIFT=5
|
||||
CONFIG_ARC_STACK_NONEXEC=y
|
||||
CONFIG_HZ=250
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="abilis_tb100_dvk"
|
||||
CONFIG_PREEMPT_VOLUNTARY=y
|
||||
# CONFIG_COMPACTION is not set
|
||||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
|
@ -44,8 +43,8 @@ CONFIG_IP_MULTICAST=y
|
|||
# CONFIG_INET_DIAG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
# CONFIG_FIRMWARE_IN_KERNEL is not set
|
||||
CONFIG_PROC_DEVICETREE=y
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_NET_CADENCE is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
|
@ -55,9 +54,6 @@ CONFIG_NETDEVICES=y
|
|||
# CONFIG_NET_VENDOR_NATSEMI is not set
|
||||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
CONFIG_STMMAC_ETH=y
|
||||
CONFIG_STMMAC_DEBUG_FS=y
|
||||
CONFIG_STMMAC_DA=y
|
||||
CONFIG_STMMAC_CHAINED=y
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
# CONFIG_WLAN is not set
|
||||
# CONFIG_INPUT is not set
|
||||
|
@ -91,7 +87,6 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
|
|||
CONFIG_LEDS_TRIGGER_TRANSIENT=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DW_DMAC=y
|
||||
CONFIG_NET_DMA=y
|
||||
CONFIG_ASYNC_TX_DMA=y
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
# CONFIG_DNOTIFY is not set
|
||||
|
@ -100,17 +95,16 @@ CONFIG_TMPFS=y
|
|||
CONFIG_CONFIGFS_FS=y
|
||||
# CONFIG_MISC_FILESYSTEMS is not set
|
||||
# CONFIG_NETWORK_FILESYSTEMS is not set
|
||||
CONFIG_DEBUG_INFO=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_HEADERS_CHECK=y
|
||||
CONFIG_DEBUG_SECTION_MISMATCH=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DEBUG_MEMORY_INIT=y
|
||||
CONFIG_DEBUG_STACKOVERFLOW=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
CONFIG_SCHEDSTATS=y
|
||||
CONFIG_TIMER_STATS=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_MEMORY_INIT=y
|
||||
CONFIG_DEBUG_STACKOVERFLOW=y
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
|
|
|
@ -16,7 +16,7 @@ CONFIG_ARC_PLAT_AXS10X=y
|
|||
CONFIG_AXS103=y
|
||||
CONFIG_ISA_ARCV2=y
|
||||
CONFIG_SMP=y
|
||||
# CONFIG_ARC_HAS_GRTC is not set
|
||||
# CONFIG_ARC_HAS_GFRC is not set
|
||||
CONFIG_ARC_UBOOT_SUPPORT=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="vdk_hs38_smp"
|
||||
CONFIG_PREEMPT=y
|
||||
|
|
|
@ -10,7 +10,8 @@
|
|||
#define _ASM_ARC_ARCREGS_H
|
||||
|
||||
/* Build Configuration Registers */
|
||||
#define ARC_REG_DCCMBASE_BCR 0x61 /* DCCM Base Addr */
|
||||
#define ARC_REG_AUX_DCCM 0x18 /* DCCM Base Addr ARCv2 */
|
||||
#define ARC_REG_DCCM_BASE_BUILD 0x61 /* DCCM Base Addr ARCompact */
|
||||
#define ARC_REG_CRC_BCR 0x62
|
||||
#define ARC_REG_VECBASE_BCR 0x68
|
||||
#define ARC_REG_PERIBASE_BCR 0x69
|
||||
|
@ -18,10 +19,10 @@
|
|||
#define ARC_REG_DPFP_BCR 0x6C /* ARCompact: Dbl Precision FPU */
|
||||
#define ARC_REG_FP_V2_BCR 0xc8 /* ARCv2 FPU */
|
||||
#define ARC_REG_SLC_BCR 0xce
|
||||
#define ARC_REG_DCCM_BCR 0x74 /* DCCM Present + SZ */
|
||||
#define ARC_REG_DCCM_BUILD 0x74 /* DCCM size (common) */
|
||||
#define ARC_REG_TIMERS_BCR 0x75
|
||||
#define ARC_REG_AP_BCR 0x76
|
||||
#define ARC_REG_ICCM_BCR 0x78
|
||||
#define ARC_REG_ICCM_BUILD 0x78 /* ICCM size (common) */
|
||||
#define ARC_REG_XY_MEM_BCR 0x79
|
||||
#define ARC_REG_MAC_BCR 0x7a
|
||||
#define ARC_REG_MUL_BCR 0x7b
|
||||
|
@ -36,6 +37,7 @@
|
|||
#define ARC_REG_IRQ_BCR 0xF3
|
||||
#define ARC_REG_SMART_BCR 0xFF
|
||||
#define ARC_REG_CLUSTER_BCR 0xcf
|
||||
#define ARC_REG_AUX_ICCM 0x208 /* ICCM Base Addr (ARCv2) */
|
||||
|
||||
/* status32 Bits Positions */
|
||||
#define STATUS_AE_BIT 5 /* Exception active */
|
||||
|
@ -246,7 +248,7 @@ struct bcr_perip {
|
|||
#endif
|
||||
};
|
||||
|
||||
struct bcr_iccm {
|
||||
struct bcr_iccm_arcompact {
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
unsigned int base:16, pad:5, sz:3, ver:8;
|
||||
#else
|
||||
|
@ -254,17 +256,15 @@ struct bcr_iccm {
|
|||
#endif
|
||||
};
|
||||
|
||||
/* DCCM Base Address Register: ARC_REG_DCCMBASE_BCR */
|
||||
struct bcr_dccm_base {
|
||||
struct bcr_iccm_arcv2 {
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
unsigned int addr:24, ver:8;
|
||||
unsigned int pad:8, sz11:4, sz01:4, sz10:4, sz00:4, ver:8;
|
||||
#else
|
||||
unsigned int ver:8, addr:24;
|
||||
unsigned int ver:8, sz00:4, sz10:4, sz01:4, sz11:4, pad:8;
|
||||
#endif
|
||||
};
|
||||
|
||||
/* DCCM RAM Configuration Register: ARC_REG_DCCM_BCR */
|
||||
struct bcr_dccm {
|
||||
struct bcr_dccm_arcompact {
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
unsigned int res:21, sz:3, ver:8;
|
||||
#else
|
||||
|
@ -272,6 +272,14 @@ struct bcr_dccm {
|
|||
#endif
|
||||
};
|
||||
|
||||
struct bcr_dccm_arcv2 {
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
unsigned int pad2:12, cyc:3, pad1:1, sz1:4, sz0:4, ver:8;
|
||||
#else
|
||||
unsigned int ver:8, sz0:4, sz1:4, pad1:1, cyc:3, pad2:12;
|
||||
#endif
|
||||
};
|
||||
|
||||
/* ARCompact: Both SP and DP FPU BCRs have same format */
|
||||
struct bcr_fp_arcompact {
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
|
@ -315,9 +323,9 @@ struct bcr_bpu_arcv2 {
|
|||
|
||||
struct bcr_generic {
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
unsigned int pad:24, ver:8;
|
||||
unsigned int info:24, ver:8;
|
||||
#else
|
||||
unsigned int ver:8, pad:24;
|
||||
unsigned int ver:8, info:24;
|
||||
#endif
|
||||
};
|
||||
|
||||
|
@ -349,14 +357,13 @@ struct cpuinfo_arc {
|
|||
struct cpuinfo_arc_bpu bpu;
|
||||
struct bcr_identity core;
|
||||
struct bcr_isa isa;
|
||||
struct bcr_timer timers;
|
||||
unsigned int vec_base;
|
||||
struct cpuinfo_arc_ccm iccm, dccm;
|
||||
struct {
|
||||
unsigned int swap:1, norm:1, minmax:1, barrel:1, crc:1, pad1:3,
|
||||
fpu_sp:1, fpu_dp:1, pad2:6,
|
||||
debug:1, ap:1, smart:1, rtt:1, pad3:4,
|
||||
pad4:8;
|
||||
timer0:1, timer1:1, rtc:1, gfrc:1, pad4:4;
|
||||
} extn;
|
||||
struct bcr_mpy extn_mpy;
|
||||
struct bcr_extn_xymem extn_xymem;
|
||||
|
|
|
@ -16,11 +16,9 @@
|
|||
#ifdef CONFIG_ISA_ARCOMPACT
|
||||
#define TIMER0_IRQ 3
|
||||
#define TIMER1_IRQ 4
|
||||
#define IPI_IRQ (NR_CPU_IRQS-1) /* dummy to enable SMP build for up hardware */
|
||||
#else
|
||||
#define TIMER0_IRQ 16
|
||||
#define TIMER1_IRQ 17
|
||||
#define IPI_IRQ 19
|
||||
#endif
|
||||
|
||||
#include <linux/interrupt.h>
|
||||
|
|
|
@ -22,6 +22,7 @@
|
|||
#define AUX_IRQ_CTRL 0x00E
|
||||
#define AUX_IRQ_ACT 0x043 /* Active Intr across all levels */
|
||||
#define AUX_IRQ_LVL_PEND 0x200 /* Pending Intr across all levels */
|
||||
#define AUX_IRQ_HINT 0x201 /* For generating Soft Interrupts */
|
||||
#define AUX_IRQ_PRIORITY 0x206
|
||||
#define ICAUSE 0x40a
|
||||
#define AUX_IRQ_SELECT 0x40b
|
||||
|
@ -30,8 +31,11 @@
|
|||
/* Was Intr taken in User Mode */
|
||||
#define AUX_IRQ_ACT_BIT_U 31
|
||||
|
||||
/* 0 is highest level, but taken by FIRQs, if present in design */
|
||||
#define ARCV2_IRQ_DEF_PRIO 0
|
||||
/*
|
||||
* User space should be interruptable even by lowest prio interrupt
|
||||
* Safe even if actual interrupt priorities is fewer or even one
|
||||
*/
|
||||
#define ARCV2_IRQ_DEF_PRIO 15
|
||||
|
||||
/* seed value for status register */
|
||||
#define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | STATUS_AD_MASK | \
|
||||
|
@ -112,6 +116,16 @@ static inline int arch_irqs_disabled(void)
|
|||
return arch_irqs_disabled_flags(arch_local_save_flags());
|
||||
}
|
||||
|
||||
static inline void arc_softirq_trigger(int irq)
|
||||
{
|
||||
write_aux_reg(AUX_IRQ_HINT, irq);
|
||||
}
|
||||
|
||||
static inline void arc_softirq_clear(int irq)
|
||||
{
|
||||
write_aux_reg(AUX_IRQ_HINT, 0);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
.macro IRQ_DISABLE scratch
|
||||
|
|
|
@ -39,8 +39,8 @@ struct mcip_cmd {
|
|||
#define CMD_DEBUG_SET_MASK 0x34
|
||||
#define CMD_DEBUG_SET_SELECT 0x36
|
||||
|
||||
#define CMD_GRTC_READ_LO 0x42
|
||||
#define CMD_GRTC_READ_HI 0x43
|
||||
#define CMD_GFRC_READ_LO 0x42
|
||||
#define CMD_GFRC_READ_HI 0x43
|
||||
|
||||
#define CMD_IDU_ENABLE 0x71
|
||||
#define CMD_IDU_DISABLE 0x72
|
||||
|
|
|
@ -179,37 +179,44 @@
|
|||
#define __S111 PAGE_U_X_W_R
|
||||
|
||||
/****************************************************************
|
||||
* Page Table Lookup split
|
||||
* 2 tier (PGD:PTE) software page walker
|
||||
*
|
||||
* We implement 2 tier paging and since this is all software, we are free
|
||||
* to customize the span of a PGD / PTE entry to suit us
|
||||
*
|
||||
* 32 bit virtual address
|
||||
* [31] 32 bit virtual address [0]
|
||||
* -------------------------------------------------------
|
||||
* | BITS_FOR_PGD | BITS_FOR_PTE | BITS_IN_PAGE |
|
||||
* | | <------------ PGDIR_SHIFT ----------> |
|
||||
* | | |
|
||||
* | BITS_FOR_PGD | BITS_FOR_PTE | <-- PAGE_SHIFT --> |
|
||||
* -------------------------------------------------------
|
||||
* | | |
|
||||
* | | --> off in page frame
|
||||
* | |
|
||||
* | ---> index into Page Table
|
||||
* |
|
||||
* ----> index into Page Directory
|
||||
*
|
||||
* In a single page size configuration, only PAGE_SHIFT is fixed
|
||||
* So both PGD and PTE sizing can be tweaked
|
||||
* e.g. 8K page (PAGE_SHIFT 13) can have
|
||||
* - PGDIR_SHIFT 21 -> 11:8:13 address split
|
||||
* - PGDIR_SHIFT 24 -> 8:11:13 address split
|
||||
*
|
||||
* If Super Page is configured, PGDIR_SHIFT becomes fixed too,
|
||||
* so the sizing flexibility is gone.
|
||||
*/
|
||||
|
||||
#define BITS_IN_PAGE PAGE_SHIFT
|
||||
|
||||
/* Optimal Sizing of Pg Tbl - based on MMU page size */
|
||||
#if defined(CONFIG_ARC_PAGE_SIZE_8K)
|
||||
#define BITS_FOR_PTE 8 /* 11:8:13 */
|
||||
#elif defined(CONFIG_ARC_PAGE_SIZE_16K)
|
||||
#define BITS_FOR_PTE 8 /* 10:8:14 */
|
||||
#elif defined(CONFIG_ARC_PAGE_SIZE_4K)
|
||||
#define BITS_FOR_PTE 9 /* 11:9:12 */
|
||||
#if defined(CONFIG_ARC_HUGEPAGE_16M)
|
||||
#define PGDIR_SHIFT 24
|
||||
#elif defined(CONFIG_ARC_HUGEPAGE_2M)
|
||||
#define PGDIR_SHIFT 21
|
||||
#else
|
||||
/*
|
||||
* Only Normal page support so "hackable" (see comment above)
|
||||
* Default value provides 11:8:13 (8K), 11:9:12 (4K)
|
||||
*/
|
||||
#define PGDIR_SHIFT 21
|
||||
#endif
|
||||
|
||||
#define BITS_FOR_PGD (32 - BITS_FOR_PTE - BITS_IN_PAGE)
|
||||
#define BITS_FOR_PTE (PGDIR_SHIFT - PAGE_SHIFT)
|
||||
#define BITS_FOR_PGD (32 - PGDIR_SHIFT)
|
||||
|
||||
#define PGDIR_SHIFT (32 - BITS_FOR_PGD)
|
||||
#define PGDIR_SIZE (1UL << PGDIR_SHIFT) /* vaddr span, not PDG sz */
|
||||
#define PGDIR_MASK (~(PGDIR_SIZE-1))
|
||||
|
||||
|
|
|
@ -45,11 +45,12 @@ VECTOR reserved ; Reserved slots
|
|||
VECTOR handle_interrupt ; (16) Timer0
|
||||
VECTOR handle_interrupt ; unused (Timer1)
|
||||
VECTOR handle_interrupt ; unused (WDT)
|
||||
VECTOR handle_interrupt ; (19) ICI (inter core interrupt)
|
||||
VECTOR handle_interrupt
|
||||
VECTOR handle_interrupt
|
||||
VECTOR handle_interrupt
|
||||
VECTOR handle_interrupt ; (23) End of fixed IRQs
|
||||
VECTOR handle_interrupt ; (19) Inter core Interrupt (IPI)
|
||||
VECTOR handle_interrupt ; (20) perf Interrupt
|
||||
VECTOR handle_interrupt ; (21) Software Triggered Intr (Self IPI)
|
||||
VECTOR handle_interrupt ; unused
|
||||
VECTOR handle_interrupt ; (23) unused
|
||||
# End of fixed IRQs
|
||||
|
||||
.rept CONFIG_ARC_NUMBER_OF_INTERRUPTS - 8
|
||||
VECTOR handle_interrupt
|
||||
|
@ -211,7 +212,11 @@ debug_marker_syscall:
|
|||
; (since IRQ NOT allowed in DS in ARCv2, this can only happen if orig
|
||||
; entry was via Exception in DS which got preempted in kernel).
|
||||
;
|
||||
; IRQ RTIE won't reliably restore DE bit and/or BTA, needs handling
|
||||
; IRQ RTIE won't reliably restore DE bit and/or BTA, needs workaround
|
||||
;
|
||||
; Solution is return from Intr w/o any delay slot quirks into a kernel trampoline
|
||||
; and from pure kernel mode return to delay slot which handles DS bit/BTA correctly
|
||||
|
||||
.Lintr_ret_to_delay_slot:
|
||||
debug_marker_ds:
|
||||
|
||||
|
@ -222,18 +227,23 @@ debug_marker_ds:
|
|||
ld r2, [sp, PT_ret]
|
||||
ld r3, [sp, PT_status32]
|
||||
|
||||
; STAT32 for Int return created from scratch
|
||||
; (No delay dlot, disable Further intr in trampoline)
|
||||
|
||||
bic r0, r3, STATUS_U_MASK|STATUS_DE_MASK|STATUS_IE_MASK|STATUS_L_MASK
|
||||
st r0, [sp, PT_status32]
|
||||
|
||||
mov r1, .Lintr_ret_to_delay_slot_2
|
||||
st r1, [sp, PT_ret]
|
||||
|
||||
; Orig exception PC/STAT32 safekept @orig_r0 and @event stack slots
|
||||
st r2, [sp, 0]
|
||||
st r3, [sp, 4]
|
||||
|
||||
b .Lisr_ret_fast_path
|
||||
|
||||
.Lintr_ret_to_delay_slot_2:
|
||||
; Trampoline to restore orig exception PC/STAT32/BTA/AUX_USER_SP
|
||||
sub sp, sp, SZ_PT_REGS
|
||||
st r9, [sp, -4]
|
||||
|
||||
|
@ -243,11 +253,19 @@ debug_marker_ds:
|
|||
ld r9, [sp, 4]
|
||||
sr r9, [erstatus]
|
||||
|
||||
; restore AUX_USER_SP if returning to U mode
|
||||
bbit0 r9, STATUS_U_BIT, 1f
|
||||
ld r9, [sp, PT_sp]
|
||||
sr r9, [AUX_USER_SP]
|
||||
|
||||
1:
|
||||
ld r9, [sp, 8]
|
||||
sr r9, [erbta]
|
||||
|
||||
ld r9, [sp, -4]
|
||||
add sp, sp, SZ_PT_REGS
|
||||
|
||||
; return from pure kernel mode to delay slot
|
||||
rtie
|
||||
|
||||
END(ret_from_exception)
|
||||
|
|
|
@ -14,6 +14,8 @@
|
|||
#include <linux/irqchip.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
static int irq_prio;
|
||||
|
||||
/*
|
||||
* Early Hardware specific Interrupt setup
|
||||
* -Called very early (start_kernel -> setup_arch -> setup_processor)
|
||||
|
@ -24,6 +26,14 @@ void arc_init_IRQ(void)
|
|||
{
|
||||
unsigned int tmp;
|
||||
|
||||
struct irq_build {
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
unsigned int pad:3, firq:1, prio:4, exts:8, irqs:8, ver:8;
|
||||
#else
|
||||
unsigned int ver:8, irqs:8, exts:8, prio:4, firq:1, pad:3;
|
||||
#endif
|
||||
} irq_bcr;
|
||||
|
||||
struct aux_irq_ctrl {
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
unsigned int res3:18, save_idx_regs:1, res2:1,
|
||||
|
@ -46,28 +56,25 @@ void arc_init_IRQ(void)
|
|||
|
||||
WRITE_AUX(AUX_IRQ_CTRL, ictrl);
|
||||
|
||||
/* setup status32, don't enable intr yet as kernel doesn't want */
|
||||
tmp = read_aux_reg(0xa);
|
||||
tmp |= ISA_INIT_STATUS_BITS;
|
||||
tmp &= ~STATUS_IE_MASK;
|
||||
asm volatile("flag %0 \n"::"r"(tmp));
|
||||
|
||||
/*
|
||||
* ARCv2 core intc provides multiple interrupt priorities (upto 16).
|
||||
* Typical builds though have only two levels (0-high, 1-low)
|
||||
* Linux by default uses lower prio 1 for most irqs, reserving 0 for
|
||||
* NMI style interrupts in future (say perf)
|
||||
*
|
||||
* Read the intc BCR to confirm that Linux default priority is avail
|
||||
* in h/w
|
||||
*
|
||||
* Note:
|
||||
* IRQ_BCR[27..24] contains N-1 (for N priority levels) and prio level
|
||||
* is 0 based.
|
||||
*/
|
||||
tmp = (read_aux_reg(ARC_REG_IRQ_BCR) >> 24 ) & 0xF;
|
||||
if (ARCV2_IRQ_DEF_PRIO > tmp)
|
||||
panic("Linux default irq prio incorrect\n");
|
||||
|
||||
READ_BCR(ARC_REG_IRQ_BCR, irq_bcr);
|
||||
|
||||
irq_prio = irq_bcr.prio; /* Encoded as N-1 for N levels */
|
||||
pr_info("archs-intc\t: %d priority levels (default %d)%s\n",
|
||||
irq_prio + 1, irq_prio,
|
||||
irq_bcr.firq ? " FIRQ (not used)":"");
|
||||
|
||||
/* setup status32, don't enable intr yet as kernel doesn't want */
|
||||
tmp = read_aux_reg(0xa);
|
||||
tmp |= STATUS_AD_MASK | (irq_prio << 1);
|
||||
tmp &= ~STATUS_IE_MASK;
|
||||
asm volatile("flag %0 \n"::"r"(tmp));
|
||||
}
|
||||
|
||||
static void arcv2_irq_mask(struct irq_data *data)
|
||||
|
@ -86,7 +93,7 @@ void arcv2_irq_enable(struct irq_data *data)
|
|||
{
|
||||
/* set default priority */
|
||||
write_aux_reg(AUX_IRQ_SELECT, data->irq);
|
||||
write_aux_reg(AUX_IRQ_PRIORITY, ARCV2_IRQ_DEF_PRIO);
|
||||
write_aux_reg(AUX_IRQ_PRIORITY, irq_prio);
|
||||
|
||||
/*
|
||||
* hw auto enables (linux unmask) all by default
|
||||
|
|
|
@ -81,9 +81,6 @@ static int arc_intc_domain_map(struct irq_domain *d, unsigned int irq,
|
|||
{
|
||||
switch (irq) {
|
||||
case TIMER0_IRQ:
|
||||
#ifdef CONFIG_SMP
|
||||
case IPI_IRQ:
|
||||
#endif
|
||||
irq_set_chip_and_handler(irq, &onchip_intc, handle_percpu_irq);
|
||||
break;
|
||||
default:
|
||||
|
|
|
@ -11,9 +11,13 @@
|
|||
#include <linux/smp.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <asm/irqflags-arcv2.h>
|
||||
#include <asm/mcip.h>
|
||||
#include <asm/setup.h>
|
||||
|
||||
#define IPI_IRQ 19
|
||||
#define SOFTIRQ_IRQ 21
|
||||
|
||||
static char smp_cpuinfo_buf[128];
|
||||
static int idu_detected;
|
||||
|
||||
|
@ -22,6 +26,7 @@ static DEFINE_RAW_SPINLOCK(mcip_lock);
|
|||
static void mcip_setup_per_cpu(int cpu)
|
||||
{
|
||||
smp_ipi_irq_setup(cpu, IPI_IRQ);
|
||||
smp_ipi_irq_setup(cpu, SOFTIRQ_IRQ);
|
||||
}
|
||||
|
||||
static void mcip_ipi_send(int cpu)
|
||||
|
@ -29,46 +34,44 @@ static void mcip_ipi_send(int cpu)
|
|||
unsigned long flags;
|
||||
int ipi_was_pending;
|
||||
|
||||
/* ARConnect can only send IPI to others */
|
||||
if (unlikely(cpu == raw_smp_processor_id())) {
|
||||
arc_softirq_trigger(SOFTIRQ_IRQ);
|
||||
return;
|
||||
}
|
||||
|
||||
raw_spin_lock_irqsave(&mcip_lock, flags);
|
||||
|
||||
/*
|
||||
* NOTE: We must spin here if the other cpu hasn't yet
|
||||
* serviced a previous message. This can burn lots
|
||||
* of time, but we MUST follows this protocol or
|
||||
* ipi messages can be lost!!!
|
||||
* Also, we must release the lock in this loop because
|
||||
* the other side may get to this same loop and not
|
||||
* be able to ack -- thus causing deadlock.
|
||||
* If receiver already has a pending interrupt, elide sending this one.
|
||||
* Linux cross core calling works well with concurrent IPIs
|
||||
* coalesced into one
|
||||
* see arch/arc/kernel/smp.c: ipi_send_msg_one()
|
||||
*/
|
||||
__mcip_cmd(CMD_INTRPT_READ_STATUS, cpu);
|
||||
ipi_was_pending = read_aux_reg(ARC_REG_MCIP_READBACK);
|
||||
if (!ipi_was_pending)
|
||||
__mcip_cmd(CMD_INTRPT_GENERATE_IRQ, cpu);
|
||||
|
||||
do {
|
||||
raw_spin_lock_irqsave(&mcip_lock, flags);
|
||||
__mcip_cmd(CMD_INTRPT_READ_STATUS, cpu);
|
||||
ipi_was_pending = read_aux_reg(ARC_REG_MCIP_READBACK);
|
||||
if (ipi_was_pending == 0)
|
||||
break; /* break out but keep lock */
|
||||
raw_spin_unlock_irqrestore(&mcip_lock, flags);
|
||||
} while (1);
|
||||
|
||||
__mcip_cmd(CMD_INTRPT_GENERATE_IRQ, cpu);
|
||||
raw_spin_unlock_irqrestore(&mcip_lock, flags);
|
||||
|
||||
#ifdef CONFIG_ARC_IPI_DBG
|
||||
if (ipi_was_pending)
|
||||
pr_info("IPI ACK delayed from cpu %d\n", cpu);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void mcip_ipi_clear(int irq)
|
||||
{
|
||||
unsigned int cpu, c;
|
||||
unsigned long flags;
|
||||
unsigned int __maybe_unused copy;
|
||||
|
||||
if (unlikely(irq == SOFTIRQ_IRQ)) {
|
||||
arc_softirq_clear(irq);
|
||||
return;
|
||||
}
|
||||
|
||||
raw_spin_lock_irqsave(&mcip_lock, flags);
|
||||
|
||||
/* Who sent the IPI */
|
||||
__mcip_cmd(CMD_INTRPT_CHECK_SOURCE, 0);
|
||||
|
||||
copy = cpu = read_aux_reg(ARC_REG_MCIP_READBACK); /* 1,2,4,8... */
|
||||
cpu = read_aux_reg(ARC_REG_MCIP_READBACK); /* 1,2,4,8... */
|
||||
|
||||
/*
|
||||
* In rare case, multiple concurrent IPIs sent to same target can
|
||||
|
@ -82,12 +85,6 @@ static void mcip_ipi_clear(int irq)
|
|||
} while (cpu);
|
||||
|
||||
raw_spin_unlock_irqrestore(&mcip_lock, flags);
|
||||
|
||||
#ifdef CONFIG_ARC_IPI_DBG
|
||||
if (c != __ffs(copy))
|
||||
pr_info("IPIs from %x coalesced to %x\n",
|
||||
copy, raw_smp_processor_id());
|
||||
#endif
|
||||
}
|
||||
|
||||
static void mcip_probe_n_setup(void)
|
||||
|
@ -96,13 +93,13 @@ static void mcip_probe_n_setup(void)
|
|||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
unsigned int pad3:8,
|
||||
idu:1, llm:1, num_cores:6,
|
||||
iocoh:1, grtc:1, dbg:1, pad2:1,
|
||||
iocoh:1, gfrc:1, dbg:1, pad2:1,
|
||||
msg:1, sem:1, ipi:1, pad:1,
|
||||
ver:8;
|
||||
#else
|
||||
unsigned int ver:8,
|
||||
pad:1, ipi:1, sem:1, msg:1,
|
||||
pad2:1, dbg:1, grtc:1, iocoh:1,
|
||||
pad2:1, dbg:1, gfrc:1, iocoh:1,
|
||||
num_cores:6, llm:1, idu:1,
|
||||
pad3:8;
|
||||
#endif
|
||||
|
@ -111,12 +108,13 @@ static void mcip_probe_n_setup(void)
|
|||
READ_BCR(ARC_REG_MCIP_BCR, mp);
|
||||
|
||||
sprintf(smp_cpuinfo_buf,
|
||||
"Extn [SMP]\t: ARConnect (v%d): %d cores with %s%s%s%s\n",
|
||||
"Extn [SMP]\t: ARConnect (v%d): %d cores with %s%s%s%s%s\n",
|
||||
mp.ver, mp.num_cores,
|
||||
IS_AVAIL1(mp.ipi, "IPI "),
|
||||
IS_AVAIL1(mp.idu, "IDU "),
|
||||
IS_AVAIL1(mp.llm, "LLM "),
|
||||
IS_AVAIL1(mp.dbg, "DEBUG "),
|
||||
IS_AVAIL1(mp.grtc, "GRTC"));
|
||||
IS_AVAIL1(mp.gfrc, "GFRC"));
|
||||
|
||||
idu_detected = mp.idu;
|
||||
|
||||
|
@ -125,8 +123,8 @@ static void mcip_probe_n_setup(void)
|
|||
__mcip_cmd_data(CMD_DEBUG_SET_MASK, 0xf, 0xf);
|
||||
}
|
||||
|
||||
if (IS_ENABLED(CONFIG_ARC_HAS_GRTC) && !mp.grtc)
|
||||
panic("kernel trying to use non-existent GRTC\n");
|
||||
if (IS_ENABLED(CONFIG_ARC_HAS_GFRC) && !mp.gfrc)
|
||||
panic("kernel trying to use non-existent GFRC\n");
|
||||
}
|
||||
|
||||
struct plat_smp_ops plat_smp_ops = {
|
||||
|
|
|
@ -42,9 +42,57 @@ struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
|
|||
|
||||
struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
|
||||
|
||||
static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
|
||||
{
|
||||
if (is_isa_arcompact()) {
|
||||
struct bcr_iccm_arcompact iccm;
|
||||
struct bcr_dccm_arcompact dccm;
|
||||
|
||||
READ_BCR(ARC_REG_ICCM_BUILD, iccm);
|
||||
if (iccm.ver) {
|
||||
cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */
|
||||
cpu->iccm.base_addr = iccm.base << 16;
|
||||
}
|
||||
|
||||
READ_BCR(ARC_REG_DCCM_BUILD, dccm);
|
||||
if (dccm.ver) {
|
||||
unsigned long base;
|
||||
cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */
|
||||
|
||||
base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
|
||||
cpu->dccm.base_addr = base & ~0xF;
|
||||
}
|
||||
} else {
|
||||
struct bcr_iccm_arcv2 iccm;
|
||||
struct bcr_dccm_arcv2 dccm;
|
||||
unsigned long region;
|
||||
|
||||
READ_BCR(ARC_REG_ICCM_BUILD, iccm);
|
||||
if (iccm.ver) {
|
||||
cpu->iccm.sz = 256 << iccm.sz00; /* 512B to 16M */
|
||||
if (iccm.sz00 == 0xF && iccm.sz01 > 0)
|
||||
cpu->iccm.sz <<= iccm.sz01;
|
||||
|
||||
region = read_aux_reg(ARC_REG_AUX_ICCM);
|
||||
cpu->iccm.base_addr = region & 0xF0000000;
|
||||
}
|
||||
|
||||
READ_BCR(ARC_REG_DCCM_BUILD, dccm);
|
||||
if (dccm.ver) {
|
||||
cpu->dccm.sz = 256 << dccm.sz0;
|
||||
if (dccm.sz0 == 0xF && dccm.sz1 > 0)
|
||||
cpu->dccm.sz <<= dccm.sz1;
|
||||
|
||||
region = read_aux_reg(ARC_REG_AUX_DCCM);
|
||||
cpu->dccm.base_addr = region & 0xF0000000;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void read_arc_build_cfg_regs(void)
|
||||
{
|
||||
struct bcr_perip uncached_space;
|
||||
struct bcr_timer timer;
|
||||
struct bcr_generic bcr;
|
||||
struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
|
||||
unsigned long perip_space;
|
||||
|
@ -53,7 +101,11 @@ static void read_arc_build_cfg_regs(void)
|
|||
READ_BCR(AUX_IDENTITY, cpu->core);
|
||||
READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
|
||||
|
||||
READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers);
|
||||
READ_BCR(ARC_REG_TIMERS_BCR, timer);
|
||||
cpu->extn.timer0 = timer.t0;
|
||||
cpu->extn.timer1 = timer.t1;
|
||||
cpu->extn.rtc = timer.rtc;
|
||||
|
||||
cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
|
||||
|
||||
READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
|
||||
|
@ -71,36 +123,11 @@ static void read_arc_build_cfg_regs(void)
|
|||
cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
|
||||
cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
|
||||
cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
|
||||
|
||||
/* Note that we read the CCM BCRs independent of kernel config
|
||||
* This is to catch the cases where user doesn't know that
|
||||
* CCMs are present in hardware build
|
||||
*/
|
||||
{
|
||||
struct bcr_iccm iccm;
|
||||
struct bcr_dccm dccm;
|
||||
struct bcr_dccm_base dccm_base;
|
||||
unsigned int bcr_32bit_val;
|
||||
|
||||
bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
|
||||
if (bcr_32bit_val) {
|
||||
iccm = *((struct bcr_iccm *)&bcr_32bit_val);
|
||||
cpu->iccm.base_addr = iccm.base << 16;
|
||||
cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
|
||||
}
|
||||
|
||||
bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
|
||||
if (bcr_32bit_val) {
|
||||
dccm = *((struct bcr_dccm *)&bcr_32bit_val);
|
||||
cpu->dccm.sz = 0x800 << (dccm.sz);
|
||||
|
||||
READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
|
||||
cpu->dccm.base_addr = dccm_base.addr << 8;
|
||||
}
|
||||
}
|
||||
|
||||
READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
|
||||
|
||||
/* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
|
||||
read_decode_ccm_bcr(cpu);
|
||||
|
||||
read_decode_mmu_bcr();
|
||||
read_decode_cache_bcr();
|
||||
|
||||
|
@ -208,9 +235,9 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
|
|||
(unsigned int)(arc_get_core_freq() / 10000) % 100);
|
||||
|
||||
n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
|
||||
IS_AVAIL1(cpu->timers.t0, "Timer0 "),
|
||||
IS_AVAIL1(cpu->timers.t1, "Timer1 "),
|
||||
IS_AVAIL2(cpu->timers.rtc, "64-bit RTC ",
|
||||
IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
|
||||
IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
|
||||
IS_AVAIL2(cpu->extn.rtc, "Local-64-bit-Ctr ",
|
||||
CONFIG_ARC_HAS_RTC));
|
||||
|
||||
n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
|
||||
|
@ -232,8 +259,6 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
|
|||
|
||||
n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
|
||||
}
|
||||
n += scnprintf(buf + n, len - n, "%s",
|
||||
IS_USED_CFG(CONFIG_ARC_HAS_HW_MPY));
|
||||
}
|
||||
|
||||
n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
|
||||
|
@ -293,13 +318,13 @@ static void arc_chk_core_config(void)
|
|||
struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
|
||||
int fpu_enabled;
|
||||
|
||||
if (!cpu->timers.t0)
|
||||
if (!cpu->extn.timer0)
|
||||
panic("Timer0 is not present!\n");
|
||||
|
||||
if (!cpu->timers.t1)
|
||||
if (!cpu->extn.timer1)
|
||||
panic("Timer1 is not present!\n");
|
||||
|
||||
if (IS_ENABLED(CONFIG_ARC_HAS_RTC) && !cpu->timers.rtc)
|
||||
if (IS_ENABLED(CONFIG_ARC_HAS_RTC) && !cpu->extn.rtc)
|
||||
panic("RTC is not present\n");
|
||||
|
||||
#ifdef CONFIG_ARC_HAS_DCCM
|
||||
|
@ -334,6 +359,7 @@ static void arc_chk_core_config(void)
|
|||
panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
|
||||
|
||||
if (is_isa_arcv2() && IS_ENABLED(CONFIG_SMP) && cpu->isa.atomic &&
|
||||
IS_ENABLED(CONFIG_ARC_HAS_LLSC) &&
|
||||
!IS_ENABLED(CONFIG_ARC_STAR_9000923308))
|
||||
panic("llock/scond livelock workaround missing\n");
|
||||
}
|
||||
|
|
|
@ -336,11 +336,8 @@ irqreturn_t do_IPI(int irq, void *dev_id)
|
|||
int rc;
|
||||
|
||||
rc = __do_IPI(msg);
|
||||
#ifdef CONFIG_ARC_IPI_DBG
|
||||
/* IPI received but no valid @msg */
|
||||
if (rc)
|
||||
pr_info("IPI with bogus msg %ld in %ld\n", msg, copy);
|
||||
#endif
|
||||
pending &= ~(1U << msg);
|
||||
} while (pending);
|
||||
|
||||
|
|
|
@ -62,7 +62,7 @@
|
|||
|
||||
/********** Clock Source Device *********/
|
||||
|
||||
#ifdef CONFIG_ARC_HAS_GRTC
|
||||
#ifdef CONFIG_ARC_HAS_GFRC
|
||||
|
||||
static int arc_counter_setup(void)
|
||||
{
|
||||
|
@ -83,10 +83,10 @@ static cycle_t arc_counter_read(struct clocksource *cs)
|
|||
|
||||
local_irq_save(flags);
|
||||
|
||||
__mcip_cmd(CMD_GRTC_READ_LO, 0);
|
||||
__mcip_cmd(CMD_GFRC_READ_LO, 0);
|
||||
stamp.l = read_aux_reg(ARC_REG_MCIP_READBACK);
|
||||
|
||||
__mcip_cmd(CMD_GRTC_READ_HI, 0);
|
||||
__mcip_cmd(CMD_GFRC_READ_HI, 0);
|
||||
stamp.h = read_aux_reg(ARC_REG_MCIP_READBACK);
|
||||
|
||||
local_irq_restore(flags);
|
||||
|
@ -95,7 +95,7 @@ static cycle_t arc_counter_read(struct clocksource *cs)
|
|||
}
|
||||
|
||||
static struct clocksource arc_counter = {
|
||||
.name = "ARConnect GRTC",
|
||||
.name = "ARConnect GFRC",
|
||||
.rating = 400,
|
||||
.read = arc_counter_read,
|
||||
.mask = CLOCKSOURCE_MASK(64),
|
||||
|
|
|
@ -285,8 +285,10 @@
|
|||
};
|
||||
};
|
||||
|
||||
|
||||
/include/ "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
/*
|
||||
* Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
|
||||
* mode") at poweroff. Most BeagleBone versions do not support RTC-only
|
||||
|
@ -307,17 +309,12 @@
|
|||
ti,pmic-shutdown-controller;
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-name = "vdds_dpr";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <925000>;
|
||||
|
@ -327,7 +324,6 @@
|
|||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <925000>;
|
||||
|
@ -337,25 +333,21 @@
|
|||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-name = "vio,vrtc,vdds";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-name = "vdd_3v3aux";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-name = "vdd_1v8";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-name = "vdd_3v3a";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
|
@ -128,21 +128,16 @@
|
|||
|
||||
};
|
||||
|
||||
/include/ "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-name = "vdds_dpr";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <925000>;
|
||||
|
@ -152,7 +147,6 @@
|
|||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <925000>;
|
||||
|
@ -162,28 +156,24 @@
|
|||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-name = "vio,vrtc,vdds";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-name = "vdd_3v3aux";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-name = "vdd_1v8";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-name = "vdd_3v3d";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
|
|
|
@ -375,15 +375,11 @@
|
|||
wp-gpios = <&gpio3 18 0>;
|
||||
};
|
||||
|
||||
#include "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
/* +1.5V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <1450000>;
|
||||
regulator-max-microvolt = <1550000>;
|
||||
|
@ -392,7 +388,6 @@
|
|||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
/* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <915000>;
|
||||
|
@ -402,7 +397,6 @@
|
|||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <915000>;
|
||||
|
@ -412,7 +406,6 @@
|
|||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
/* +1.8V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <1750000>;
|
||||
regulator-max-microvolt = <1870000>;
|
||||
|
@ -421,7 +414,6 @@
|
|||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
/* +3.3V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <3175000>;
|
||||
regulator-max-microvolt = <3430000>;
|
||||
|
@ -430,7 +422,6 @@
|
|||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
/* +1.8V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <1750000>;
|
||||
regulator-max-microvolt = <1870000>;
|
||||
|
@ -439,7 +430,6 @@
|
|||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
/* +3.3V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <3175000>;
|
||||
regulator-max-microvolt = <3430000>;
|
||||
|
|
|
@ -420,9 +420,9 @@
|
|||
vin-supply = <&vbat>;
|
||||
};
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
/include/ "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
backlight {
|
||||
isel = <1>; /* ISET1 */
|
||||
fdim = <200>; /* TPS65217_BL_FDIM_200HZ */
|
||||
|
@ -430,17 +430,12 @@
|
|||
};
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
/* VDD_1V8 system supply */
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
/* VDD_CORE voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <925000>;
|
||||
|
@ -450,7 +445,6 @@
|
|||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
/* VDD_MPU voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <925000>;
|
||||
|
@ -460,21 +454,18 @@
|
|||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
/* VRTC 1.8V always-on supply */
|
||||
regulator-name = "vrtc,vdds";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
/* 3.3V rail */
|
||||
regulator-name = "vdd_3v3aux";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
/* VDD_3V3A 3.3V rail */
|
||||
regulator-name = "vdd_3v3a";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
|
@ -482,7 +473,6 @@
|
|||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
/* VDD_3V3B 3.3V rail */
|
||||
regulator-name = "vdd_3v3b";
|
||||
regulator-always-on;
|
||||
|
|
|
@ -46,7 +46,7 @@
|
|||
gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <KEY_BACK>;
|
||||
debounce-interval = <1000>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
front_button {
|
||||
|
@ -54,7 +54,7 @@
|
|||
gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <KEY_FRONT>;
|
||||
debounce-interval = <1000>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -375,19 +375,16 @@
|
|||
pinctrl-0 = <&uart4_pins>;
|
||||
};
|
||||
|
||||
#include "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
ti,pmic-shutdown-controller;
|
||||
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <7>; /* NNMI */
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
/* VDDS_DDR */
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
|
@ -395,7 +392,6 @@
|
|||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <925000>;
|
||||
|
@ -405,7 +401,6 @@
|
|||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <925000>;
|
||||
|
@ -415,7 +410,6 @@
|
|||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
/* VRTC / VIO / VDDS*/
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
|
@ -423,7 +417,6 @@
|
|||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
/* VDD_3V3AUX */
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
|
@ -431,7 +424,6 @@
|
|||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
/* VDD_1V8 */
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
@ -439,7 +431,6 @@
|
|||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
/* VDD_3V3A */
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
|
|
@ -439,6 +439,7 @@
|
|||
ti,mbox-num-users = <4>;
|
||||
ti,mbox-num-fifos = <8>;
|
||||
mbox_wkupm3: wkup_m3 {
|
||||
ti,mbox-send-noirq;
|
||||
ti,mbox-tx = <0 0 0>;
|
||||
ti,mbox-rx = <0 0 3>;
|
||||
};
|
||||
|
|
|
@ -73,7 +73,7 @@
|
|||
global_timer: timer@48240200 {
|
||||
compatible = "arm,cortex-a9-global-timer";
|
||||
reg = <0x48240200 0x100>;
|
||||
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-parent = <&gic>;
|
||||
clocks = <&mpu_periphclk>;
|
||||
};
|
||||
|
@ -81,7 +81,7 @@
|
|||
local_timer: timer@48240600 {
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0x48240600 0x100>;
|
||||
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-parent = <&gic>;
|
||||
clocks = <&mpu_periphclk>;
|
||||
};
|
||||
|
@ -290,6 +290,7 @@
|
|||
ti,mbox-num-users = <4>;
|
||||
ti,mbox-num-fifos = <8>;
|
||||
mbox_wkupm3: wkup_m3 {
|
||||
ti,mbox-send-noirq;
|
||||
ti,mbox-tx = <0 0 0>;
|
||||
ti,mbox-rx = <0 0 3>;
|
||||
};
|
||||
|
|
|
@ -590,8 +590,6 @@
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pixcir_ts_pins>;
|
||||
reg = <0x5c>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <22 0>;
|
||||
|
||||
attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
|
@ -599,7 +597,7 @@
|
|||
* 0x264 represents the offset of padconf register of
|
||||
* gpio3_22 from am43xx_pinmux base.
|
||||
*/
|
||||
interrupts-extended = <&gpio3 22 IRQ_TYPE_NONE>,
|
||||
interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_FALLING>,
|
||||
<&am43xx_pinmux 0x264>;
|
||||
interrupt-names = "tsc", "wakeup";
|
||||
|
||||
|
|
|
@ -491,7 +491,7 @@
|
|||
pinctrl-0 = <&pixcir_ts_pins>;
|
||||
reg = <0x5c>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <17 0>;
|
||||
interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
|
|
|
@ -173,6 +173,8 @@
|
|||
|
||||
sound0_master: simple-audio-card,codec {
|
||||
sound-dai = <&tlv320aic3104>;
|
||||
assigned-clocks = <&clkoutmux2_clk_mux>;
|
||||
assigned-clock-parents = <&sys_clk2_dclk_div>;
|
||||
clocks = <&clkout2_clk>;
|
||||
};
|
||||
};
|
||||
|
@ -796,6 +798,8 @@
|
|||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&mcasp3_pins_default>;
|
||||
pinctrl-1 = <&mcasp3_pins_sleep>;
|
||||
assigned-clocks = <&mcasp3_ahclkx_mux>;
|
||||
assigned-clock-parents = <&sys_clkin2>;
|
||||
status = "okay";
|
||||
|
||||
op-mode = <0>; /* MCASP_IIS_MODE */
|
||||
|
|
|
@ -167,7 +167,7 @@
|
|||
DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
|
||||
DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
|
||||
DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
|
||||
DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
|
||||
DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
|
||||
>;
|
||||
};
|
||||
|
||||
|
@ -492,14 +492,14 @@
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&qspi1_pins>;
|
||||
|
||||
spi-max-frequency = <20000000>;
|
||||
spi-max-frequency = <48000000>;
|
||||
|
||||
spi_flash: spi_flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,m25p80", "jedec,spi-nor";
|
||||
reg = <0>; /* CS0 */
|
||||
spi-max-frequency = <20000000>;
|
||||
spi-max-frequency = <48000000>;
|
||||
|
||||
partition@0 {
|
||||
label = "uboot";
|
||||
|
@ -545,7 +545,7 @@
|
|||
ti,debounce-tol = /bits/ 16 <10>;
|
||||
ti,debounce-rep = /bits/ 16 <1>;
|
||||
|
||||
linux,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -559,13 +559,13 @@
|
|||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <0>;
|
||||
phy-mode = "rgmii";
|
||||
phy-mode = "rgmii-txid";
|
||||
dual_emac_res_vlan = <0>;
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <1>;
|
||||
phy-mode = "rgmii";
|
||||
phy-mode = "rgmii-txid";
|
||||
dual_emac_res_vlan = <1>;
|
||||
};
|
||||
|
||||
|
@ -588,7 +588,7 @@
|
|||
};
|
||||
|
||||
&usb2 {
|
||||
dr_mode = "peripheral";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&mcasp3 {
|
||||
|
|
|
@ -25,8 +25,8 @@
|
|||
&dra7_pmx_core {
|
||||
uart3_pins_default: uart3_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
|
||||
DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
|
||||
DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */
|
||||
DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
|
@ -108,9 +108,9 @@
|
|||
pinctrl-0 = <&i2c5_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
eeprom_base: atmel@50 {
|
||||
eeprom_base: atmel@54 {
|
||||
compatible = "atmel,24c08";
|
||||
reg = <0x50>;
|
||||
reg = <0x54>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
|
|
|
@ -152,6 +152,7 @@
|
|||
nand-on-flash-bbt;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
|
|
|
@ -114,9 +114,15 @@
|
|||
|
||||
macb0: ethernet@f8008000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb0_default>;
|
||||
pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq>;
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
|
||||
ethernet-phy@1 {
|
||||
reg = <0x1>;
|
||||
interrupt-parent = <&pioA>;
|
||||
interrupts = <73 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
pdmic@f8018000 {
|
||||
|
@ -300,6 +306,10 @@
|
|||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_macb0_phy_irq: macb0_phy_irq {
|
||||
pinmux = <PIN_PC9__GPIO>;
|
||||
};
|
||||
|
||||
pinctrl_pdmic_default: pdmic_default {
|
||||
pinmux = <PIN_PB26__PDMIC_DAT>,
|
||||
<PIN_PB27__PDMIC_CLK>;
|
||||
|
|
|
@ -86,10 +86,12 @@
|
|||
macb0: ethernet@f8020000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
|
||||
|
||||
phy0: ethernet-phy@1 {
|
||||
interrupt-parent = <&pioE>;
|
||||
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
@ -152,6 +154,10 @@
|
|||
atmel,pins =
|
||||
<AT91_PIOE 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
|
||||
};
|
||||
pinctrl_macb0_phy_irq: macb0_phy_irq_0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -160,8 +160,15 @@
|
|||
};
|
||||
|
||||
macb0: ethernet@f8020000 {
|
||||
pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
|
||||
ethernet-phy@1 {
|
||||
reg = <0x1>;
|
||||
interrupt-parent = <&pioE>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc1: mmc@fc000000 {
|
||||
|
@ -193,6 +200,10 @@
|
|||
|
||||
pinctrl@fc06a000 {
|
||||
board {
|
||||
pinctrl_macb0_phy_irq: macb0_phy_irq {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
|
||||
};
|
||||
pinctrl_mmc0_cd: mmc0_cd {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
|
||||
|
|
|
@ -215,7 +215,7 @@
|
|||
};
|
||||
|
||||
panel: panel {
|
||||
compatible = "qd,qd43003c0-40", "simple-panel";
|
||||
compatible = "qiaodian,qd43003c0-40", "simple-panel";
|
||||
backlight = <&backlight>;
|
||||
power-supply = <&panel_reg>;
|
||||
#address-cells = <1>;
|
||||
|
|
|
@ -896,7 +896,6 @@
|
|||
#size-cells = <1>;
|
||||
reg = <0x2100000 0x10000>;
|
||||
ranges = <0 0x2100000 0x10000>;
|
||||
interrupt-parent = <&intc>;
|
||||
clocks = <&clks IMX6QDL_CLK_CAAM_MEM>,
|
||||
<&clks IMX6QDL_CLK_CAAM_ACLK>,
|
||||
<&clks IMX6QDL_CLK_CAAM_IPG>,
|
||||
|
|
|
@ -14,7 +14,7 @@
|
|||
#include "kirkwood-synology.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Synology DS111";
|
||||
model = "Synology DS112";
|
||||
compatible = "synology,ds111", "marvell,kirkwood";
|
||||
|
||||
memory {
|
||||
|
|
|
@ -1,7 +1,8 @@
|
|||
/*
|
||||
* Device Tree file for Buffalo Linkstation LS-WVL/VL
|
||||
*
|
||||
* Copyright (C) 2015, rogershimizu@gmail.com
|
||||
* Copyright (C) 2015, 2016
|
||||
* Roger Shimizu <rogershimizu@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
|
@ -156,21 +157,21 @@
|
|||
button@1 {
|
||||
label = "Function Button";
|
||||
linux,code = <KEY_OPTION>;
|
||||
gpios = <&gpio0 45 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
button@2 {
|
||||
label = "Power-on Switch";
|
||||
linux,code = <KEY_RESERVED>;
|
||||
linux,input-type = <5>;
|
||||
gpios = <&gpio0 46 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
button@3 {
|
||||
label = "Power-auto Switch";
|
||||
linux,code = <KEY_ESC>;
|
||||
linux,input-type = <5>;
|
||||
gpios = <&gpio0 47 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -185,38 +186,38 @@
|
|||
|
||||
led@1 {
|
||||
label = "lswvl:red:alarm";
|
||||
gpios = <&gpio0 36 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led@2 {
|
||||
label = "lswvl:red:func";
|
||||
gpios = <&gpio0 37 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led@3 {
|
||||
label = "lswvl:amber:info";
|
||||
gpios = <&gpio0 38 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led@4 {
|
||||
label = "lswvl:blue:func";
|
||||
gpios = <&gpio0 39 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led@5 {
|
||||
label = "lswvl:blue:power";
|
||||
gpios = <&gpio0 40 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
led@6 {
|
||||
label = "lswvl:red:hdderr0";
|
||||
gpios = <&gpio0 34 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led@7 {
|
||||
label = "lswvl:red:hdderr1";
|
||||
gpios = <&gpio0 35 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -233,7 +234,7 @@
|
|||
3250 1
|
||||
5000 0>;
|
||||
|
||||
alarm-gpios = <&gpio0 43 GPIO_ACTIVE_HIGH>;
|
||||
alarm-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
restart_poweroff {
|
||||
|
|
|
@ -1,7 +1,8 @@
|
|||
/*
|
||||
* Device Tree file for Buffalo Linkstation LS-WXL/WSXL
|
||||
*
|
||||
* Copyright (C) 2015, rogershimizu@gmail.com
|
||||
* Copyright (C) 2015, 2016
|
||||
* Roger Shimizu <rogershimizu@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
|
@ -156,21 +157,21 @@
|
|||
button@1 {
|
||||
label = "Function Button";
|
||||
linux,code = <KEY_OPTION>;
|
||||
gpios = <&gpio1 41 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
button@2 {
|
||||
label = "Power-on Switch";
|
||||
linux,code = <KEY_RESERVED>;
|
||||
linux,input-type = <5>;
|
||||
gpios = <&gpio1 42 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
button@3 {
|
||||
label = "Power-auto Switch";
|
||||
linux,code = <KEY_ESC>;
|
||||
linux,input-type = <5>;
|
||||
gpios = <&gpio1 43 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -185,12 +186,12 @@
|
|||
|
||||
led@1 {
|
||||
label = "lswxl:blue:func";
|
||||
gpios = <&gpio1 36 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led@2 {
|
||||
label = "lswxl:red:alarm";
|
||||
gpios = <&gpio1 49 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led@3 {
|
||||
|
@ -200,23 +201,23 @@
|
|||
|
||||
led@4 {
|
||||
label = "lswxl:blue:power";
|
||||
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
led@5 {
|
||||
label = "lswxl:red:func";
|
||||
gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
|
||||
default-state = "keep";
|
||||
gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led@6 {
|
||||
label = "lswxl:red:hdderr0";
|
||||
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led@7 {
|
||||
label = "lswxl:red:hdderr1";
|
||||
gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -225,15 +226,15 @@
|
|||
pinctrl-0 = <&pmx_fan_low &pmx_fan_high &pmx_fan_lock>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
gpios = <&gpio0 47 GPIO_ACTIVE_LOW
|
||||
&gpio0 48 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 16 GPIO_ACTIVE_LOW
|
||||
&gpio1 15 GPIO_ACTIVE_LOW>;
|
||||
|
||||
gpio-fan,speed-map = <0 3
|
||||
1500 2
|
||||
3250 1
|
||||
5000 0>;
|
||||
|
||||
alarm-gpios = <&gpio1 49 GPIO_ACTIVE_HIGH>;
|
||||
alarm-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
restart_poweroff {
|
||||
|
@ -256,7 +257,7 @@
|
|||
enable-active-high;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
gpio = <&gpio0 37 GPIO_ACTIVE_HIGH>;
|
||||
gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
hdd_power0: regulator@2 {
|
||||
compatible = "regulator-fixed";
|
||||
|
|
|
@ -131,6 +131,7 @@
|
|||
chip-delay = <40>;
|
||||
status = "okay";
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
|
|
|
@ -112,14 +112,6 @@
|
|||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
/*
|
||||
* Only found on the wireless SOM. For the SOM without wireless, the pins for
|
||||
* MMC3 can be routed with jumpers to the second MMC slot on the devkit and
|
||||
|
@ -143,6 +135,7 @@
|
|||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
|
||||
ref-clock-frequency = <26000000>;
|
||||
tcxo-clock-frequency = <26000000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -130,6 +130,16 @@
|
|||
};
|
||||
};
|
||||
|
||||
&gpio8 {
|
||||
/* TI trees use GPIO instead of msecure, see also muxing */
|
||||
p234 {
|
||||
gpio-hog;
|
||||
gpios = <10 GPIO_ACTIVE_HIGH>;
|
||||
output-high;
|
||||
line-name = "gpio8_234/msecure";
|
||||
};
|
||||
};
|
||||
|
||||
&omap5_pmx_core {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <
|
||||
|
@ -213,6 +223,13 @@
|
|||
>;
|
||||
};
|
||||
|
||||
/* TI trees use GPIO mode; msecure mode does not work reliably? */
|
||||
palmas_msecure_pins: palmas_msecure_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP5_IOPAD(0x180, PIN_OUTPUT | MUX_MODE6) /* gpio8_234 */
|
||||
>;
|
||||
};
|
||||
|
||||
usbhost_pins: pinmux_usbhost_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP5_IOPAD(0x0c4, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
|
||||
|
@ -278,6 +295,12 @@
|
|||
&usbhost_wkup_pins
|
||||
>;
|
||||
|
||||
palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1 */
|
||||
>;
|
||||
};
|
||||
|
||||
usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP5_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
|
||||
|
@ -345,6 +368,8 @@
|
|||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,system-power-controller;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&palmas_sys_nirq_pins &palmas_msecure_pins>;
|
||||
|
||||
extcon_usb3: palmas_usb {
|
||||
compatible = "ti,palmas-usb-vid";
|
||||
|
@ -358,6 +383,14 @@
|
|||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
rtc {
|
||||
compatible = "ti,palmas-rtc";
|
||||
interrupt-parent = <&palmas>;
|
||||
interrupts = <8 IRQ_TYPE_NONE>;
|
||||
ti,backup-battery-chargeable;
|
||||
ti,backup-battery-charge-high-current;
|
||||
};
|
||||
|
||||
palmas_pmic {
|
||||
compatible = "ti,palmas-pmic";
|
||||
interrupt-parent = <&palmas>;
|
||||
|
|
|
@ -1,7 +1,8 @@
|
|||
/*
|
||||
* Device Tree file for Buffalo Linkstation LS-WTGL
|
||||
*
|
||||
* Copyright (C) 2015, Roger Shimizu <rogershimizu@gmail.com>
|
||||
* Copyright (C) 2015, 2016
|
||||
* Roger Shimizu <rogershimizu@gmail.com>
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
|
@ -69,8 +70,6 @@
|
|||
|
||||
internal-regs {
|
||||
pinctrl: pinctrl@10000 {
|
||||
pinctrl-0 = <&pmx_usb_power &pmx_power_hdd
|
||||
&pmx_fan_low &pmx_fan_high &pmx_fan_lock>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
pmx_led_power: pmx-leds {
|
||||
|
@ -162,6 +161,7 @@
|
|||
led@1 {
|
||||
label = "lswtgl:blue:power";
|
||||
gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
led@2 {
|
||||
|
@ -188,7 +188,7 @@
|
|||
3250 1
|
||||
5000 0>;
|
||||
|
||||
alarm-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
|
||||
alarm-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
restart_poweroff {
|
||||
|
@ -228,6 +228,37 @@
|
|||
};
|
||||
};
|
||||
|
||||
&devbus_bootcs {
|
||||
status = "okay";
|
||||
devbus,keep-config;
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec-flash";
|
||||
reg = <0 0x40000>;
|
||||
bank-width = <1>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
header@0 {
|
||||
reg = <0 0x30000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
uboot@30000 {
|
||||
reg = <0x30000 0xF000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
uboot_env@3F000 {
|
||||
reg = <0x3F000 0x1000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
status = "okay";
|
||||
|
||||
|
|
|
@ -90,7 +90,7 @@
|
|||
#define PIN_PA14__I2SC1_MCK PINMUX_PIN(PIN_PA14, 4, 2)
|
||||
#define PIN_PA14__FLEXCOM3_IO2 PINMUX_PIN(PIN_PA14, 5, 1)
|
||||
#define PIN_PA14__D9 PINMUX_PIN(PIN_PA14, 6, 2)
|
||||
#define PIN_PA15 14
|
||||
#define PIN_PA15 15
|
||||
#define PIN_PA15__GPIO PINMUX_PIN(PIN_PA15, 0, 0)
|
||||
#define PIN_PA15__SPI0_MOSI PINMUX_PIN(PIN_PA15, 1, 1)
|
||||
#define PIN_PA15__TF1 PINMUX_PIN(PIN_PA15, 2, 1)
|
||||
|
|
|
@ -1342,7 +1342,7 @@
|
|||
dbgu: serial@fc069000 {
|
||||
compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
|
||||
reg = <0xfc069000 0x200>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
clocks = <&dbgu_clk>;
|
||||
|
|
|
@ -127,22 +127,14 @@
|
|||
};
|
||||
mmcsd_default_mode: mmcsd_default {
|
||||
mmcsd_default_cfg1 {
|
||||
/* MCCLK */
|
||||
pins = "GPIO8_B10";
|
||||
ste,output = <0>;
|
||||
};
|
||||
mmcsd_default_cfg2 {
|
||||
/* MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2 */
|
||||
pins = "GPIO10_C11", "GPIO15_A12",
|
||||
"GPIO16_C13", "GPIO23_D15";
|
||||
ste,output = <1>;
|
||||
};
|
||||
mmcsd_default_cfg3 {
|
||||
/* MCCMD, MCDAT3-0, MCMSFBCLK */
|
||||
pins = "GPIO9_A10", "GPIO11_B11",
|
||||
"GPIO12_A11", "GPIO13_C12",
|
||||
"GPIO14_B12", "GPIO24_C15";
|
||||
ste,input = <1>;
|
||||
/*
|
||||
* MCCLK, MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2
|
||||
* MCCMD, MCDAT3-0, MCMSFBCLK
|
||||
*/
|
||||
pins = "GPIO8_B10", "GPIO9_A10", "GPIO10_C11", "GPIO11_B11",
|
||||
"GPIO12_A11", "GPIO13_C12", "GPIO14_B12", "GPIO15_A12",
|
||||
"GPIO16_C13", "GPIO23_D15", "GPIO24_C15";
|
||||
ste,output = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -802,10 +794,21 @@
|
|||
clock-names = "mclk", "apb_pclk";
|
||||
interrupt-parent = <&vica>;
|
||||
interrupts = <22>;
|
||||
max-frequency = <48000000>;
|
||||
max-frequency = <400000>;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
full-pwr-cycle;
|
||||
/*
|
||||
* The STw4811 circuit used with the Nomadik strictly
|
||||
* requires that all of these signal direction pins be
|
||||
* routed and used for its 4-bit levelshifter.
|
||||
*/
|
||||
st,sig-dir-dat0;
|
||||
st,sig-dir-dat2;
|
||||
st,sig-dir-dat31;
|
||||
st,sig-dir-cmd;
|
||||
st,sig-pin-fbclk;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
|
||||
vmmc-supply = <&vmmc_regulator>;
|
||||
|
|
|
@ -0,0 +1,56 @@
|
|||
/*
|
||||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Integrated Power Management Chip
|
||||
* http://www.ti.com/lit/ds/symlink/tps65217.pdf
|
||||
*/
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-compatible = "dcdc1";
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
regulator-compatible = "dcdc2";
|
||||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
regulator-compatible = "dcdc3";
|
||||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-compatible = "ldo1";
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-compatible = "ldo2";
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-compatible = "ldo3";
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-compatible = "ldo4";
|
||||
};
|
||||
};
|
||||
};
|
|
@ -16,7 +16,7 @@
|
|||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
|
||||
#include <asm/div64.h>
|
||||
#include <asm/hardware/icst.h>
|
||||
|
||||
/*
|
||||
|
@ -29,7 +29,11 @@ EXPORT_SYMBOL(icst525_s2div);
|
|||
|
||||
unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco)
|
||||
{
|
||||
return p->ref * 2 * (vco.v + 8) / ((vco.r + 2) * p->s2div[vco.s]);
|
||||
u64 dividend = p->ref * 2 * (u64)(vco.v + 8);
|
||||
u32 divisor = (vco.r + 2) * p->s2div[vco.s];
|
||||
|
||||
do_div(dividend, divisor);
|
||||
return (unsigned long)dividend;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(icst_hz);
|
||||
|
@ -58,6 +62,7 @@ icst_hz_to_vco(const struct icst_params *p, unsigned long freq)
|
|||
|
||||
if (f > p->vco_min && f <= p->vco_max)
|
||||
break;
|
||||
i++;
|
||||
} while (i < 8);
|
||||
|
||||
if (i >= 8)
|
||||
|
|
|
@ -426,6 +426,7 @@ CONFIG_SUNXI_WATCHDOG=y
|
|||
CONFIG_IMX2_WDT=y
|
||||
CONFIG_TEGRA_WATCHDOG=m
|
||||
CONFIG_MESON_WATCHDOG=y
|
||||
CONFIG_DW_WATCHDOG=y
|
||||
CONFIG_DIGICOLOR_WATCHDOG=y
|
||||
CONFIG_MFD_AS3711=y
|
||||
CONFIG_MFD_AS3722=y
|
||||
|
|
|
@ -50,6 +50,7 @@ CONFIG_SOC_AM33XX=y
|
|||
CONFIG_SOC_AM43XX=y
|
||||
CONFIG_SOC_DRA7XX=y
|
||||
CONFIG_ARM_THUMBEE=y
|
||||
CONFIG_ARM_KERNMEM_PERMS=y
|
||||
CONFIG_ARM_ERRATA_411920=y
|
||||
CONFIG_ARM_ERRATA_430973=y
|
||||
CONFIG_SMP=y
|
||||
|
@ -177,6 +178,7 @@ CONFIG_TI_CPTS=y
|
|||
CONFIG_AT803X_PHY=y
|
||||
CONFIG_SMSC_PHY=y
|
||||
CONFIG_USB_USBNET=m
|
||||
CONFIG_USB_NET_SMSC75XX=m
|
||||
CONFIG_USB_NET_SMSC95XX=m
|
||||
CONFIG_USB_ALI_M5632=y
|
||||
CONFIG_USB_AN2720=y
|
||||
|
@ -290,24 +292,23 @@ CONFIG_FB=y
|
|||
CONFIG_FIRMWARE_EDID=y
|
||||
CONFIG_FB_MODE_HELPERS=y
|
||||
CONFIG_FB_TILEBLITTING=y
|
||||
CONFIG_OMAP2_DSS=m
|
||||
CONFIG_OMAP5_DSS_HDMI=y
|
||||
CONFIG_OMAP2_DSS_SDI=y
|
||||
CONFIG_OMAP2_DSS_DSI=y
|
||||
CONFIG_FB_OMAP5_DSS_HDMI=y
|
||||
CONFIG_FB_OMAP2_DSS_SDI=y
|
||||
CONFIG_FB_OMAP2_DSS_DSI=y
|
||||
CONFIG_FB_OMAP2=m
|
||||
CONFIG_DISPLAY_ENCODER_TFP410=m
|
||||
CONFIG_DISPLAY_ENCODER_TPD12S015=m
|
||||
CONFIG_DISPLAY_CONNECTOR_DVI=m
|
||||
CONFIG_DISPLAY_CONNECTOR_HDMI=m
|
||||
CONFIG_DISPLAY_CONNECTOR_ANALOG_TV=m
|
||||
CONFIG_DISPLAY_PANEL_DPI=m
|
||||
CONFIG_DISPLAY_PANEL_DSI_CM=m
|
||||
CONFIG_DISPLAY_PANEL_SONY_ACX565AKM=m
|
||||
CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02=m
|
||||
CONFIG_DISPLAY_PANEL_SHARP_LS037V7DW01=m
|
||||
CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1=m
|
||||
CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1=m
|
||||
CONFIG_DISPLAY_PANEL_NEC_NL8048HL11=m
|
||||
CONFIG_FB_OMAP2_ENCODER_TFP410=m
|
||||
CONFIG_FB_OMAP2_ENCODER_TPD12S015=m
|
||||
CONFIG_FB_OMAP2_CONNECTOR_DVI=m
|
||||
CONFIG_FB_OMAP2_CONNECTOR_HDMI=m
|
||||
CONFIG_FB_OMAP2_CONNECTOR_ANALOG_TV=m
|
||||
CONFIG_FB_OMAP2_PANEL_DPI=m
|
||||
CONFIG_FB_OMAP2_PANEL_DSI_CM=m
|
||||
CONFIG_FB_OMAP2_PANEL_SONY_ACX565AKM=m
|
||||
CONFIG_FB_OMAP2_PANEL_LGPHILIPS_LB035Q02=m
|
||||
CONFIG_FB_OMAP2_PANEL_SHARP_LS037V7DW01=m
|
||||
CONFIG_FB_OMAP2_PANEL_TPO_TD028TTEC1=m
|
||||
CONFIG_FB_OMAP2_PANEL_TPO_TD043MTEA1=m
|
||||
CONFIG_FB_OMAP2_PANEL_NEC_NL8048HL11=m
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
CONFIG_LCD_CLASS_DEVICE=y
|
||||
CONFIG_LCD_PLATFORM=y
|
||||
|
@ -354,6 +355,11 @@ CONFIG_USB_MUSB_DSPS=m
|
|||
CONFIG_USB_INVENTRA_DMA=y
|
||||
CONFIG_USB_TI_CPPI41_DMA=y
|
||||
CONFIG_USB_DWC3=m
|
||||
CONFIG_USB_SERIAL=m
|
||||
CONFIG_USB_SERIAL_GENERIC=y
|
||||
CONFIG_USB_SERIAL_SIMPLE=m
|
||||
CONFIG_USB_SERIAL_FTDI_SIO=m
|
||||
CONFIG_USB_SERIAL_PL2303=m
|
||||
CONFIG_USB_TEST=m
|
||||
CONFIG_AM335X_PHY_USB=y
|
||||
CONFIG_USB_GADGET=m
|
||||
|
@ -387,6 +393,7 @@ CONFIG_NEW_LEDS=y
|
|||
CONFIG_LEDS_CLASS=m
|
||||
CONFIG_LEDS_GPIO=m
|
||||
CONFIG_LEDS_PWM=m
|
||||
CONFIG_LEDS_PCA963X=m
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=m
|
||||
CONFIG_LEDS_TRIGGER_ONESHOT=m
|
||||
|
@ -449,6 +456,8 @@ CONFIG_NLS_CODEPAGE_437=y
|
|||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_INFO_SPLIT=y
|
||||
CONFIG_DEBUG_INFO_DWARF4=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_SCHEDSTATS=y
|
||||
CONFIG_TIMER_STATS=y
|
||||
|
|
|
@ -364,7 +364,7 @@ static struct crypto_alg aes_algs[] = { {
|
|||
.cra_blkcipher = {
|
||||
.min_keysize = AES_MIN_KEY_SIZE,
|
||||
.max_keysize = AES_MAX_KEY_SIZE,
|
||||
.ivsize = AES_BLOCK_SIZE,
|
||||
.ivsize = 0,
|
||||
.setkey = ce_aes_setkey,
|
||||
.encrypt = ecb_encrypt,
|
||||
.decrypt = ecb_decrypt,
|
||||
|
@ -441,7 +441,7 @@ static struct crypto_alg aes_algs[] = { {
|
|||
.cra_ablkcipher = {
|
||||
.min_keysize = AES_MIN_KEY_SIZE,
|
||||
.max_keysize = AES_MAX_KEY_SIZE,
|
||||
.ivsize = AES_BLOCK_SIZE,
|
||||
.ivsize = 0,
|
||||
.setkey = ablk_set_key,
|
||||
.encrypt = ablk_encrypt,
|
||||
.decrypt = ablk_decrypt,
|
||||
|
|
|
@ -117,6 +117,7 @@ static inline u32 gic_read_iar(void)
|
|||
u32 irqstat;
|
||||
|
||||
asm volatile("mrc " __stringify(ICC_IAR1) : "=r" (irqstat));
|
||||
dsb(sy);
|
||||
return irqstat;
|
||||
}
|
||||
|
||||
|
|
|
@ -35,14 +35,21 @@ static inline void xen_dma_map_page(struct device *hwdev, struct page *page,
|
|||
dma_addr_t dev_addr, unsigned long offset, size_t size,
|
||||
enum dma_data_direction dir, struct dma_attrs *attrs)
|
||||
{
|
||||
bool local = XEN_PFN_DOWN(dev_addr) == page_to_xen_pfn(page);
|
||||
unsigned long page_pfn = page_to_xen_pfn(page);
|
||||
unsigned long dev_pfn = XEN_PFN_DOWN(dev_addr);
|
||||
unsigned long compound_pages =
|
||||
(1<<compound_order(page)) * XEN_PFN_PER_PAGE;
|
||||
bool local = (page_pfn <= dev_pfn) &&
|
||||
(dev_pfn - page_pfn < compound_pages);
|
||||
|
||||
/*
|
||||
* Dom0 is mapped 1:1, while the Linux page can be spanned accross
|
||||
* multiple Xen page, it's not possible to have a mix of local and
|
||||
* foreign Xen page. So if the first xen_pfn == mfn the page is local
|
||||
* otherwise it's a foreign page grant-mapped in dom0. If the page is
|
||||
* local we can safely call the native dma_ops function, otherwise we
|
||||
* call the xen specific function.
|
||||
* Dom0 is mapped 1:1, while the Linux page can span across
|
||||
* multiple Xen pages, it's not possible for it to contain a
|
||||
* mix of local and foreign Xen pages. So if the first xen_pfn
|
||||
* == mfn the page is local otherwise it's a foreign page
|
||||
* grant-mapped in dom0. If the page is local we can safely
|
||||
* call the native dma_ops function, otherwise we call the xen
|
||||
* specific function.
|
||||
*/
|
||||
if (local)
|
||||
__generic_dma_ops(hwdev)->map_page(hwdev, page, offset, size, dir, attrs);
|
||||
|
|
|
@ -206,7 +206,8 @@ int io_mem_abort(struct kvm_vcpu *vcpu, struct kvm_run *run,
|
|||
run->mmio.is_write = is_write;
|
||||
run->mmio.phys_addr = fault_ipa;
|
||||
run->mmio.len = len;
|
||||
memcpy(run->mmio.data, data_buf, len);
|
||||
if (is_write)
|
||||
memcpy(run->mmio.data, data_buf, len);
|
||||
|
||||
if (!ret) {
|
||||
/* We handled the access successfully in the kernel. */
|
||||
|
|
|
@ -18,6 +18,7 @@
|
|||
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/system_info.h>
|
||||
|
||||
#include "common.h"
|
||||
|
||||
|
@ -77,12 +78,31 @@ static const char *const n900_boards_compat[] __initconst = {
|
|||
NULL,
|
||||
};
|
||||
|
||||
/* Set system_rev from atags */
|
||||
static void __init rx51_set_system_rev(const struct tag *tags)
|
||||
{
|
||||
const struct tag *tag;
|
||||
|
||||
if (tags->hdr.tag != ATAG_CORE)
|
||||
return;
|
||||
|
||||
for_each_tag(tag, tags) {
|
||||
if (tag->hdr.tag == ATAG_REVISION) {
|
||||
system_rev = tag->u.revision.rev;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Legacy userspace on Nokia N900 needs ATAGS exported in /proc/atags,
|
||||
* save them while the data is still not overwritten
|
||||
*/
|
||||
static void __init rx51_reserve(void)
|
||||
{
|
||||
save_atags((const struct tag *)(PAGE_OFFSET + 0x100));
|
||||
const struct tag *tags = (const struct tag *)(PAGE_OFFSET + 0x100);
|
||||
|
||||
save_atags(tags);
|
||||
rx51_set_system_rev(tags);
|
||||
omap_reserve();
|
||||
}
|
||||
|
||||
|
|
|
@ -18,7 +18,6 @@
|
|||
#include <linux/slab.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/pinctrl/machine.h>
|
||||
#include <linux/platform_data/mailbox-omap.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
@ -66,32 +65,6 @@ static int __init omap3_l3_init(void)
|
|||
}
|
||||
omap_postcore_initcall(omap3_l3_init);
|
||||
|
||||
#if defined(CONFIG_OMAP2PLUS_MBOX) || defined(CONFIG_OMAP2PLUS_MBOX_MODULE)
|
||||
static inline void __init omap_init_mbox(void)
|
||||
{
|
||||
struct omap_hwmod *oh;
|
||||
struct platform_device *pdev;
|
||||
struct omap_mbox_pdata *pdata;
|
||||
|
||||
oh = omap_hwmod_lookup("mailbox");
|
||||
if (!oh) {
|
||||
pr_err("%s: unable to find hwmod\n", __func__);
|
||||
return;
|
||||
}
|
||||
if (!oh->dev_attr) {
|
||||
pr_err("%s: hwmod doesn't have valid attrs\n", __func__);
|
||||
return;
|
||||
}
|
||||
|
||||
pdata = (struct omap_mbox_pdata *)oh->dev_attr;
|
||||
pdev = omap_device_build("omap-mailbox", -1, oh, pdata, sizeof(*pdata));
|
||||
WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
|
||||
__func__, PTR_ERR(pdev));
|
||||
}
|
||||
#else
|
||||
static inline void omap_init_mbox(void) { }
|
||||
#endif /* CONFIG_OMAP2PLUS_MBOX */
|
||||
|
||||
static inline void omap_init_sti(void) {}
|
||||
|
||||
#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
|
||||
|
@ -229,7 +202,6 @@ static int __init omap2_init_devices(void)
|
|||
* please keep these calls, and their implementations above,
|
||||
* in alphabetical order so they're easier to sort through.
|
||||
*/
|
||||
omap_init_mbox();
|
||||
omap_init_mcspi();
|
||||
omap_init_sham();
|
||||
omap_init_aes();
|
||||
|
|
|
@ -101,10 +101,8 @@ static void omap2_onenand_set_async_mode(void __iomem *onenand_base)
|
|||
|
||||
static void set_onenand_cfg(void __iomem *onenand_base)
|
||||
{
|
||||
u32 reg;
|
||||
u32 reg = ONENAND_SYS_CFG1_RDY | ONENAND_SYS_CFG1_INT;
|
||||
|
||||
reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
|
||||
reg &= ~((0x7 << ONENAND_SYS_CFG1_BRL_SHIFT) | (0x7 << 9));
|
||||
reg |= (latency << ONENAND_SYS_CFG1_BRL_SHIFT) |
|
||||
ONENAND_SYS_CFG1_BL_16;
|
||||
if (onenand_flags & ONENAND_FLAG_SYNCREAD)
|
||||
|
@ -123,6 +121,7 @@ static void set_onenand_cfg(void __iomem *onenand_base)
|
|||
reg |= ONENAND_SYS_CFG1_VHF;
|
||||
else
|
||||
reg &= ~ONENAND_SYS_CFG1_VHF;
|
||||
|
||||
writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
|
||||
}
|
||||
|
||||
|
@ -289,6 +288,7 @@ static int omap2_onenand_setup_async(void __iomem *onenand_base)
|
|||
}
|
||||
}
|
||||
|
||||
onenand_async.sync_write = true;
|
||||
omap2_onenand_calc_async_timings(&t);
|
||||
|
||||
ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &onenand_async);
|
||||
|
|
|
@ -191,12 +191,22 @@ static int _omap_device_notifier_call(struct notifier_block *nb,
|
|||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
struct omap_device *od;
|
||||
int err;
|
||||
|
||||
switch (event) {
|
||||
case BUS_NOTIFY_DEL_DEVICE:
|
||||
if (pdev->archdata.od)
|
||||
omap_device_delete(pdev->archdata.od);
|
||||
break;
|
||||
case BUS_NOTIFY_UNBOUND_DRIVER:
|
||||
od = to_omap_device(pdev);
|
||||
if (od && (od->_state == OMAP_DEVICE_STATE_ENABLED)) {
|
||||
dev_info(dev, "enabled after unload, idling\n");
|
||||
err = omap_device_idle(pdev);
|
||||
if (err)
|
||||
dev_err(dev, "failed to idle\n");
|
||||
}
|
||||
break;
|
||||
case BUS_NOTIFY_ADD_DEVICE:
|
||||
if (pdev->dev.of_node)
|
||||
omap_device_build_from_dt(pdev);
|
||||
|
@ -602,8 +612,10 @@ static int _od_runtime_resume(struct device *dev)
|
|||
int ret;
|
||||
|
||||
ret = omap_device_enable(pdev);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
dev_err(dev, "use pm_runtime_put_sync_suspend() in driver?\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return pm_generic_runtime_resume(dev);
|
||||
}
|
||||
|
|
|
@ -23,6 +23,8 @@
|
|||
#include <linux/platform_data/pinctrl-single.h>
|
||||
#include <linux/platform_data/iommu-omap.h>
|
||||
#include <linux/platform_data/wkup_m3.h>
|
||||
#include <linux/platform_data/pwm_omap_dmtimer.h>
|
||||
#include <plat/dmtimer.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "common-board-devices.h"
|
||||
|
@ -449,6 +451,24 @@ void omap_auxdata_legacy_init(struct device *dev)
|
|||
dev->platform_data = &twl_gpio_auxdata;
|
||||
}
|
||||
|
||||
/* Dual mode timer PWM callbacks platdata */
|
||||
#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
|
||||
struct pwm_omap_dmtimer_pdata pwm_dmtimer_pdata = {
|
||||
.request_by_node = omap_dm_timer_request_by_node,
|
||||
.free = omap_dm_timer_free,
|
||||
.enable = omap_dm_timer_enable,
|
||||
.disable = omap_dm_timer_disable,
|
||||
.get_fclk = omap_dm_timer_get_fclk,
|
||||
.start = omap_dm_timer_start,
|
||||
.stop = omap_dm_timer_stop,
|
||||
.set_load = omap_dm_timer_set_load,
|
||||
.set_match = omap_dm_timer_set_match,
|
||||
.set_pwm = omap_dm_timer_set_pwm,
|
||||
.set_prescaler = omap_dm_timer_set_prescaler,
|
||||
.write_counter = omap_dm_timer_write_counter,
|
||||
};
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Few boards still need auxdata populated before we populate
|
||||
* the dev entries in of_platform_populate().
|
||||
|
@ -502,6 +522,9 @@ static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
|
|||
OF_DEV_AUXDATA("ti,am4372-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
|
||||
&wkup_m3_data),
|
||||
#endif
|
||||
#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
|
||||
OF_DEV_AUXDATA("ti,omap-dmtimer-pwm", 0, NULL, &pwm_dmtimer_pdata),
|
||||
#endif
|
||||
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
|
||||
OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu",
|
||||
&omap4_iommu_pdata),
|
||||
|
|
|
@ -86,13 +86,18 @@ ENTRY(enable_omap3630_toggle_l2_on_restore)
|
|||
stmfd sp!, {lr} @ save registers on stack
|
||||
/* Setup so that we will disable and enable l2 */
|
||||
mov r1, #0x1
|
||||
adrl r2, l2dis_3630 @ may be too distant for plain adr
|
||||
str r1, [r2]
|
||||
adrl r3, l2dis_3630_offset @ may be too distant for plain adr
|
||||
ldr r2, [r3] @ value for offset
|
||||
str r1, [r2, r3] @ write to l2dis_3630
|
||||
ldmfd sp!, {pc} @ restore regs and return
|
||||
ENDPROC(enable_omap3630_toggle_l2_on_restore)
|
||||
|
||||
.text
|
||||
/* Function to call rom code to save secure ram context */
|
||||
/*
|
||||
* Function to call rom code to save secure ram context. This gets
|
||||
* relocated to SRAM, so it can be all in .data section. Otherwise
|
||||
* we need to initialize api_params separately.
|
||||
*/
|
||||
.data
|
||||
.align 3
|
||||
ENTRY(save_secure_ram_context)
|
||||
stmfd sp!, {r4 - r11, lr} @ save registers on stack
|
||||
|
@ -126,6 +131,8 @@ ENDPROC(save_secure_ram_context)
|
|||
ENTRY(save_secure_ram_context_sz)
|
||||
.word . - save_secure_ram_context
|
||||
|
||||
.text
|
||||
|
||||
/*
|
||||
* ======================
|
||||
* == Idle entry point ==
|
||||
|
@ -289,12 +296,6 @@ wait_sdrc_ready:
|
|||
bic r5, r5, #0x40
|
||||
str r5, [r4]
|
||||
|
||||
/*
|
||||
* PC-relative stores lead to undefined behaviour in Thumb-2: use a r7 as a
|
||||
* base instead.
|
||||
* Be careful not to clobber r7 when maintaing this code.
|
||||
*/
|
||||
|
||||
is_dll_in_lock_mode:
|
||||
/* Is dll in lock mode? */
|
||||
ldr r4, sdrc_dlla_ctrl
|
||||
|
@ -302,11 +303,7 @@ is_dll_in_lock_mode:
|
|||
tst r5, #0x4
|
||||
bne exit_nonoff_modes @ Return if locked
|
||||
/* wait till dll locks */
|
||||
adr r7, kick_counter
|
||||
wait_dll_lock_timed:
|
||||
ldr r4, wait_dll_lock_counter
|
||||
add r4, r4, #1
|
||||
str r4, [r7, #wait_dll_lock_counter - kick_counter]
|
||||
ldr r4, sdrc_dlla_status
|
||||
/* Wait 20uS for lock */
|
||||
mov r6, #8
|
||||
|
@ -330,9 +327,6 @@ kick_dll:
|
|||
orr r6, r6, #(1<<3) @ enable dll
|
||||
str r6, [r4]
|
||||
dsb
|
||||
ldr r4, kick_counter
|
||||
add r4, r4, #1
|
||||
str r4, [r7] @ kick_counter
|
||||
b wait_dll_lock_timed
|
||||
|
||||
exit_nonoff_modes:
|
||||
|
@ -360,15 +354,6 @@ sdrc_dlla_status:
|
|||
.word SDRC_DLLA_STATUS_V
|
||||
sdrc_dlla_ctrl:
|
||||
.word SDRC_DLLA_CTRL_V
|
||||
/*
|
||||
* When exporting to userspace while the counters are in SRAM,
|
||||
* these 2 words need to be at the end to facilitate retrival!
|
||||
*/
|
||||
kick_counter:
|
||||
.word 0
|
||||
wait_dll_lock_counter:
|
||||
.word 0
|
||||
|
||||
ENTRY(omap3_do_wfi_sz)
|
||||
.word . - omap3_do_wfi
|
||||
|
||||
|
@ -437,7 +422,9 @@ ENTRY(omap3_restore)
|
|||
cmp r2, #0x0 @ Check if target power state was OFF or RET
|
||||
bne logic_l1_restore
|
||||
|
||||
ldr r0, l2dis_3630
|
||||
adr r1, l2dis_3630_offset @ address for offset
|
||||
ldr r0, [r1] @ value for offset
|
||||
ldr r0, [r1, r0] @ value at l2dis_3630
|
||||
cmp r0, #0x1 @ should we disable L2 on 3630?
|
||||
bne skipl2dis
|
||||
mrc p15, 0, r0, c1, c0, 1
|
||||
|
@ -449,12 +436,14 @@ skipl2dis:
|
|||
and r1, #0x700
|
||||
cmp r1, #0x300
|
||||
beq l2_inv_gp
|
||||
adr r0, l2_inv_api_params_offset
|
||||
ldr r3, [r0]
|
||||
add r3, r3, r0 @ r3 points to dummy parameters
|
||||
mov r0, #40 @ set service ID for PPA
|
||||
mov r12, r0 @ copy secure Service ID in r12
|
||||
mov r1, #0 @ set task id for ROM code in r1
|
||||
mov r2, #4 @ set some flags in r2, r6
|
||||
mov r6, #0xff
|
||||
adr r3, l2_inv_api_params @ r3 points to dummy parameters
|
||||
dsb @ data write barrier
|
||||
dmb @ data memory barrier
|
||||
smc #1 @ call SMI monitor (smi #1)
|
||||
|
@ -488,8 +477,8 @@ skipl2dis:
|
|||
b logic_l1_restore
|
||||
|
||||
.align
|
||||
l2_inv_api_params:
|
||||
.word 0x1, 0x00
|
||||
l2_inv_api_params_offset:
|
||||
.long l2_inv_api_params - .
|
||||
l2_inv_gp:
|
||||
/* Execute smi to invalidate L2 cache */
|
||||
mov r12, #0x1 @ set up to invalidate L2
|
||||
|
@ -506,7 +495,9 @@ l2_inv_gp:
|
|||
mov r12, #0x2
|
||||
smc #0 @ Call SMI monitor (smieq)
|
||||
logic_l1_restore:
|
||||
ldr r1, l2dis_3630
|
||||
adr r0, l2dis_3630_offset @ adress for offset
|
||||
ldr r1, [r0] @ value for offset
|
||||
ldr r1, [r0, r1] @ value at l2dis_3630
|
||||
cmp r1, #0x1 @ Test if L2 re-enable needed on 3630
|
||||
bne skipl2reen
|
||||
mrc p15, 0, r1, c1, c0, 1
|
||||
|
@ -535,9 +526,17 @@ control_stat:
|
|||
.word CONTROL_STAT
|
||||
control_mem_rta:
|
||||
.word CONTROL_MEM_RTA_CTRL
|
||||
l2dis_3630_offset:
|
||||
.long l2dis_3630 - .
|
||||
|
||||
.data
|
||||
l2dis_3630:
|
||||
.word 0
|
||||
|
||||
.data
|
||||
l2_inv_api_params:
|
||||
.word 0x1, 0x00
|
||||
|
||||
/*
|
||||
* Internal functions
|
||||
*/
|
||||
|
|
|
@ -29,12 +29,6 @@
|
|||
dsb
|
||||
.endm
|
||||
|
||||
ppa_zero_params:
|
||||
.word 0x0
|
||||
|
||||
ppa_por_params:
|
||||
.word 1, 0
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP4
|
||||
|
||||
/*
|
||||
|
@ -266,7 +260,9 @@ ENTRY(omap4_cpu_resume)
|
|||
beq skip_ns_smp_enable
|
||||
ppa_actrl_retry:
|
||||
mov r0, #OMAP4_PPA_CPU_ACTRL_SMP_INDEX
|
||||
adr r3, ppa_zero_params @ Pointer to parameters
|
||||
adr r1, ppa_zero_params_offset
|
||||
ldr r3, [r1]
|
||||
add r3, r3, r1 @ Pointer to ppa_zero_params
|
||||
mov r1, #0x0 @ Process ID
|
||||
mov r2, #0x4 @ Flag
|
||||
mov r6, #0xff
|
||||
|
@ -303,7 +299,9 @@ skip_ns_smp_enable:
|
|||
ldr r0, =OMAP4_PPA_L2_POR_INDEX
|
||||
ldr r1, =OMAP44XX_SAR_RAM_BASE
|
||||
ldr r4, [r1, #L2X0_PREFETCH_CTRL_OFFSET]
|
||||
adr r3, ppa_por_params
|
||||
adr r1, ppa_por_params_offset
|
||||
ldr r3, [r1]
|
||||
add r3, r3, r1 @ Pointer to ppa_por_params
|
||||
str r4, [r3, #0x04]
|
||||
mov r1, #0x0 @ Process ID
|
||||
mov r2, #0x4 @ Flag
|
||||
|
@ -328,6 +326,8 @@ skip_l2en:
|
|||
#endif
|
||||
|
||||
b cpu_resume @ Jump to generic resume
|
||||
ppa_por_params_offset:
|
||||
.long ppa_por_params - .
|
||||
ENDPROC(omap4_cpu_resume)
|
||||
#endif /* CONFIG_ARCH_OMAP4 */
|
||||
|
||||
|
@ -380,4 +380,13 @@ ENTRY(omap_do_wfi)
|
|||
nop
|
||||
|
||||
ldmfd sp!, {pc}
|
||||
ppa_zero_params_offset:
|
||||
.long ppa_zero_params - .
|
||||
ENDPROC(omap_do_wfi)
|
||||
|
||||
.data
|
||||
ppa_zero_params:
|
||||
.word 0
|
||||
|
||||
ppa_por_params:
|
||||
.word 1, 0
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
menuconfig ARCH_REALVIEW
|
||||
bool "ARM Ltd. RealView family" if ARCH_MULTI_V5 || ARCH_MULTI_V6 || ARCH_MULTI_V7
|
||||
bool "ARM Ltd. RealView family"
|
||||
depends on ARCH_MULTI_V5 || ARCH_MULTI_V6 || ARCH_MULTI_V7
|
||||
select ARM_AMBA
|
||||
select ARM_TIMER_SP804
|
||||
select COMMON_CLK_VERSATILE
|
||||
|
|
|
@ -80,7 +80,7 @@ static void __init realview_smp_prepare_cpus(unsigned int max_cpus)
|
|||
virt_to_phys(versatile_secondary_startup));
|
||||
}
|
||||
|
||||
struct smp_operations realview_dt_smp_ops __initdata = {
|
||||
static const struct smp_operations realview_dt_smp_ops __initconst = {
|
||||
.smp_prepare_cpus = realview_smp_prepare_cpus,
|
||||
.smp_secondary_init = versatile_secondary_init,
|
||||
.smp_boot_secondary = versatile_boot_secondary,
|
||||
|
|
|
@ -4,7 +4,6 @@
|
|||
extern void shmobile_init_delay(void);
|
||||
extern void shmobile_boot_vector(void);
|
||||
extern unsigned long shmobile_boot_fn;
|
||||
extern unsigned long shmobile_boot_arg;
|
||||
extern unsigned long shmobile_boot_size;
|
||||
extern void shmobile_smp_boot(void);
|
||||
extern void shmobile_smp_sleep(void);
|
||||
|
|
|
@ -38,9 +38,3 @@ ENTRY(shmobile_boot_scu)
|
|||
|
||||
b secondary_startup
|
||||
ENDPROC(shmobile_boot_scu)
|
||||
|
||||
.text
|
||||
.align 2
|
||||
.globl shmobile_scu_base
|
||||
shmobile_scu_base:
|
||||
.space 4
|
||||
|
|
|
@ -24,7 +24,6 @@
|
|||
.arm
|
||||
.align 12
|
||||
ENTRY(shmobile_boot_vector)
|
||||
ldr r0, 2f
|
||||
ldr r1, 1f
|
||||
bx r1
|
||||
|
||||
|
@ -34,9 +33,6 @@ ENDPROC(shmobile_boot_vector)
|
|||
.globl shmobile_boot_fn
|
||||
shmobile_boot_fn:
|
||||
1: .space 4
|
||||
.globl shmobile_boot_arg
|
||||
shmobile_boot_arg:
|
||||
2: .space 4
|
||||
.globl shmobile_boot_size
|
||||
shmobile_boot_size:
|
||||
.long . - shmobile_boot_vector
|
||||
|
@ -46,13 +42,15 @@ shmobile_boot_size:
|
|||
*/
|
||||
|
||||
ENTRY(shmobile_smp_boot)
|
||||
@ r0 = MPIDR_HWID_BITMASK
|
||||
mrc p15, 0, r1, c0, c0, 5 @ r1 = MPIDR
|
||||
and r0, r1, r0 @ r0 = cpu_logical_map() value
|
||||
and r0, r1, #0xffffff @ MPIDR_HWID_BITMASK
|
||||
@ r0 = cpu_logical_map() value
|
||||
mov r1, #0 @ r1 = CPU index
|
||||
adr r5, 1f @ array of per-cpu mpidr values
|
||||
adr r6, 2f @ array of per-cpu functions
|
||||
adr r7, 3f @ array of per-cpu arguments
|
||||
adr r2, 1f
|
||||
ldmia r2, {r5, r6, r7}
|
||||
add r5, r5, r2 @ array of per-cpu mpidr values
|
||||
add r6, r6, r2 @ array of per-cpu functions
|
||||
add r7, r7, r2 @ array of per-cpu arguments
|
||||
|
||||
shmobile_smp_boot_find_mpidr:
|
||||
ldr r8, [r5, r1, lsl #2]
|
||||
|
@ -80,12 +78,18 @@ ENTRY(shmobile_smp_sleep)
|
|||
b shmobile_smp_boot
|
||||
ENDPROC(shmobile_smp_sleep)
|
||||
|
||||
.align 2
|
||||
1: .long shmobile_smp_mpidr - .
|
||||
.long shmobile_smp_fn - 1b
|
||||
.long shmobile_smp_arg - 1b
|
||||
|
||||
.bss
|
||||
.globl shmobile_smp_mpidr
|
||||
shmobile_smp_mpidr:
|
||||
1: .space NR_CPUS * 4
|
||||
.space NR_CPUS * 4
|
||||
.globl shmobile_smp_fn
|
||||
shmobile_smp_fn:
|
||||
2: .space NR_CPUS * 4
|
||||
.space NR_CPUS * 4
|
||||
.globl shmobile_smp_arg
|
||||
shmobile_smp_arg:
|
||||
3: .space NR_CPUS * 4
|
||||
.space NR_CPUS * 4
|
||||
|
|
|
@ -123,7 +123,6 @@ void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
|
|||
{
|
||||
/* install boot code shared by all CPUs */
|
||||
shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
|
||||
shmobile_boot_arg = MPIDR_HWID_BITMASK;
|
||||
|
||||
/* perform per-cpu setup */
|
||||
apmu_parse_cfg(apmu_init_cpu, apmu_config, num);
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue