mfd: wm8997: Add registers for high power mode
Some output configurations can require a 50Mhz SYSCLK which requires DCVDD to be 1.8V. This patch adds the registers necessary for supporting this operational mode. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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@ -846,6 +846,7 @@ static bool wm8997_readable_register(struct device *dev, unsigned int reg)
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case ARIZONA_RATE_ESTIMATOR_3:
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case ARIZONA_RATE_ESTIMATOR_4:
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case ARIZONA_RATE_ESTIMATOR_5:
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case ARIZONA_DYNAMIC_FREQUENCY_SCALING_1:
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case ARIZONA_FLL1_CONTROL_1:
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case ARIZONA_FLL1_CONTROL_2:
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case ARIZONA_FLL1_CONTROL_3:
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@ -880,6 +881,7 @@ static bool wm8997_readable_register(struct device *dev, unsigned int reg)
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case ARIZONA_FLL2_GPIO_CLOCK:
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case ARIZONA_MIC_CHARGE_PUMP_1:
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case ARIZONA_LDO1_CONTROL_1:
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case ARIZONA_LDO1_CONTROL_2:
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case ARIZONA_LDO2_CONTROL_1:
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case ARIZONA_MIC_BIAS_CTRL_1:
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case ARIZONA_MIC_BIAS_CTRL_2:
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