Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (169 commits) commit78a596b449Author: Adrian Bunk <bunk@stusta.de> Date: Fri Mar 31 01:38:12 2006 -0800 [PATCH] remove kernel/power/pm.c:pm_unregister() Since the last user is removed in -mm, we can now remove this long deprecated function. Signed-off-by: Adrian Bunk <bunk@stusta.de> Cc: Pavel Machek <pavel@ucw.cz> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> commit21440d3133Author: David Brownell <david-b@pacbell.net> Date: Sat Apr 1 10:21:52 2006 -0800 [PATCH] dma doc updates ...
This commit is contained in:
Linus Torvalds
commit
bcdc084257
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@ -33,7 +33,9 @@ pci_alloc_consistent(struct pci_dev *dev, size_t size,
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Consistent memory is memory for which a write by either the device or
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the processor can immediately be read by the processor or device
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without having to worry about caching effects.
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without having to worry about caching effects. (You may however need
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to make sure to flush the processor's write buffers before telling
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devices to read that memory.)
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This routine allocates a region of <size> bytes of consistent memory.
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it also returns a <dma_handle> which may be cast to an unsigned
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@ -304,12 +306,12 @@ dma address with dma_mapping_error(). A non zero return value means the mapping
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could not be created and the driver should take appropriate action (eg
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reduce current DMA mapping usage or delay and try again later).
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int
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dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction direction)
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int
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pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
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int nents, int direction)
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int
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dma_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction)
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int
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pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
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int nents, int direction)
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Maps a scatter gather list from the block layer.
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@ -327,12 +329,33 @@ critical that the driver do something, in the case of a block driver
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aborting the request or even oopsing is better than doing nothing and
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corrupting the filesystem.
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void
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dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
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enum dma_data_direction direction)
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void
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pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
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int nents, int direction)
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With scatterlists, you use the resulting mapping like this:
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int i, count = dma_map_sg(dev, sglist, nents, direction);
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struct scatterlist *sg;
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for (i = 0, sg = sglist; i < count; i++, sg++) {
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hw_address[i] = sg_dma_address(sg);
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hw_len[i] = sg_dma_len(sg);
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}
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where nents is the number of entries in the sglist.
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The implementation is free to merge several consecutive sglist entries
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into one (e.g. with an IOMMU, or if several pages just happen to be
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physically contiguous) and returns the actual number of sg entries it
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mapped them to. On failure 0, is returned.
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Then you should loop count times (note: this can be less than nents times)
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and use sg_dma_address() and sg_dma_len() macros where you previously
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accessed sg->address and sg->length as shown above.
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void
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dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nhwentries, enum dma_data_direction direction)
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void
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pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
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int nents, int direction)
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unmap the previously mapped scatter/gather list. All the parameters
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must be the same as those and passed in to the scatter/gather mapping
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@ -58,11 +58,15 @@ translating each of those pages back to a kernel address using
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something like __va(). [ EDIT: Update this when we integrate
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Gerd Knorr's generic code which does this. ]
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This rule also means that you may not use kernel image addresses
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(ie. items in the kernel's data/text/bss segment, or your driver's)
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nor may you use kernel stack addresses for DMA. Both of these items
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might be mapped somewhere entirely different than the rest of physical
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memory.
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This rule also means that you may use neither kernel image addresses
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(items in data/text/bss segments), nor module image addresses, nor
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stack addresses for DMA. These could all be mapped somewhere entirely
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different than the rest of physical memory. Even if those classes of
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memory could physically work with DMA, you'd need to ensure the I/O
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buffers were cacheline-aligned. Without that, you'd see cacheline
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sharing problems (data corruption) on CPUs with DMA-incoherent caches.
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(The CPU could write to one word, DMA would write to a different one
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in the same cache line, and one of them could be overwritten.)
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Also, this means that you cannot take the return of a kmap()
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call and DMA to/from that. This is similar to vmalloc().
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@ -284,6 +288,11 @@ There are two types of DMA mappings:
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in order to get correct behavior on all platforms.
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Also, on some platforms your driver may need to flush CPU write
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buffers in much the same way as it needs to flush write buffers
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found in PCI bridges (such as by reading a register's value
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after writing it).
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- Streaming DMA mappings which are usually mapped for one DMA transfer,
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unmapped right after it (unless you use pci_dma_sync_* below) and for which
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hardware can optimize for sequential accesses.
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@ -303,6 +312,9 @@ There are two types of DMA mappings:
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Neither type of DMA mapping has alignment restrictions that come
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from PCI, although some devices may have such restrictions.
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Also, systems with caches that aren't DMA-coherent will work better
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when the underlying buffers don't share cache lines with other data.
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Using Consistent DMA mappings.
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@ -588,7 +588,10 @@ static __init int via_router_probe(struct irq_router *r,
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case PCI_DEVICE_ID_VIA_82C596:
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case PCI_DEVICE_ID_VIA_82C686:
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case PCI_DEVICE_ID_VIA_8231:
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case PCI_DEVICE_ID_VIA_8233A:
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case PCI_DEVICE_ID_VIA_8235:
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case PCI_DEVICE_ID_VIA_8237:
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case PCI_DEVICE_ID_VIA_8237_SATA:
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/* FIXME: add new ones for 8233/5 */
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r->name = "VIA";
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r->get = pirq_via_get;
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@ -360,9 +360,6 @@ static int __init rpaphp_init(void)
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while ((dn = of_find_node_by_type(dn, "pci")))
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rpaphp_add_slot(dn);
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if (!num_slots)
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return -ENODEV;
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return 0;
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}
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@ -504,6 +504,201 @@ void pci_scan_msi_device(struct pci_dev *dev)
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nr_reserved_vectors++;
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}
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#ifdef CONFIG_PM
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int pci_save_msi_state(struct pci_dev *dev)
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{
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int pos, i = 0;
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u16 control;
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struct pci_cap_saved_state *save_state;
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u32 *cap;
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pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
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if (pos <= 0 || dev->no_msi)
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return 0;
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pci_read_config_word(dev, msi_control_reg(pos), &control);
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if (!(control & PCI_MSI_FLAGS_ENABLE))
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return 0;
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save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u32) * 5,
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GFP_KERNEL);
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if (!save_state) {
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printk(KERN_ERR "Out of memory in pci_save_msi_state\n");
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return -ENOMEM;
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}
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cap = &save_state->data[0];
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pci_read_config_dword(dev, pos, &cap[i++]);
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control = cap[0] >> 16;
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pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, &cap[i++]);
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if (control & PCI_MSI_FLAGS_64BIT) {
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pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, &cap[i++]);
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pci_read_config_dword(dev, pos + PCI_MSI_DATA_64, &cap[i++]);
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} else
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pci_read_config_dword(dev, pos + PCI_MSI_DATA_32, &cap[i++]);
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if (control & PCI_MSI_FLAGS_MASKBIT)
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pci_read_config_dword(dev, pos + PCI_MSI_MASK_BIT, &cap[i++]);
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disable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
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save_state->cap_nr = PCI_CAP_ID_MSI;
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pci_add_saved_cap(dev, save_state);
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return 0;
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}
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void pci_restore_msi_state(struct pci_dev *dev)
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{
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int i = 0, pos;
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u16 control;
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struct pci_cap_saved_state *save_state;
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u32 *cap;
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save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSI);
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pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
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if (!save_state || pos <= 0)
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return;
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cap = &save_state->data[0];
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control = cap[i++] >> 16;
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pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, cap[i++]);
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if (control & PCI_MSI_FLAGS_64BIT) {
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pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, cap[i++]);
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pci_write_config_dword(dev, pos + PCI_MSI_DATA_64, cap[i++]);
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} else
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pci_write_config_dword(dev, pos + PCI_MSI_DATA_32, cap[i++]);
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if (control & PCI_MSI_FLAGS_MASKBIT)
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pci_write_config_dword(dev, pos + PCI_MSI_MASK_BIT, cap[i++]);
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pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
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enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
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pci_remove_saved_cap(save_state);
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kfree(save_state);
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}
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int pci_save_msix_state(struct pci_dev *dev)
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{
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int pos;
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u16 control;
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struct pci_cap_saved_state *save_state;
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pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
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if (pos <= 0 || dev->no_msi)
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return 0;
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pci_read_config_word(dev, msi_control_reg(pos), &control);
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if (!(control & PCI_MSIX_FLAGS_ENABLE))
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return 0;
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save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u16),
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GFP_KERNEL);
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if (!save_state) {
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printk(KERN_ERR "Out of memory in pci_save_msix_state\n");
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return -ENOMEM;
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}
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*((u16 *)&save_state->data[0]) = control;
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disable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
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save_state->cap_nr = PCI_CAP_ID_MSIX;
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pci_add_saved_cap(dev, save_state);
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return 0;
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}
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void pci_restore_msix_state(struct pci_dev *dev)
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{
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u16 save;
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int pos;
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int vector, head, tail = 0;
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void __iomem *base;
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int j;
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struct msg_address address;
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struct msg_data data;
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struct msi_desc *entry;
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int temp;
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struct pci_cap_saved_state *save_state;
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save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSIX);
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if (!save_state)
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return;
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save = *((u16 *)&save_state->data[0]);
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pci_remove_saved_cap(save_state);
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kfree(save_state);
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pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
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if (pos <= 0)
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return;
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/* route the table */
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temp = dev->irq;
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if (msi_lookup_vector(dev, PCI_CAP_ID_MSIX))
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return;
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vector = head = dev->irq;
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while (head != tail) {
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entry = msi_desc[vector];
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base = entry->mask_base;
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j = entry->msi_attrib.entry_nr;
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msi_address_init(&address);
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msi_data_init(&data, vector);
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address.lo_address.value &= MSI_ADDRESS_DEST_ID_MASK;
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address.lo_address.value |= entry->msi_attrib.current_cpu <<
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MSI_TARGET_CPU_SHIFT;
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writel(address.lo_address.value,
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base + j * PCI_MSIX_ENTRY_SIZE +
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PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
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writel(address.hi_address,
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base + j * PCI_MSIX_ENTRY_SIZE +
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PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
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writel(*(u32*)&data,
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base + j * PCI_MSIX_ENTRY_SIZE +
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PCI_MSIX_ENTRY_DATA_OFFSET);
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tail = msi_desc[vector]->link.tail;
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vector = tail;
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}
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dev->irq = temp;
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pci_write_config_word(dev, msi_control_reg(pos), save);
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enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
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}
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#endif
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static void msi_register_init(struct pci_dev *dev, struct msi_desc *entry)
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{
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struct msg_address address;
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struct msg_data data;
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int pos, vector = dev->irq;
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u16 control;
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pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
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pci_read_config_word(dev, msi_control_reg(pos), &control);
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/* Configure MSI capability structure */
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msi_address_init(&address);
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msi_data_init(&data, vector);
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entry->msi_attrib.current_cpu = ((address.lo_address.u.dest_id >>
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MSI_TARGET_CPU_SHIFT) & MSI_TARGET_CPU_MASK);
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pci_write_config_dword(dev, msi_lower_address_reg(pos),
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||||
address.lo_address.value);
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||||
if (is_64bit_address(control)) {
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pci_write_config_dword(dev,
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||||
msi_upper_address_reg(pos), address.hi_address);
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pci_write_config_word(dev,
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||||
msi_data_reg(pos, 1), *((u32*)&data));
|
||||
} else
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||||
pci_write_config_word(dev,
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||||
msi_data_reg(pos, 0), *((u32*)&data));
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||||
if (entry->msi_attrib.maskbit) {
|
||||
unsigned int maskbits, temp;
|
||||
/* All MSIs are unmasked by default, Mask them all */
|
||||
pci_read_config_dword(dev,
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||||
msi_mask_bits_reg(pos, is_64bit_address(control)),
|
||||
&maskbits);
|
||||
temp = (1 << multi_msi_capable(control));
|
||||
temp = ((temp - 1) & ~temp);
|
||||
maskbits |= temp;
|
||||
pci_write_config_dword(dev,
|
||||
msi_mask_bits_reg(pos, is_64bit_address(control)),
|
||||
maskbits);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* msi_capability_init - configure device's MSI capability structure
|
||||
* @dev: pointer to the pci_dev data structure of MSI device function
|
||||
|
|
@ -516,8 +711,6 @@ void pci_scan_msi_device(struct pci_dev *dev)
|
|||
static int msi_capability_init(struct pci_dev *dev)
|
||||
{
|
||||
struct msi_desc *entry;
|
||||
struct msg_address address;
|
||||
struct msg_data data;
|
||||
int pos, vector;
|
||||
u16 control;
|
||||
|
||||
|
|
@ -549,33 +742,8 @@ static int msi_capability_init(struct pci_dev *dev)
|
|||
/* Replace with MSI handler */
|
||||
irq_handler_init(PCI_CAP_ID_MSI, vector, entry->msi_attrib.maskbit);
|
||||
/* Configure MSI capability structure */
|
||||
msi_address_init(&address);
|
||||
msi_data_init(&data, vector);
|
||||
entry->msi_attrib.current_cpu = ((address.lo_address.u.dest_id >>
|
||||
MSI_TARGET_CPU_SHIFT) & MSI_TARGET_CPU_MASK);
|
||||
pci_write_config_dword(dev, msi_lower_address_reg(pos),
|
||||
address.lo_address.value);
|
||||
if (is_64bit_address(control)) {
|
||||
pci_write_config_dword(dev,
|
||||
msi_upper_address_reg(pos), address.hi_address);
|
||||
pci_write_config_word(dev,
|
||||
msi_data_reg(pos, 1), *((u32*)&data));
|
||||
} else
|
||||
pci_write_config_word(dev,
|
||||
msi_data_reg(pos, 0), *((u32*)&data));
|
||||
if (entry->msi_attrib.maskbit) {
|
||||
unsigned int maskbits, temp;
|
||||
/* All MSIs are unmasked by default, Mask them all */
|
||||
pci_read_config_dword(dev,
|
||||
msi_mask_bits_reg(pos, is_64bit_address(control)),
|
||||
&maskbits);
|
||||
temp = (1 << multi_msi_capable(control));
|
||||
temp = ((temp - 1) & ~temp);
|
||||
maskbits |= temp;
|
||||
pci_write_config_dword(dev,
|
||||
msi_mask_bits_reg(pos, is_64bit_address(control)),
|
||||
maskbits);
|
||||
}
|
||||
msi_register_init(dev, entry);
|
||||
|
||||
attach_msi_entry(entry, vector);
|
||||
/* Set MSI enabled bits */
|
||||
enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
|
||||
|
|
@ -731,6 +899,7 @@ int pci_enable_msi(struct pci_dev* dev)
|
|||
vector_irq[dev->irq] = -1;
|
||||
nr_released_vectors--;
|
||||
spin_unlock_irqrestore(&msi_lock, flags);
|
||||
msi_register_init(dev, msi_desc[dev->irq]);
|
||||
enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -446,6 +446,10 @@ pci_save_state(struct pci_dev *dev)
|
|||
/* XXX: 100% dword access ok here? */
|
||||
for (i = 0; i < 16; i++)
|
||||
pci_read_config_dword(dev, i * 4,&dev->saved_config_space[i]);
|
||||
if ((i = pci_save_msi_state(dev)) != 0)
|
||||
return i;
|
||||
if ((i = pci_save_msix_state(dev)) != 0)
|
||||
return i;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -460,6 +464,8 @@ pci_restore_state(struct pci_dev *dev)
|
|||
|
||||
for (i = 0; i < 16; i++)
|
||||
pci_write_config_dword(dev,i * 4, dev->saved_config_space[i]);
|
||||
pci_restore_msi_state(dev);
|
||||
pci_restore_msix_state(dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -55,6 +55,17 @@ void pci_no_msi(void);
|
|||
static inline void disable_msi_mode(struct pci_dev *dev, int pos, int type) { }
|
||||
static inline void pci_no_msi(void) { }
|
||||
#endif
|
||||
#if defined(CONFIG_PCI_MSI) && defined(CONFIG_PM)
|
||||
int pci_save_msi_state(struct pci_dev *dev);
|
||||
int pci_save_msix_state(struct pci_dev *dev);
|
||||
void pci_restore_msi_state(struct pci_dev *dev);
|
||||
void pci_restore_msix_state(struct pci_dev *dev);
|
||||
#else
|
||||
static inline int pci_save_msi_state(struct pci_dev *dev) { return 0; }
|
||||
static inline int pci_save_msix_state(struct pci_dev *dev) { return 0; }
|
||||
static inline void pci_restore_msi_state(struct pci_dev *dev) {}
|
||||
static inline void pci_restore_msix_state(struct pci_dev *dev) {}
|
||||
#endif
|
||||
|
||||
extern int pcie_mch_quirk;
|
||||
extern struct device_attribute pci_dev_attrs[];
|
||||
|
|
|
|||
|
|
@ -592,7 +592,7 @@ static void __init quirk_amd_8131_ioapic(struct pci_dev *dev)
|
|||
pci_write_config_byte( dev, AMD8131_MISC, tmp);
|
||||
}
|
||||
}
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_APIC, quirk_amd_8131_ioapic );
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_amd_8131_ioapic);
|
||||
|
||||
static void __init quirk_svw_msi(struct pci_dev *dev)
|
||||
{
|
||||
|
|
@ -921,6 +921,7 @@ static void __init asus_hides_smbus_hostbridge(struct pci_dev *dev)
|
|||
if (dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB) {
|
||||
switch (dev->subsystem_device) {
|
||||
case 0x1882: /* M6V notebook */
|
||||
case 0x1977: /* A6VA notebook */
|
||||
asus_hides_smbus = 1;
|
||||
}
|
||||
}
|
||||
|
|
@ -999,6 +1000,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0, asu
|
|||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12, asus_hides_smbus_lpc );
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12, asus_hides_smbus_lpc );
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, asus_hides_smbus_lpc );
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, asus_hides_smbus_lpc );
|
||||
|
||||
static void __init asus_hides_smbus_lpc_ich6(struct pci_dev *dev)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -97,7 +97,13 @@ enum pci_channel_state {
|
|||
|
||||
typedef unsigned short __bitwise pci_bus_flags_t;
|
||||
enum pci_bus_flags {
|
||||
PCI_BUS_FLAGS_NO_MSI = (pci_bus_flags_t) 1,
|
||||
PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
|
||||
};
|
||||
|
||||
struct pci_cap_saved_state {
|
||||
struct hlist_node next;
|
||||
char cap_nr;
|
||||
u32 data[0];
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -159,6 +165,7 @@ struct pci_dev {
|
|||
unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
|
||||
|
||||
u32 saved_config_space[16]; /* config space saved at suspend time */
|
||||
struct hlist_head saved_cap_space;
|
||||
struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
|
||||
int rom_attr_enabled; /* has display of the rom attribute been enabled? */
|
||||
struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
|
||||
|
|
@ -169,6 +176,30 @@ struct pci_dev {
|
|||
#define to_pci_dev(n) container_of(n, struct pci_dev, dev)
|
||||
#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
|
||||
|
||||
static inline struct pci_cap_saved_state *pci_find_saved_cap(
|
||||
struct pci_dev *pci_dev,char cap)
|
||||
{
|
||||
struct pci_cap_saved_state *tmp;
|
||||
struct hlist_node *pos;
|
||||
|
||||
hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
|
||||
if (tmp->cap_nr == cap)
|
||||
return tmp;
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
|
||||
struct pci_cap_saved_state *new_cap)
|
||||
{
|
||||
hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
|
||||
}
|
||||
|
||||
static inline void pci_remove_saved_cap(struct pci_cap_saved_state *cap)
|
||||
{
|
||||
hlist_del(&cap->next);
|
||||
}
|
||||
|
||||
/*
|
||||
* For PCI devices, the region numbers are assigned this way:
|
||||
*
|
||||
|
|
|
|||
|
|
@ -497,7 +497,8 @@
|
|||
#define PCI_DEVICE_ID_AMD_8111_SMBUS 0x746b
|
||||
#define PCI_DEVICE_ID_AMD_8111_AUDIO 0x746d
|
||||
#define PCI_DEVICE_ID_AMD_8151_0 0x7454
|
||||
#define PCI_DEVICE_ID_AMD_8131_APIC 0x7450
|
||||
#define PCI_DEVICE_ID_AMD_8131_BRIDGE 0x7450
|
||||
#define PCI_DEVICE_ID_AMD_8131_APIC 0x7451
|
||||
#define PCI_DEVICE_ID_AMD_CS5536_ISA 0x2090
|
||||
#define PCI_DEVICE_ID_AMD_CS5536_FLASH 0x2091
|
||||
#define PCI_DEVICE_ID_AMD_CS5536_AUDIO 0x2093
|
||||
|
|
|
|||
|
|
@ -15,11 +15,6 @@ extern int pm_active;
|
|||
struct pm_dev __deprecated *
|
||||
pm_register(pm_dev_t type, unsigned long id, pm_callback callback);
|
||||
|
||||
/*
|
||||
* Unregister a device with power management
|
||||
*/
|
||||
void __deprecated pm_unregister(struct pm_dev *dev);
|
||||
|
||||
/*
|
||||
* Unregister all devices with matching callback
|
||||
*/
|
||||
|
|
@ -41,8 +36,6 @@ static inline struct pm_dev *pm_register(pm_dev_t type,
|
|||
return NULL;
|
||||
}
|
||||
|
||||
static inline void pm_unregister(struct pm_dev *dev) {}
|
||||
|
||||
static inline void pm_unregister_all(pm_callback callback) {}
|
||||
|
||||
static inline int pm_send_all(pm_request_t rqst, void *data)
|
||||
|
|
|
|||
|
|
@ -75,25 +75,6 @@ struct pm_dev *pm_register(pm_dev_t type,
|
|||
return dev;
|
||||
}
|
||||
|
||||
/**
|
||||
* pm_unregister - unregister a device with power management
|
||||
* @dev: device to unregister
|
||||
*
|
||||
* Remove a device from the power management notification lists. The
|
||||
* dev passed must be a handle previously returned by pm_register.
|
||||
*/
|
||||
|
||||
void pm_unregister(struct pm_dev *dev)
|
||||
{
|
||||
if (dev) {
|
||||
mutex_lock(&pm_devs_lock);
|
||||
list_del(&dev->entry);
|
||||
mutex_unlock(&pm_devs_lock);
|
||||
|
||||
kfree(dev);
|
||||
}
|
||||
}
|
||||
|
||||
static void __pm_unregister(struct pm_dev *dev)
|
||||
{
|
||||
if (dev) {
|
||||
|
|
@ -258,7 +239,6 @@ int pm_send_all(pm_request_t rqst, void *data)
|
|||
}
|
||||
|
||||
EXPORT_SYMBOL(pm_register);
|
||||
EXPORT_SYMBOL(pm_unregister);
|
||||
EXPORT_SYMBOL(pm_unregister_all);
|
||||
EXPORT_SYMBOL(pm_send_all);
|
||||
EXPORT_SYMBOL(pm_active);
|
||||
|
|
|
|||
Loading…
Reference in New Issue