drm/amdgpu: split psp ring init function
Rework in order to properly support suspend. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -55,6 +55,7 @@ static int psp_sw_init(void *handle)
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psp->bootloader_load_sos = psp_v3_1_bootloader_load_sos;
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psp->prep_cmd_buf = psp_v3_1_prep_cmd_buf;
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psp->ring_init = psp_v3_1_ring_init;
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psp->ring_create = psp_v3_1_ring_create;
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psp->cmd_submit = psp_v3_1_cmd_submit;
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psp->compare_sram_data = psp_v3_1_compare_sram_data;
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psp->smu_reload_quirk = psp_v3_1_smu_reload_quirk;
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@ -246,18 +247,79 @@ static int psp_asd_load(struct psp_context *psp)
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return ret;
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}
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static int psp_hw_start(struct psp_context *psp)
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{
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int ret;
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ret = psp_bootloader_load_sysdrv(psp);
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if (ret)
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return ret;
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ret = psp_bootloader_load_sos(psp);
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if (ret)
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return ret;
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ret = psp_ring_create(psp, PSP_RING_TYPE__KM);
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if (ret)
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return ret;
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ret = psp_tmr_load(psp);
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if (ret)
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return ret;
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ret = psp_asd_load(psp);
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if (ret)
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return ret;
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return 0;
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}
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static int psp_np_fw_load(struct psp_context *psp)
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{
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int i, ret;
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struct amdgpu_firmware_info *ucode;
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struct amdgpu_device* adev = psp->adev;
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for (i = 0; i < adev->firmware.max_ucodes; i++) {
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ucode = &adev->firmware.ucode[i];
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if (!ucode->fw)
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continue;
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if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC &&
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psp_smu_reload_quirk(psp))
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continue;
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ret = psp_prep_cmd_buf(ucode, psp->cmd);
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if (ret)
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return ret;
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ret = psp_cmd_submit_buf(psp, ucode, psp->cmd,
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psp->fence_buf_mc_addr, i + 3);
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if (ret)
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return ret;
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#if 0
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/* check if firmware loaded sucessfully */
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if (!amdgpu_psp_check_fw_loading_status(adev, i))
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return -EINVAL;
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#endif
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}
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return 0;
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}
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static int psp_load_fw(struct amdgpu_device *adev)
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{
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int ret;
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struct psp_gfx_cmd_resp *cmd;
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int i;
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struct amdgpu_firmware_info *ucode;
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struct psp_context *psp = &adev->psp;
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struct psp_gfx_cmd_resp *cmd;
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cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
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if (!cmd)
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return -ENOMEM;
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psp->cmd = cmd;
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ret = amdgpu_bo_create_kernel(adev, PSP_1_MEG, PSP_1_MEG,
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AMDGPU_GEM_DOMAIN_GTT,
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&psp->fw_pri_bo,
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@ -266,18 +328,6 @@ static int psp_load_fw(struct amdgpu_device *adev)
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if (ret)
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goto failed;
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ret = psp_bootloader_load_sysdrv(psp);
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if (ret)
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goto failed_mem1;
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ret = psp_bootloader_load_sos(psp);
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if (ret)
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goto failed_mem1;
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ret = psp_ring_init(psp, PSP_RING_TYPE__KM);
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if (ret)
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goto failed_mem1;
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ret = amdgpu_bo_create_kernel(adev, PSP_FENCE_BUFFER_SIZE, PAGE_SIZE,
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AMDGPU_GEM_DOMAIN_VRAM,
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&psp->fence_buf_bo,
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@ -288,11 +338,11 @@ static int psp_load_fw(struct amdgpu_device *adev)
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memset(psp->fence_buf, 0, PSP_FENCE_BUFFER_SIZE);
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ret = psp_tmr_init(psp);
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ret = psp_ring_init(psp, PSP_RING_TYPE__KM);
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if (ret)
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goto failed_mem;
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goto failed_mem1;
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ret = psp_tmr_load(psp);
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ret = psp_tmr_init(psp);
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if (ret)
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goto failed_mem;
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@ -300,34 +350,13 @@ static int psp_load_fw(struct amdgpu_device *adev)
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if (ret)
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goto failed_mem;
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ret = psp_asd_load(psp);
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ret = psp_hw_start(psp);
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if (ret)
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goto failed_mem;
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for (i = 0; i < adev->firmware.max_ucodes; i++) {
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ucode = &adev->firmware.ucode[i];
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if (!ucode->fw)
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continue;
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if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC &&
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psp_smu_reload_quirk(psp))
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continue;
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ret = psp_prep_cmd_buf(ucode, cmd);
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if (ret)
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goto failed_mem;
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ret = psp_cmd_submit_buf(psp, ucode, cmd,
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psp->fence_buf_mc_addr, i + 3);
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if (ret)
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goto failed_mem;
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#if 0
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/* check if firmware loaded sucessfully */
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if (!amdgpu_psp_check_fw_loading_status(adev, i))
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return -EINVAL;
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#endif
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}
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ret = psp_np_fw_load(psp);
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if (ret)
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goto failed_mem;
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amdgpu_bo_free_kernel(&psp->fence_buf_bo,
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&psp->fence_buf_mc_addr, &psp->fence_buf);
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@ -57,6 +57,7 @@ struct psp_context
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{
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struct amdgpu_device *adev;
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struct psp_ring km_ring;
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struct psp_gfx_cmd_resp *cmd;
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int (*init_microcode)(struct psp_context *psp);
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int (*bootloader_load_sysdrv)(struct psp_context *psp);
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@ -64,6 +65,7 @@ struct psp_context
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int (*prep_cmd_buf)(struct amdgpu_firmware_info *ucode,
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struct psp_gfx_cmd_resp *cmd);
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int (*ring_init)(struct psp_context *psp, enum psp_ring_type ring_type);
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int (*ring_create)(struct psp_context *psp, enum psp_ring_type ring_type);
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int (*cmd_submit)(struct psp_context *psp, struct amdgpu_firmware_info *ucode,
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uint64_t cmd_buf_mc_addr, uint64_t fence_mc_addr, int index);
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bool (*compare_sram_data)(struct psp_context *psp,
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@ -113,6 +115,7 @@ struct amdgpu_psp_funcs {
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#define psp_prep_cmd_buf(ucode, type) (psp)->prep_cmd_buf((ucode), (type))
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#define psp_ring_init(psp, type) (psp)->ring_init((psp), (type))
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#define psp_ring_create(psp, type) (psp)->ring_create((psp), (type))
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#define psp_cmd_submit(psp, ucode, cmd_mc, fence_mc, index) \
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(psp)->cmd_submit((psp), (ucode), (cmd_mc), (fence_mc), (index))
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#define psp_compare_sram_data(psp, ucode, type) \
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@ -268,7 +268,6 @@ int psp_v3_1_prep_cmd_buf(struct amdgpu_firmware_info *ucode, struct psp_gfx_cmd
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int psp_v3_1_ring_init(struct psp_context *psp, enum psp_ring_type ring_type)
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{
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int ret = 0;
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unsigned int psp_ring_reg = 0;
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struct psp_ring *ring;
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struct amdgpu_device *adev = psp->adev;
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@ -288,6 +287,16 @@ int psp_v3_1_ring_init(struct psp_context *psp, enum psp_ring_type ring_type)
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return ret;
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}
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return 0;
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}
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int psp_v3_1_ring_create(struct psp_context *psp, enum psp_ring_type ring_type)
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{
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int ret = 0;
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unsigned int psp_ring_reg = 0;
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struct psp_ring *ring = &psp->km_ring;
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struct amdgpu_device *adev = psp->adev;
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/* Write low address of the ring to C2PMSG_69 */
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psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr);
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WREG32(SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_69), psp_ring_reg);
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@ -39,6 +39,8 @@ extern int psp_v3_1_prep_cmd_buf(struct amdgpu_firmware_info *ucode,
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struct psp_gfx_cmd_resp *cmd);
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extern int psp_v3_1_ring_init(struct psp_context *psp,
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enum psp_ring_type ring_type);
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extern int psp_v3_1_ring_create(struct psp_context *psp,
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enum psp_ring_type ring_type);
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extern int psp_v3_1_cmd_submit(struct psp_context *psp,
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struct amdgpu_firmware_info *ucode,
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uint64_t cmd_buf_mc_addr, uint64_t fence_mc_addr,
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