dmaengine: centralize channel allocation, introduce dma_find_channel
Allowing multiple clients to each define their own channel allocation scheme quickly leads to a pathological situation. For memory-to-memory offload all clients can share a central allocator. This simply moves the existing async_tx allocator to dmaengine with minimal fixups: * async_tx.c:get_chan_ref_by_cap --> dmaengine.c:nth_chan * async_tx.c:async_tx_rebalance --> dmaengine.c:dma_channel_rebalance * split out common code from async_tx.c:__async_tx_find_channel --> dma_find_channel Reviewed-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This commit is contained in:
Dan Williams
parent
6f49a57aa5
commit
bec085134e
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@ -37,26 +37,11 @@ static struct dma_client async_tx_dma = {
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/* .cap_mask == 0 defaults to all channels */
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};
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/**
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* dma_cap_mask_all - enable iteration over all operation types
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*/
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static dma_cap_mask_t dma_cap_mask_all;
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/**
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* chan_ref_percpu - tracks channel allocations per core/opertion
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*/
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struct chan_ref_percpu {
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struct dma_chan_ref *ref;
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};
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static int channel_table_initialized;
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static struct chan_ref_percpu *channel_table[DMA_TX_TYPE_END];
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/**
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* async_tx_lock - protect modification of async_tx_master_list and serialize
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* rebalance operations
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*/
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static spinlock_t async_tx_lock;
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static DEFINE_SPINLOCK(async_tx_lock);
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static LIST_HEAD(async_tx_master_list);
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@ -89,85 +74,6 @@ init_dma_chan_ref(struct dma_chan_ref *ref, struct dma_chan *chan)
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atomic_set(&ref->count, 0);
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}
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/**
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* get_chan_ref_by_cap - returns the nth channel of the given capability
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* defaults to returning the channel with the desired capability and the
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* lowest reference count if the index can not be satisfied
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* @cap: capability to match
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* @index: nth channel desired, passing -1 has the effect of forcing the
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* default return value
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*/
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static struct dma_chan_ref *
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get_chan_ref_by_cap(enum dma_transaction_type cap, int index)
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{
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struct dma_chan_ref *ret_ref = NULL, *min_ref = NULL, *ref;
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rcu_read_lock();
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list_for_each_entry_rcu(ref, &async_tx_master_list, node)
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if (dma_has_cap(cap, ref->chan->device->cap_mask)) {
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if (!min_ref)
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min_ref = ref;
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else if (atomic_read(&ref->count) <
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atomic_read(&min_ref->count))
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min_ref = ref;
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if (index-- == 0) {
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ret_ref = ref;
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break;
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}
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}
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rcu_read_unlock();
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if (!ret_ref)
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ret_ref = min_ref;
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if (ret_ref)
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atomic_inc(&ret_ref->count);
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return ret_ref;
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}
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/**
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* async_tx_rebalance - redistribute the available channels, optimize
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* for cpu isolation in the SMP case, and opertaion isolation in the
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* uniprocessor case
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*/
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static void async_tx_rebalance(void)
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{
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int cpu, cap, cpu_idx = 0;
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unsigned long flags;
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if (!channel_table_initialized)
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return;
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spin_lock_irqsave(&async_tx_lock, flags);
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/* undo the last distribution */
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for_each_dma_cap_mask(cap, dma_cap_mask_all)
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for_each_possible_cpu(cpu) {
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struct dma_chan_ref *ref =
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per_cpu_ptr(channel_table[cap], cpu)->ref;
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if (ref) {
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atomic_set(&ref->count, 0);
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per_cpu_ptr(channel_table[cap], cpu)->ref =
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NULL;
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}
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}
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for_each_dma_cap_mask(cap, dma_cap_mask_all)
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for_each_online_cpu(cpu) {
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struct dma_chan_ref *new;
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if (NR_CPUS > 1)
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new = get_chan_ref_by_cap(cap, cpu_idx++);
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else
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new = get_chan_ref_by_cap(cap, -1);
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per_cpu_ptr(channel_table[cap], cpu)->ref = new;
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}
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spin_unlock_irqrestore(&async_tx_lock, flags);
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}
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static enum dma_state_client
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dma_channel_add_remove(struct dma_client *client,
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struct dma_chan *chan, enum dma_state state)
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@ -211,8 +117,6 @@ dma_channel_add_remove(struct dma_client *client,
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" (-ENOMEM)\n");
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return 0;
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}
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async_tx_rebalance();
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break;
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case DMA_RESOURCE_REMOVED:
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found = 0;
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@ -233,8 +137,6 @@ dma_channel_add_remove(struct dma_client *client,
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ack = DMA_ACK;
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else
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break;
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async_tx_rebalance();
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break;
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case DMA_RESOURCE_SUSPEND:
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case DMA_RESOURCE_RESUME:
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@ -248,51 +150,18 @@ dma_channel_add_remove(struct dma_client *client,
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return ack;
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}
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static int __init
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async_tx_init(void)
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static int __init async_tx_init(void)
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{
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enum dma_transaction_type cap;
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spin_lock_init(&async_tx_lock);
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bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END);
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/* an interrupt will never be an explicit operation type.
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* clearing this bit prevents allocation to a slot in 'channel_table'
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*/
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clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits);
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for_each_dma_cap_mask(cap, dma_cap_mask_all) {
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channel_table[cap] = alloc_percpu(struct chan_ref_percpu);
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if (!channel_table[cap])
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goto err;
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}
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channel_table_initialized = 1;
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dma_async_client_register(&async_tx_dma);
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dma_async_client_chan_request(&async_tx_dma);
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printk(KERN_INFO "async_tx: api initialized (async)\n");
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return 0;
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err:
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printk(KERN_ERR "async_tx: initialization failure\n");
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while (--cap >= 0)
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free_percpu(channel_table[cap]);
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return 1;
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}
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static void __exit async_tx_exit(void)
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{
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enum dma_transaction_type cap;
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channel_table_initialized = 0;
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for_each_dma_cap_mask(cap, dma_cap_mask_all)
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if (channel_table[cap])
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free_percpu(channel_table[cap]);
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dma_async_client_unregister(&async_tx_dma);
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}
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@ -308,16 +177,9 @@ __async_tx_find_channel(struct dma_async_tx_descriptor *depend_tx,
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{
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/* see if we can keep the chain on one channel */
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if (depend_tx &&
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dma_has_cap(tx_type, depend_tx->chan->device->cap_mask))
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dma_has_cap(tx_type, depend_tx->chan->device->cap_mask))
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return depend_tx->chan;
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else if (likely(channel_table_initialized)) {
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struct dma_chan_ref *ref;
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int cpu = get_cpu();
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ref = per_cpu_ptr(channel_table[tx_type], cpu)->ref;
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put_cpu();
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return ref ? ref->chan : NULL;
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} else
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return NULL;
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return dma_find_channel(tx_type);
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}
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EXPORT_SYMBOL_GPL(__async_tx_find_channel);
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#else
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@ -294,6 +294,164 @@ static void dma_chan_release(struct dma_chan *chan)
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call_rcu(&chan->rcu, dma_chan_free_rcu);
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}
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/**
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* dma_cap_mask_all - enable iteration over all operation types
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*/
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static dma_cap_mask_t dma_cap_mask_all;
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/**
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* dma_chan_tbl_ent - tracks channel allocations per core/operation
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* @chan - associated channel for this entry
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*/
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struct dma_chan_tbl_ent {
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struct dma_chan *chan;
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};
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/**
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* channel_table - percpu lookup table for memory-to-memory offload providers
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*/
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static struct dma_chan_tbl_ent *channel_table[DMA_TX_TYPE_END];
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static int __init dma_channel_table_init(void)
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{
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enum dma_transaction_type cap;
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int err = 0;
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bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END);
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/* 'interrupt' and 'slave' are channel capabilities, but are not
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* associated with an operation so they do not need an entry in the
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* channel_table
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*/
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clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits);
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clear_bit(DMA_SLAVE, dma_cap_mask_all.bits);
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for_each_dma_cap_mask(cap, dma_cap_mask_all) {
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channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent);
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if (!channel_table[cap]) {
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err = -ENOMEM;
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break;
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}
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}
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if (err) {
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pr_err("dmaengine: initialization failure\n");
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for_each_dma_cap_mask(cap, dma_cap_mask_all)
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if (channel_table[cap])
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free_percpu(channel_table[cap]);
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}
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return err;
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}
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subsys_initcall(dma_channel_table_init);
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/**
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* dma_find_channel - find a channel to carry out the operation
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* @tx_type: transaction type
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*/
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struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
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{
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struct dma_chan *chan;
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int cpu;
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WARN_ONCE(dmaengine_ref_count == 0,
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"client called %s without a reference", __func__);
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cpu = get_cpu();
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chan = per_cpu_ptr(channel_table[tx_type], cpu)->chan;
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put_cpu();
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return chan;
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}
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EXPORT_SYMBOL(dma_find_channel);
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/**
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* nth_chan - returns the nth channel of the given capability
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* @cap: capability to match
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* @n: nth channel desired
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*
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* Defaults to returning the channel with the desired capability and the
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* lowest reference count when 'n' cannot be satisfied. Must be called
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* under dma_list_mutex.
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*/
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static struct dma_chan *nth_chan(enum dma_transaction_type cap, int n)
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{
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struct dma_device *device;
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struct dma_chan *chan;
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struct dma_chan *ret = NULL;
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struct dma_chan *min = NULL;
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list_for_each_entry(device, &dma_device_list, global_node) {
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if (!dma_has_cap(cap, device->cap_mask))
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continue;
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list_for_each_entry(chan, &device->channels, device_node) {
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if (!chan->client_count)
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continue;
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if (!min)
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min = chan;
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else if (chan->table_count < min->table_count)
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min = chan;
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if (n-- == 0) {
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ret = chan;
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break; /* done */
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}
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}
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if (ret)
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break; /* done */
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}
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if (!ret)
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ret = min;
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if (ret)
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ret->table_count++;
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return ret;
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}
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/**
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* dma_channel_rebalance - redistribute the available channels
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*
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* Optimize for cpu isolation (each cpu gets a dedicated channel for an
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* operation type) in the SMP case, and operation isolation (avoid
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* multi-tasking channels) in the non-SMP case. Must be called under
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* dma_list_mutex.
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*/
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static void dma_channel_rebalance(void)
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{
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struct dma_chan *chan;
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struct dma_device *device;
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int cpu;
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int cap;
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int n;
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/* undo the last distribution */
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for_each_dma_cap_mask(cap, dma_cap_mask_all)
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for_each_possible_cpu(cpu)
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per_cpu_ptr(channel_table[cap], cpu)->chan = NULL;
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list_for_each_entry(device, &dma_device_list, global_node)
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list_for_each_entry(chan, &device->channels, device_node)
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chan->table_count = 0;
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/* don't populate the channel_table if no clients are available */
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if (!dmaengine_ref_count)
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return;
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/* redistribute available channels */
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n = 0;
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for_each_dma_cap_mask(cap, dma_cap_mask_all)
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for_each_online_cpu(cpu) {
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if (num_possible_cpus() > 1)
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chan = nth_chan(cap, n++);
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else
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chan = nth_chan(cap, -1);
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per_cpu_ptr(channel_table[cap], cpu)->chan = chan;
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}
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}
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/**
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* dma_chans_notify_available - broadcast available channels to the clients
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*/
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@ -339,7 +497,12 @@ void dma_async_client_register(struct dma_client *client)
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dev_name(&chan->dev), err);
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}
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/* if this is the first reference and there were channels
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* waiting we need to rebalance to get those channels
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* incorporated into the channel table
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*/
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if (dmaengine_ref_count == 1)
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dma_channel_rebalance();
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list_add_tail(&client->global_node, &dma_client_list);
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mutex_unlock(&dma_list_mutex);
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}
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@ -473,6 +636,7 @@ int dma_async_device_register(struct dma_device *device)
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}
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}
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list_add_tail(&device->global_node, &dma_device_list);
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dma_channel_rebalance();
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mutex_unlock(&dma_list_mutex);
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dma_clients_notify_available();
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@ -514,6 +678,7 @@ void dma_async_device_unregister(struct dma_device *device)
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mutex_lock(&dma_list_mutex);
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list_del(&device->global_node);
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dma_channel_rebalance();
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mutex_unlock(&dma_list_mutex);
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list_for_each_entry(chan, &device->channels, device_node) {
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@ -768,3 +933,4 @@ static int __init dma_bus_init(void)
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}
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subsys_initcall(dma_bus_init);
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@ -182,6 +182,7 @@ struct dma_chan_percpu {
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* @device_node: used to add this to the device chan list
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* @local: per-cpu pointer to a struct dma_chan_percpu
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* @client-count: how many clients are using this channel
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* @table_count: number of appearances in the mem-to-mem allocation table
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*/
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struct dma_chan {
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struct dma_device *device;
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@ -198,6 +199,7 @@ struct dma_chan {
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struct list_head device_node;
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struct dma_chan_percpu *local;
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int client_count;
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int table_count;
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};
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#define to_dma_chan(p) container_of(p, struct dma_chan, dev)
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@ -468,6 +470,7 @@ static inline enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descript
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int dma_async_device_register(struct dma_device *device);
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void dma_async_device_unregister(struct dma_device *device);
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void dma_run_dependencies(struct dma_async_tx_descriptor *tx);
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struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type);
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/* --- Helper iov-locking functions --- */
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