iommu/rockchip: Fix TLB flush of secondary IOMMUs
Due to the bug in current code, only first IOMMU has the TLB lines flushed in rk_iommu_zap_lines. This patch fixes the inner loop to execute for all IOMMUs and properly flush the TLB. Signed-off-by: Tomasz Figa <tfiga@chromium.org> Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -274,19 +274,21 @@ static void rk_iommu_base_command(void __iomem *base, u32 command)
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{
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{
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writel(command, base + RK_MMU_COMMAND);
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writel(command, base + RK_MMU_COMMAND);
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}
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}
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static void rk_iommu_zap_lines(struct rk_iommu *iommu, dma_addr_t iova,
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static void rk_iommu_zap_lines(struct rk_iommu *iommu, dma_addr_t iova_start,
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size_t size)
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size_t size)
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{
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{
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int i;
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int i;
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dma_addr_t iova_end = iova_start + size;
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dma_addr_t iova_end = iova + size;
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/*
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/*
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* TODO(djkurtz): Figure out when it is more efficient to shootdown the
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* TODO(djkurtz): Figure out when it is more efficient to shootdown the
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* entire iotlb rather than iterate over individual iovas.
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* entire iotlb rather than iterate over individual iovas.
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*/
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*/
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for (i = 0; i < iommu->num_mmu; i++)
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for (i = 0; i < iommu->num_mmu; i++) {
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for (; iova < iova_end; iova += SPAGE_SIZE)
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dma_addr_t iova;
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for (iova = iova_start; iova < iova_end; iova += SPAGE_SIZE)
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rk_iommu_write(iommu->bases[i], RK_MMU_ZAP_ONE_LINE, iova);
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rk_iommu_write(iommu->bases[i], RK_MMU_ZAP_ONE_LINE, iova);
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}
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}
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}
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static bool rk_iommu_is_stall_active(struct rk_iommu *iommu)
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static bool rk_iommu_is_stall_active(struct rk_iommu *iommu)
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