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ARM: mach-shmobile: update for GIC changes. 

This fixes up the SMP support to use the refactored GIC APIs.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt 2011-01-07 12:02:11 +09:00
parent 6ef9f6fd8e
commit c0312b33da
4 changed files with 9 additions and 11 deletions
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8
arch/arm/mach-shmobile/entry-gic.S
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@ -2,19 +2,17 @@
* ARM Interrupt demux handler using GIC
*
* Copyright (C) 2010 Magnus Damm
* Copyright (C) 2010 Renesas Solutions Corp.
* Copyright (C) 2011 Paul Mundt
* Copyright (C) 2010 - 2011 Renesas Solutions Corp.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <asm/assembler.h>
#include <asm/entry-macro-multi.S>
#include <asm/hardware/gic.h>
#include <asm/hardware/entry-macro-gic.S>
.macro get_irqnr_preamble, base, tmp
ldr \base, =(0xf0000100)
.endm
arch_irq_handler shmobile_handle_irq_gic

6
arch/arm/mach-shmobile/include/mach/smp.h
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@ -2,15 +2,15 @@
#define __MACH_SMP_H
#include <asm/hardware/gic.h>
#include <asm/smp_mpidr.h>
/*
* We use IRQ1 as the IPI
*/
static inline void smp_cross_call(const struct cpumask *mask)
static inline void smp_cross_call(const struct cpumask *mask, int ipi)
{
#if defined(CONFIG_ARM_GIC)
gic_raise_softirq(mask, 1);
gic_raise_softirq(mask, ipi);
#endif
}
#endif

4
arch/arm/mach-shmobile/intc-sh73a0.c
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@ -252,10 +252,10 @@ static irqreturn_t sh73a0_intcs_demux(int irq, void *dev_id)
void __init sh73a0_init_irq(void)
{
void __iomem *gic_base = __io(0xf0001000);
void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
gic_dist_init(0, __io(0xf0001000), 29);
gic_cpu_init(0, __io(0xf0000100));
gic_init(0, 29, gic_base, gic_base);
register_intc_controller(&intcs_desc);

2
arch/arm/mach-shmobile/smp-sh73a0.c
View File

@ -64,7 +64,7 @@ unsigned int __init sh73a0_get_core_count(void)
void __cpuinit sh73a0_secondary_init(unsigned int cpu)
{
gic_cpu_init(0, __io(0xf0000100));
gic_secondary_init(0);
}
int __cpuinit sh73a0_boot_secondary(unsigned int cpu)