Staging: pata_rdc: remove function prototypes
Move code around so we do not need the function prototypes anymore. Cc: Kevin Huang <Kevin.Huang@rdc.com.tw> Cc: Tomy Wang <Tomy.Wang@rdc.com.tw> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Greg Kroah-Hartman
parent
482612afc6
commit
c0a5962f76
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@ -36,50 +36,9 @@ static const struct pci_device_id rdc_pata_id_table[] = {
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{ 0x17F3, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RDC_17F31012},
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{ } /* terminate list */
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};
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("this version author is RDC"); /* replace "RDC" with the last maintainer. */
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MODULE_DESCRIPTION("RDC PCI IDE Driver");
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MODULE_DEVICE_TABLE(pci, rdc_pata_id_table);
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MODULE_VERSION(DRIVER_VERSION);
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/* a pci driver */
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static struct pci_driver rdc_pata_driver = {
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.name = DRIVER_NAME,
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.id_table = rdc_pata_id_table,
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.probe = rdc_init_one,
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.remove = ata_pci_remove_one,
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#ifdef CONFIG_PM
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.suspend = ata_pci_device_suspend,
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.resume = ata_pci_device_resume,
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#endif
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};
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static unsigned int in_module_init = 1; /* hotplugging check??? */
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static int __init pata_rdc_init(void)
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{
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int rc;
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dbgprintf("pata_rdc_init\n");
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rc = pci_register_driver(&rdc_pata_driver);
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if (rc) {
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dbgprintf("pata_rdc_init faile\n");
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return rc;
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}
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in_module_init = 0;
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return 0;
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}
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static void __exit pata_rdc_exit(void)
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{
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dbgprintf("pata_rdc_exit\n");
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pci_unregister_driver(&rdc_pata_driver);
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}
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module_init(pata_rdc_init);
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module_exit(pata_rdc_exit);
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/* ata device data */
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@ -89,387 +48,6 @@ static struct pci_bits ATA_Decode_Enable_Bits[] = {
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{ 0x43U, 1U, 0x80UL, 0x80UL }, /* port (Channel) 1 */
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};
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/* pata host template */
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static struct scsi_host_template rdc_pata_sht = {
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ATA_BMDMA_SHT(DRIVER_NAME),
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};
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static const struct ata_port_operations rdc_pata_ops = {
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.inherits = &ata_bmdma_port_ops,
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.port_start = rdc_pata_port_start,
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.port_stop = rdc_pata_port_stop,
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.prereset = rdc_pata_prereset,
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.cable_detect = rdc_pata_cable_detect,
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.set_piomode = rdc_pata_set_piomode,
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.set_dmamode = rdc_pata_set_dmamode,
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};
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static struct ata_port_info rdc_pata_port_info[] = {
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[RDC_17F31011] = {
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.flags = ATA_FLAG_SLAVE_POSS,
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.pio_mask = 0x1f, /* pio0-4 */
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.mwdma_mask = 0x07, /* mwdma0-2 */
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.udma_mask = ATA_UDMA5, /* udma0-5 */
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.port_ops = &rdc_pata_ops,
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},
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[RDC_17F31012] = {
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.flags = ATA_FLAG_SLAVE_POSS,
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.pio_mask = 0x1f, /* pio0-4 */
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.mwdma_mask = 0x07, /* mwdma0-2 */
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.udma_mask = ATA_UDMA5, /* udma0-5 */
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.port_ops = &rdc_pata_ops,
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},
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};
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/* callback function for pci_driver */
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/**
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* Register ATA PCI device with kernel services
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* @pdev: PCI device to register
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* @ent: Entry in sch_pci_tbl matching with @pdev
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*
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* LOCKING:
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* Inherited from PCI layer (may sleep).
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*
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* RETURNS:
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* Zero on success, or -ERRNO value.
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*/
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static int __devinit rdc_init_one(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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/*struct device *dev = &pdev->dev; */
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struct ata_port_info port_info[2];
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const struct ata_port_info *ppinfo[] = { &port_info[0], &port_info[1] };
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int rc;
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dbgprintf("rdc_init_one\n");
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/* no hotplugging support (FIXME) */ /* why??? */
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if (!in_module_init) {
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dbgprintf("rdc_init_one in_module_init == 0 failed \n");
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return -ENODEV;
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}
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port_info[0] = rdc_pata_port_info[ent->driver_data];
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port_info[1] = rdc_pata_port_info[ent->driver_data];
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/* enable device and prepare host */
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rc = pci_enable_device(pdev);
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if (rc) {
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dbgprintf("rdc_init_one pci_enable_device failed \n");
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return rc;
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}
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/* initialize controller */
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pci_intx(pdev, 1); /* enable interrupt */
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return ata_pci_sff_init_one(pdev, ppinfo, &rdc_pata_sht, NULL);
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}
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/* callback function for ata_port */
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/**
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* Set port up for dma.
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* @ap: Port to initialize
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*
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* Called just after data structures for each port are
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* initialized. Allocates space for PRD table if the device
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* is DMA capable SFF.
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Some drivers also use this entry point as a chance to allocate driverprivate
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memory for ap->private_data.
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*
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* May be used as the port_start() entry in ata_port_operations.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static int rdc_pata_port_start(struct ata_port *ap)
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{
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uint Channel;
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Channel = ap->port_no;
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dbgprintf("rdc_pata_port_start Channel: %u \n", Channel);
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if (ap->ioaddr.bmdma_addr) {
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return ata_port_start(ap);
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} else {
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dbgprintf("rdc_pata_port_start return 0 !!!\n");
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return 0;
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}
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}
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static void rdc_pata_port_stop(struct ata_port *ap)
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{
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uint Channel;
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Channel = ap->port_no;
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dbgprintf("rdc_pata_port_stop Channel: %u \n", Channel);
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}
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/**
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* prereset for PATA host controller
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* @link: Target link
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* @deadline: deadline jiffies for the operation
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static int rdc_pata_prereset(struct ata_link *link, unsigned long deadline)
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{
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struct pci_dev *pdev;
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struct ata_port *ap;
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uint Channel;
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dbgprintf("rdc_pata_prereset\n");
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ap = link->ap;
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pdev = to_pci_dev(ap->host->dev);
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Channel = ap->port_no;
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/* test ATA Decode Enable Bits, should be enable. */
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if (!pci_test_config_bits(pdev, &ATA_Decode_Enable_Bits[Channel])) {
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dbgprintf("rdc_pata_prereset Channel: %u, Decode Disable\n", Channel);
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return -ENOENT;
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} else {
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dbgprintf("rdc_pata_prereset Channel: %u, Decode Enable\n", Channel);
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return ata_std_prereset(link, deadline);
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}
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}
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/**
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* Probe host controller cable detect info
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* @ap: Port for which cable detect info is desired
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*
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* Read cable indicator from ATA PCI device's PCI config
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* register. This register is normally set by firmware (BIOS).
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static int rdc_pata_cable_detect(struct ata_port *ap)
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{
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struct pci_dev *pdev;
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uint Channel;
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uint Mask;
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u32 u32Value;
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dbgprintf("rdc_pata_cable_detect\n");
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pdev = to_pci_dev(ap->host->dev);
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Channel = ap->port_no;
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if (Channel == 0)
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Mask = ATAConfiguration_IDEIOConfiguration_PrimaryDeviceCable80Report;
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else
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Mask = ATAConfiguration_IDEIOConfiguration_SecondaryDeviceCable80Report;
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/* check BIOS cable detect results */
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pci_read_config_dword(pdev, ATAConfiguration_ID_IDEIOConfiguration + ATAConfiguration_PCIOffset, &u32Value);
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if ((u32Value & Mask) == 0) {
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dbgprintf("rdc_pata_cable_detect Channel: %u, PATA40 \n", Channel);
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return ATA_CBL_PATA40;
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} else {
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dbgprintf("rdc_pata_cable_detect Channel: %u, PATA80 \n", Channel);
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return ATA_CBL_PATA80;
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}
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}
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/**
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* Initialize host controller PATA PIO timings
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* @ap: Port whose timings we are configuring
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* @adev: um
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*
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* Set PIO mode for device, in host controller PCI config space.
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void rdc_pata_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev;
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uint Channel;
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uint DeviceID;
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uint PIOTimingMode;
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uint PrefetchPostingEnable;
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dbgprintf("rdc_pata_set_piomode\n");
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pdev = to_pci_dev(ap->host->dev);
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Channel = ap->port_no;
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DeviceID = adev->devno;
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/*
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* piomode = 0, 1, 2, 3... ; adev->pio_mode = XFER_PIO_0, XFER_PIO_1,
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* XFER_PIO_2, XFER_PIO_3...
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*/
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PIOTimingMode = adev->pio_mode - XFER_PIO_0;
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if (adev->class == ATA_DEV_ATA) {
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PrefetchPostingEnable = TRUE;
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} else {
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/* ATAPI, CD DVD Rom */
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PrefetchPostingEnable = FALSE;
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}
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/* PIO configuration clears DTE unconditionally. It will be
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* programmed in set_dmamode which is guaranteed to be called
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* after set_piomode if any DMA mode is available.
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*/
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/* Ensure the UDMA bit is off - it will be turned back on if UDMA is
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* selected */
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if (Channel == 0) {
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ATAHostAdapter_SetPrimaryPIO(
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pdev,
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DeviceID,
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PIOTimingMode,
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TRUE,/* DMAEnable, */
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PrefetchPostingEnable
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);
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ATAHostAdapter_SetPrimaryUDMA(
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pdev,
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DeviceID,
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FALSE,/* UDMAEnable, */
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UDMA0
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);
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} else {
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ATAHostAdapter_SetSecondaryPIO(
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pdev,
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DeviceID,
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PIOTimingMode,
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TRUE,/* DMAEnable, */
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PrefetchPostingEnable
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);
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ATAHostAdapter_SetSecondaryUDMA(
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pdev,
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DeviceID,
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FALSE,/* UDMAEnable, */
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UDMA0
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);
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}
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dbgprintf("rdc_pata_set_piomode Channel: %u, DeviceID: %u, PIO: %d \n", Channel, DeviceID, PIOTimingMode);
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}
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/**
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* Initialize host controller PATA DMA timings
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* @ap: Port whose timings we are configuring
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* @adev: um
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*
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* Set MW/UDMA mode for device, in host controller PCI config space.
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void rdc_pata_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev;
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uint Channel;
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uint DeviceID;
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uint PIOTimingMode;
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uint PrefetchPostingEnable;
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uint DMATimingMode;
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uint UDMAEnable;
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dbgprintf("rdc_pata_set_dmamode\n");
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pdev = to_pci_dev(ap->host->dev);
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Channel = ap->port_no;
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DeviceID = adev->devno;
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PIOTimingMode = adev->pio_mode - XFER_PIO_0; /* piomode = 0, 1, 2, 3... ; adev->pio_mode = XFER_PIO_0, XFER_PIO_1, XFER_PIO_2, XFER_PIO_3... */
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DMATimingMode = adev->dma_mode; /* UDMA or MDMA */
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if (adev->class == ATA_DEV_ATA) {
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PrefetchPostingEnable = TRUE;
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} else {
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/* ATAPI, CD DVD Rom */
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PrefetchPostingEnable = FALSE;
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}
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if (ap->udma_mask == 0) {
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/* ata_port dont support udma. depend on hardware spec. */
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UDMAEnable = FALSE;
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} else {
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UDMAEnable = TRUE;
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}
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/*if (ap->mdma_mask == 0) {
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}*/
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if (Channel == 0) {
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if (DMATimingMode >= XFER_UDMA_0) {
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/* UDMA */
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ATAHostAdapter_SetPrimaryPIO(pdev,
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DeviceID,
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PIOTimingMode,
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TRUE,/*DMAEnable,*/
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PrefetchPostingEnable);
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ATAHostAdapter_SetPrimaryUDMA(pdev,
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DeviceID,
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UDMAEnable,
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DMATimingMode - XFER_UDMA_0);
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dbgprintf("rdc_pata_set_dmamode Channel: %u, DeviceID: %u, UDMA: %u \n", Channel, DeviceID, (uint)(DMATimingMode - XFER_UDMA_0));
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} else {
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/* MDMA */
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ATAHostAdapter_SetPrimaryPIO(pdev,
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DeviceID,
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(DMATimingMode - XFER_MW_DMA_0) + PIO2, /* MDMA0 = PIO2 */
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TRUE,/*DMAEnable,*/
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PrefetchPostingEnable);
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ATAHostAdapter_SetPrimaryUDMA(pdev,
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DeviceID,
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FALSE,/*UDMAEnable,*/
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UDMA0);
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dbgprintf("rdc_pata_set_dmamode Channel: %u, DeviceID: %u, MDMA: %u \n", Channel, DeviceID, (uint)(DMATimingMode - XFER_MW_DMA_0));
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}
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} else {
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if (DMATimingMode >= XFER_UDMA_0) {
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/* UDMA */
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ATAHostAdapter_SetSecondaryPIO(pdev,
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DeviceID,
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PIOTimingMode,
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TRUE,/*DMAEnable,*/
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PrefetchPostingEnable);
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ATAHostAdapter_SetSecondaryUDMA(pdev,
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DeviceID,
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UDMAEnable,
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DMATimingMode - XFER_UDMA_0);
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dbgprintf("rdc_pata_set_dmamode Channel: %u, DeviceID: %u, UDMA: %u \n", Channel, DeviceID, (uint)(DMATimingMode - XFER_UDMA_0));
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} else {
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/* MDMA */
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ATAHostAdapter_SetSecondaryPIO(pdev,
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DeviceID,
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(DMATimingMode - XFER_MW_DMA_0) + PIO2, /* MDMA0 = PIO2 */
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TRUE,/*DMAEnable,*/
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PrefetchPostingEnable);
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ATAHostAdapter_SetSecondaryUDMA(pdev,
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DeviceID,
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FALSE,/*UDMAEnable,*/
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UDMA0);
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dbgprintf("rdc_pata_set_dmamode Channel: %u, DeviceID: %u, MDMA: %u \n", Channel, DeviceID, (uint)(DMATimingMode - XFER_MW_DMA_0));
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}
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}
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}
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/* modified PCIDeviceIO code. */
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static uint PCIDeviceIO_ReadPCIConfiguration(struct pci_dev *pdev, uint Offset, uint Length, void *pBuffer)
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{
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uint funcresult;
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@ -518,7 +96,6 @@ funcexit:
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return funcresult;
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}
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/* modified ATAHostAdapter code. */
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static uint ATAHostAdapter_SetPrimaryPIO(struct pci_dev *pdev, uint DeviceID,
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uint PIOTimingMode, uint DMAEnable,
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uint PrefetchPostingEnable)
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@ -1064,3 +641,405 @@ static uint ATAHostAdapter_SetSecondaryUDMA(struct pci_dev *pdev, uint DeviceID,
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funcexit:
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return funcresult;
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}
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/**
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* Set port up for dma.
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* @ap: Port to initialize
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*
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* Called just after data structures for each port are
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* initialized. Allocates space for PRD table if the device
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* is DMA capable SFF.
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Some drivers also use this entry point as a chance to allocate driverprivate
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memory for ap->private_data.
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*
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* May be used as the port_start() entry in ata_port_operations.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static int rdc_pata_port_start(struct ata_port *ap)
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{
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uint Channel;
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Channel = ap->port_no;
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dbgprintf("rdc_pata_port_start Channel: %u \n", Channel);
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if (ap->ioaddr.bmdma_addr) {
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return ata_port_start(ap);
|
||||
} else {
|
||||
dbgprintf("rdc_pata_port_start return 0 !!!\n");
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
static void rdc_pata_port_stop(struct ata_port *ap)
|
||||
{
|
||||
uint Channel;
|
||||
|
||||
Channel = ap->port_no;
|
||||
|
||||
dbgprintf("rdc_pata_port_stop Channel: %u \n", Channel);
|
||||
}
|
||||
|
||||
/**
|
||||
* prereset for PATA host controller
|
||||
* @link: Target link
|
||||
* @deadline: deadline jiffies for the operation
|
||||
*
|
||||
* LOCKING:
|
||||
* None (inherited from caller).
|
||||
*/
|
||||
static int rdc_pata_prereset(struct ata_link *link, unsigned long deadline)
|
||||
{
|
||||
struct pci_dev *pdev;
|
||||
struct ata_port *ap;
|
||||
uint Channel;
|
||||
|
||||
dbgprintf("rdc_pata_prereset\n");
|
||||
|
||||
ap = link->ap;
|
||||
pdev = to_pci_dev(ap->host->dev);
|
||||
|
||||
Channel = ap->port_no;
|
||||
|
||||
/* test ATA Decode Enable Bits, should be enable. */
|
||||
if (!pci_test_config_bits(pdev, &ATA_Decode_Enable_Bits[Channel])) {
|
||||
dbgprintf("rdc_pata_prereset Channel: %u, Decode Disable\n", Channel);
|
||||
return -ENOENT;
|
||||
} else {
|
||||
dbgprintf("rdc_pata_prereset Channel: %u, Decode Enable\n", Channel);
|
||||
return ata_std_prereset(link, deadline);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Probe host controller cable detect info
|
||||
* @ap: Port for which cable detect info is desired
|
||||
*
|
||||
* Read cable indicator from ATA PCI device's PCI config
|
||||
* register. This register is normally set by firmware (BIOS).
|
||||
*
|
||||
* LOCKING:
|
||||
* None (inherited from caller).
|
||||
*/
|
||||
static int rdc_pata_cable_detect(struct ata_port *ap)
|
||||
{
|
||||
struct pci_dev *pdev;
|
||||
uint Channel;
|
||||
uint Mask;
|
||||
u32 u32Value;
|
||||
|
||||
dbgprintf("rdc_pata_cable_detect\n");
|
||||
|
||||
pdev = to_pci_dev(ap->host->dev);
|
||||
|
||||
Channel = ap->port_no;
|
||||
|
||||
if (Channel == 0)
|
||||
Mask = ATAConfiguration_IDEIOConfiguration_PrimaryDeviceCable80Report;
|
||||
else
|
||||
Mask = ATAConfiguration_IDEIOConfiguration_SecondaryDeviceCable80Report;
|
||||
|
||||
/* check BIOS cable detect results */
|
||||
pci_read_config_dword(pdev, ATAConfiguration_ID_IDEIOConfiguration + ATAConfiguration_PCIOffset, &u32Value);
|
||||
|
||||
if ((u32Value & Mask) == 0) {
|
||||
dbgprintf("rdc_pata_cable_detect Channel: %u, PATA40 \n", Channel);
|
||||
return ATA_CBL_PATA40;
|
||||
} else {
|
||||
dbgprintf("rdc_pata_cable_detect Channel: %u, PATA80 \n", Channel);
|
||||
return ATA_CBL_PATA80;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Initialize host controller PATA PIO timings
|
||||
* @ap: Port whose timings we are configuring
|
||||
* @adev: um
|
||||
*
|
||||
* Set PIO mode for device, in host controller PCI config space.
|
||||
*
|
||||
* LOCKING:
|
||||
* None (inherited from caller).
|
||||
*/
|
||||
static void rdc_pata_set_piomode(struct ata_port *ap, struct ata_device *adev)
|
||||
{
|
||||
struct pci_dev *pdev;
|
||||
uint Channel;
|
||||
uint DeviceID;
|
||||
uint PIOTimingMode;
|
||||
uint PrefetchPostingEnable;
|
||||
|
||||
dbgprintf("rdc_pata_set_piomode\n");
|
||||
|
||||
pdev = to_pci_dev(ap->host->dev);
|
||||
|
||||
Channel = ap->port_no;
|
||||
DeviceID = adev->devno;
|
||||
/*
|
||||
* piomode = 0, 1, 2, 3... ; adev->pio_mode = XFER_PIO_0, XFER_PIO_1,
|
||||
* XFER_PIO_2, XFER_PIO_3...
|
||||
*/
|
||||
PIOTimingMode = adev->pio_mode - XFER_PIO_0;
|
||||
|
||||
if (adev->class == ATA_DEV_ATA) {
|
||||
PrefetchPostingEnable = TRUE;
|
||||
} else {
|
||||
/* ATAPI, CD DVD Rom */
|
||||
PrefetchPostingEnable = FALSE;
|
||||
}
|
||||
|
||||
/* PIO configuration clears DTE unconditionally. It will be
|
||||
* programmed in set_dmamode which is guaranteed to be called
|
||||
* after set_piomode if any DMA mode is available.
|
||||
*/
|
||||
|
||||
/* Ensure the UDMA bit is off - it will be turned back on if UDMA is
|
||||
* selected */
|
||||
|
||||
if (Channel == 0) {
|
||||
ATAHostAdapter_SetPrimaryPIO(
|
||||
pdev,
|
||||
DeviceID,
|
||||
PIOTimingMode,
|
||||
TRUE,/* DMAEnable, */
|
||||
PrefetchPostingEnable
|
||||
);
|
||||
|
||||
ATAHostAdapter_SetPrimaryUDMA(
|
||||
pdev,
|
||||
DeviceID,
|
||||
FALSE,/* UDMAEnable, */
|
||||
UDMA0
|
||||
);
|
||||
} else {
|
||||
ATAHostAdapter_SetSecondaryPIO(
|
||||
pdev,
|
||||
DeviceID,
|
||||
PIOTimingMode,
|
||||
TRUE,/* DMAEnable, */
|
||||
PrefetchPostingEnable
|
||||
);
|
||||
|
||||
ATAHostAdapter_SetSecondaryUDMA(
|
||||
pdev,
|
||||
DeviceID,
|
||||
FALSE,/* UDMAEnable, */
|
||||
UDMA0
|
||||
);
|
||||
}
|
||||
dbgprintf("rdc_pata_set_piomode Channel: %u, DeviceID: %u, PIO: %d \n", Channel, DeviceID, PIOTimingMode);
|
||||
}
|
||||
|
||||
/**
|
||||
* Initialize host controller PATA DMA timings
|
||||
* @ap: Port whose timings we are configuring
|
||||
* @adev: um
|
||||
*
|
||||
* Set MW/UDMA mode for device, in host controller PCI config space.
|
||||
*
|
||||
* LOCKING:
|
||||
* None (inherited from caller).
|
||||
*/
|
||||
static void rdc_pata_set_dmamode(struct ata_port *ap, struct ata_device *adev)
|
||||
{
|
||||
struct pci_dev *pdev;
|
||||
uint Channel;
|
||||
uint DeviceID;
|
||||
uint PIOTimingMode;
|
||||
uint PrefetchPostingEnable;
|
||||
uint DMATimingMode;
|
||||
uint UDMAEnable;
|
||||
|
||||
dbgprintf("rdc_pata_set_dmamode\n");
|
||||
|
||||
pdev = to_pci_dev(ap->host->dev);
|
||||
|
||||
Channel = ap->port_no;
|
||||
DeviceID = adev->devno;
|
||||
PIOTimingMode = adev->pio_mode - XFER_PIO_0; /* piomode = 0, 1, 2, 3... ; adev->pio_mode = XFER_PIO_0, XFER_PIO_1, XFER_PIO_2, XFER_PIO_3... */
|
||||
DMATimingMode = adev->dma_mode; /* UDMA or MDMA */
|
||||
|
||||
if (adev->class == ATA_DEV_ATA) {
|
||||
PrefetchPostingEnable = TRUE;
|
||||
} else {
|
||||
/* ATAPI, CD DVD Rom */
|
||||
PrefetchPostingEnable = FALSE;
|
||||
}
|
||||
|
||||
if (ap->udma_mask == 0) {
|
||||
/* ata_port dont support udma. depend on hardware spec. */
|
||||
UDMAEnable = FALSE;
|
||||
} else {
|
||||
UDMAEnable = TRUE;
|
||||
}
|
||||
|
||||
/*if (ap->mdma_mask == 0) {
|
||||
}*/
|
||||
|
||||
if (Channel == 0) {
|
||||
if (DMATimingMode >= XFER_UDMA_0) {
|
||||
/* UDMA */
|
||||
ATAHostAdapter_SetPrimaryPIO(pdev,
|
||||
DeviceID,
|
||||
PIOTimingMode,
|
||||
TRUE,/*DMAEnable,*/
|
||||
PrefetchPostingEnable);
|
||||
|
||||
ATAHostAdapter_SetPrimaryUDMA(pdev,
|
||||
DeviceID,
|
||||
UDMAEnable,
|
||||
DMATimingMode - XFER_UDMA_0);
|
||||
dbgprintf("rdc_pata_set_dmamode Channel: %u, DeviceID: %u, UDMA: %u \n", Channel, DeviceID, (uint)(DMATimingMode - XFER_UDMA_0));
|
||||
} else {
|
||||
/* MDMA */
|
||||
ATAHostAdapter_SetPrimaryPIO(pdev,
|
||||
DeviceID,
|
||||
(DMATimingMode - XFER_MW_DMA_0) + PIO2, /* MDMA0 = PIO2 */
|
||||
TRUE,/*DMAEnable,*/
|
||||
PrefetchPostingEnable);
|
||||
|
||||
ATAHostAdapter_SetPrimaryUDMA(pdev,
|
||||
DeviceID,
|
||||
FALSE,/*UDMAEnable,*/
|
||||
UDMA0);
|
||||
dbgprintf("rdc_pata_set_dmamode Channel: %u, DeviceID: %u, MDMA: %u \n", Channel, DeviceID, (uint)(DMATimingMode - XFER_MW_DMA_0));
|
||||
}
|
||||
} else {
|
||||
if (DMATimingMode >= XFER_UDMA_0) {
|
||||
/* UDMA */
|
||||
ATAHostAdapter_SetSecondaryPIO(pdev,
|
||||
DeviceID,
|
||||
PIOTimingMode,
|
||||
TRUE,/*DMAEnable,*/
|
||||
PrefetchPostingEnable);
|
||||
|
||||
ATAHostAdapter_SetSecondaryUDMA(pdev,
|
||||
DeviceID,
|
||||
UDMAEnable,
|
||||
DMATimingMode - XFER_UDMA_0);
|
||||
dbgprintf("rdc_pata_set_dmamode Channel: %u, DeviceID: %u, UDMA: %u \n", Channel, DeviceID, (uint)(DMATimingMode - XFER_UDMA_0));
|
||||
} else {
|
||||
/* MDMA */
|
||||
ATAHostAdapter_SetSecondaryPIO(pdev,
|
||||
DeviceID,
|
||||
(DMATimingMode - XFER_MW_DMA_0) + PIO2, /* MDMA0 = PIO2 */
|
||||
TRUE,/*DMAEnable,*/
|
||||
PrefetchPostingEnable);
|
||||
|
||||
ATAHostAdapter_SetSecondaryUDMA(pdev,
|
||||
DeviceID,
|
||||
FALSE,/*UDMAEnable,*/
|
||||
UDMA0);
|
||||
dbgprintf("rdc_pata_set_dmamode Channel: %u, DeviceID: %u, MDMA: %u \n", Channel, DeviceID, (uint)(DMATimingMode - XFER_MW_DMA_0));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* pata host template */
|
||||
static struct scsi_host_template rdc_pata_sht = {
|
||||
ATA_BMDMA_SHT(DRIVER_NAME),
|
||||
};
|
||||
|
||||
static const struct ata_port_operations rdc_pata_ops = {
|
||||
.inherits = &ata_bmdma_port_ops,
|
||||
|
||||
.port_start = rdc_pata_port_start,
|
||||
.port_stop = rdc_pata_port_stop,
|
||||
.prereset = rdc_pata_prereset,
|
||||
.cable_detect = rdc_pata_cable_detect,
|
||||
.set_piomode = rdc_pata_set_piomode,
|
||||
.set_dmamode = rdc_pata_set_dmamode,
|
||||
};
|
||||
|
||||
static struct ata_port_info rdc_pata_port_info[] = {
|
||||
[RDC_17F31011] = {
|
||||
.flags = ATA_FLAG_SLAVE_POSS,
|
||||
.pio_mask = 0x1f, /* pio0-4 */
|
||||
.mwdma_mask = 0x07, /* mwdma0-2 */
|
||||
.udma_mask = ATA_UDMA5, /* udma0-5 */
|
||||
.port_ops = &rdc_pata_ops,
|
||||
},
|
||||
|
||||
[RDC_17F31012] = {
|
||||
.flags = ATA_FLAG_SLAVE_POSS,
|
||||
.pio_mask = 0x1f, /* pio0-4 */
|
||||
.mwdma_mask = 0x07, /* mwdma0-2 */
|
||||
.udma_mask = ATA_UDMA5, /* udma0-5 */
|
||||
.port_ops = &rdc_pata_ops,
|
||||
},
|
||||
};
|
||||
|
||||
static int __devinit rdc_init_one(struct pci_dev *pdev,
|
||||
const struct pci_device_id *ent)
|
||||
{
|
||||
/*struct device *dev = &pdev->dev; */
|
||||
struct ata_port_info port_info[2];
|
||||
const struct ata_port_info *ppinfo[] = { &port_info[0], &port_info[1] };
|
||||
|
||||
int rc;
|
||||
|
||||
dbgprintf("rdc_init_one\n");
|
||||
|
||||
/* no hotplugging support (FIXME) */ /* why??? */
|
||||
if (!in_module_init) {
|
||||
dbgprintf("rdc_init_one in_module_init == 0 failed \n");
|
||||
return -ENODEV;
|
||||
}
|
||||
port_info[0] = rdc_pata_port_info[ent->driver_data];
|
||||
port_info[1] = rdc_pata_port_info[ent->driver_data];
|
||||
|
||||
/* enable device and prepare host */
|
||||
rc = pci_enable_device(pdev);
|
||||
if (rc) {
|
||||
dbgprintf("rdc_init_one pci_enable_device failed \n");
|
||||
return rc;
|
||||
}
|
||||
/* initialize controller */
|
||||
|
||||
pci_intx(pdev, 1); /* enable interrupt */
|
||||
|
||||
return ata_pci_sff_init_one(pdev, ppinfo, &rdc_pata_sht, NULL);
|
||||
}
|
||||
|
||||
/* a pci driver */
|
||||
static struct pci_driver rdc_pata_driver = {
|
||||
.name = DRIVER_NAME,
|
||||
.id_table = rdc_pata_id_table,
|
||||
.probe = rdc_init_one,
|
||||
.remove = ata_pci_remove_one,
|
||||
#ifdef CONFIG_PM
|
||||
.suspend = ata_pci_device_suspend,
|
||||
.resume = ata_pci_device_resume,
|
||||
#endif
|
||||
};
|
||||
|
||||
static int __init pata_rdc_init(void)
|
||||
{
|
||||
int rc;
|
||||
|
||||
dbgprintf("pata_rdc_init\n");
|
||||
rc = pci_register_driver(&rdc_pata_driver);
|
||||
if (rc) {
|
||||
dbgprintf("pata_rdc_init faile\n");
|
||||
return rc;
|
||||
}
|
||||
|
||||
in_module_init = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __exit pata_rdc_exit(void)
|
||||
{
|
||||
dbgprintf("pata_rdc_exit\n");
|
||||
pci_unregister_driver(&rdc_pata_driver);
|
||||
}
|
||||
|
||||
module_init(pata_rdc_init);
|
||||
module_exit(pata_rdc_exit);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("RDC PCI IDE Driver");
|
||||
MODULE_VERSION(DRIVER_VERSION);
|
||||
|
|
|
|||
|
|
@ -141,34 +141,4 @@ enum rdc_controller_ids {
|
|||
RDC_17F31012
|
||||
};
|
||||
|
||||
/* callback function for driver */
|
||||
static int rdc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
|
||||
|
||||
/* callback function for ata_port */
|
||||
static int rdc_pata_port_start(struct ata_port *ap);
|
||||
|
||||
static void rdc_pata_port_stop(struct ata_port *ap);
|
||||
|
||||
static int rdc_pata_prereset(struct ata_link *link, unsigned long deadline);
|
||||
|
||||
static int rdc_pata_cable_detect(struct ata_port *ap);
|
||||
|
||||
static void rdc_pata_set_piomode(struct ata_port *ap, struct ata_device *adev);
|
||||
|
||||
static void rdc_pata_set_dmamode(struct ata_port *ap, struct ata_device *adev);
|
||||
|
||||
/* modified PCIDeviceIO code. */
|
||||
static uint PCIDeviceIO_ReadPCIConfiguration(struct pci_dev *pdev, uint Offset, uint Length, void *pBuffer);
|
||||
|
||||
static uint PCIDeviceIO_WritePCIConfiguration(struct pci_dev *pdev, uint Offset, uint Length, void *pBuffer);
|
||||
|
||||
/* modify ATAHostAdapter code */
|
||||
static uint ATAHostAdapter_SetPrimaryPIO(struct pci_dev *pdev, uint DeviceID, uint PIOTimingMode, uint DMAEnable, uint PrefetchPostingEnable);
|
||||
|
||||
static uint ATAHostAdapter_SetSecondaryPIO(struct pci_dev *pdev, uint DeviceID, uint PIOTimingMode, uint DMAEnable, uint PrefetchPostingEnable);
|
||||
|
||||
static uint ATAHostAdapter_SetPrimaryUDMA(struct pci_dev *pdev, uint DeviceID, uint UDMAEnable, uint UDMATimingMode);
|
||||
|
||||
static uint ATAHostAdapter_SetSecondaryUDMA(struct pci_dev *pdev, uint DeviceID, uint UDMAEnable, uint UDMATimingMode);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue