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[ARM] 4581/1: Fix the conditional execution of the NWFPE instructions 

Starting with ARMv7-A, conditional execution of undefined instructions
can trigger an exception even if the condition check fails. This patch
modifies the NWFPE support to check the condition before emulating the
instruction.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Catalin Marinas 2007-09-25 15:21:00 +01:00 committed by Russell King
parent ec6b148226
commit c1f438f5ee
1 changed files with 14 additions and 11 deletions
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25
arch/arm/nwfpe/entry.S
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@ -70,13 +70,24 @@ floating point instructions. GCC attempts to group floating point
instructions to allow the emulator to spread the cost of the trap over instructions to allow the emulator to spread the cost of the trap over
several floating point instructions. */ several floating point instructions. */
#include <asm/asm-offsets.h>
.globl nwfpe_enter .globl nwfpe_enter
nwfpe_enter: nwfpe_enter:
mov r4, lr @ save the failure-return addresses mov r4, lr @ save the failure-return addresses
mov sl, sp @ we access the registers via 'sl' mov sl, sp @ we access the registers via 'sl'
ldr r5, [sp, #60] @ get contents of PC; ldr r5, [sp, #S_PC] @ get contents of PC;
mov r6, r0 @ save the opcode
emulate: emulate:
ldr r1, [sp, #S_PSR] @ fetch the PSR
bl checkCondition @ check the condition
cmp r0, #0 @ r0 = 0 ==> condition failed
@ if condition code failed to match, next insn
beq next @ get the next instruction;
mov r0, r6 @ prepare for EmulateAll()
bl EmulateAll @ emulate the instruction bl EmulateAll @ emulate the instruction
cmp r0, #0 @ was emulation successful cmp r0, #0 @ was emulation successful
moveq pc, r4 @ no, return failure moveq pc, r4 @ no, return failure
@ -91,18 +102,10 @@ next:
teqne r2, #0x0E000000 teqne r2, #0x0E000000
movne pc, r9 @ return ok if not a fp insn movne pc, r9 @ return ok if not a fp insn
str r5, [sp, #60] @ update PC copy in regs str r5, [sp, #S_PC] @ update PC copy in regs
mov r0, r6 @ save a copy mov r0, r6 @ save a copy
ldr r1, [sp, #64] @ fetch the condition codes b emulate @ check condition and emulate
bl checkCondition @ check the condition
cmp r0, #0 @ r0 = 0 ==> condition failed
@ if condition code failed to match, next insn
beq next @ get the next instruction;
mov r0, r6 @ prepare for EmulateAll()
b emulate @ if r0 != 0, goto EmulateAll
@ We need to be prepared for the instructions at .Lx1 and .Lx2 @ We need to be prepared for the instructions at .Lx1 and .Lx2
@ to fault. Emit the appropriate exception gunk to fix things up. @ to fault. Emit the appropriate exception gunk to fix things up.