From 13340b2a1ef64891572c10927e5626e2b6a81b64 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 30 Jun 2011 12:58:01 +0000 Subject: [PATCH 01/56] omap2+: fix build regression board-generic.c now contains a reference to omap3_timer, but depends only on ARCH_OMAP2, not on ARCH_OMAP3, which controls that symbol. omap2_timer seems to be more appropriate anyway, so use that instead. Signed-off-by: Arnd Bergmann Acked-by: Tony Lindgren --- arch/arm/mach-omap2/board-generic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index c6ecf607ebd6..54db41a84a9b 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -72,5 +72,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx") .init_early = omap_generic_init_early, .init_irq = omap2_init_irq, .init_machine = omap_generic_init, - .timer = &omap3_timer, + .timer = &omap2_timer, MACHINE_END From a53b8e3b995f8b7c8a8c4ef5aa367958e46139b3 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Sat, 4 Jun 2011 08:16:41 +0300 Subject: [PATCH 02/56] OMAP: New twl-common for common TWL configuration Introduce a new file, which will be used to configure common pmic (TWL) devices, regulators, and TWL audio. Signed-off-by: Peter Ujfalusi Acked-by: Tony Lindgren --- arch/arm/mach-omap2/Makefile | 2 +- arch/arm/mach-omap2/common-board-devices.c | 21 ---------- arch/arm/mach-omap2/common-board-devices.h | 26 +----------- arch/arm/mach-omap2/twl-common.c | 46 ++++++++++++++++++++++ arch/arm/mach-omap2/twl-common.h | 28 +++++++++++++ 5 files changed, 77 insertions(+), 46 deletions(-) create mode 100644 arch/arm/mach-omap2/twl-common.c create mode 100644 arch/arm/mach-omap2/twl-common.h diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index adbe82d72d4e..ff1466fbf5c5 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -269,4 +269,4 @@ obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o disp-$(CONFIG_OMAP2_DSS) := display.o obj-y += $(disp-m) $(disp-y) -obj-y += common-board-devices.o +obj-y += common-board-devices.o twl-common.o diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c index 0043fa8e3703..bcb0c5817167 100644 --- a/arch/arm/mach-omap2/common-board-devices.c +++ b/arch/arm/mach-omap2/common-board-devices.c @@ -20,36 +20,15 @@ * */ -#include -#include - #include #include #include -#include #include #include #include "common-board-devices.h" -static struct i2c_board_info __initdata pmic_i2c_board_info = { - .addr = 0x48, - .flags = I2C_CLIENT_WAKE, -}; - -void __init omap_pmic_init(int bus, u32 clkrate, - const char *pmic_type, int pmic_irq, - struct twl4030_platform_data *pmic_data) -{ - strncpy(pmic_i2c_board_info.type, pmic_type, - sizeof(pmic_i2c_board_info.type)); - pmic_i2c_board_info.irq = pmic_irq; - pmic_i2c_board_info.platform_data = pmic_data; - - omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); -} - #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) static struct omap2_mcspi_device_config ads7846_mcspi_config = { diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h index 679719051df5..a0b4a42836ab 100644 --- a/arch/arm/mach-omap2/common-board-devices.h +++ b/arch/arm/mach-omap2/common-board-devices.h @@ -1,33 +1,11 @@ #ifndef __OMAP_COMMON_BOARD_DEVICES__ #define __OMAP_COMMON_BOARD_DEVICES__ +#include "twl-common.h" + #define NAND_BLOCK_SIZE SZ_128K -struct twl4030_platform_data; struct mtd_partition; - -void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, - struct twl4030_platform_data *pmic_data); - -static inline void omap2_pmic_init(const char *pmic_type, - struct twl4030_platform_data *pmic_data) -{ - omap_pmic_init(2, 2600, pmic_type, INT_24XX_SYS_NIRQ, pmic_data); -} - -static inline void omap3_pmic_init(const char *pmic_type, - struct twl4030_platform_data *pmic_data) -{ - omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data); -} - -static inline void omap4_pmic_init(const char *pmic_type, - struct twl4030_platform_data *pmic_data) -{ - /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */ - omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data); -} - struct ads7846_platform_data; void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c new file mode 100644 index 000000000000..4f7b24c1a264 --- /dev/null +++ b/arch/arm/mach-omap2/twl-common.c @@ -0,0 +1,46 @@ +/* + * twl-common.c + * + * Copyright (C) 2011 Texas Instruments, Inc.. + * Author: Peter Ujfalusi + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#include +#include +#include + +#include + +#include "twl-common.h" + +static struct i2c_board_info __initdata pmic_i2c_board_info = { + .addr = 0x48, + .flags = I2C_CLIENT_WAKE, +}; + +void __init omap_pmic_init(int bus, u32 clkrate, + const char *pmic_type, int pmic_irq, + struct twl4030_platform_data *pmic_data) +{ + strncpy(pmic_i2c_board_info.type, pmic_type, + sizeof(pmic_i2c_board_info.type)); + pmic_i2c_board_info.irq = pmic_irq; + pmic_i2c_board_info.platform_data = pmic_data; + + omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); +} diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h new file mode 100644 index 000000000000..e9fe2ab4944a --- /dev/null +++ b/arch/arm/mach-omap2/twl-common.h @@ -0,0 +1,28 @@ +#ifndef __OMAP_PMIC_COMMON__ +#define __OMAP_PMIC_COMMON__ + +struct twl4030_platform_data; + +void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, + struct twl4030_platform_data *pmic_data); + +static inline void omap2_pmic_init(const char *pmic_type, + struct twl4030_platform_data *pmic_data) +{ + omap_pmic_init(2, 2600, pmic_type, INT_24XX_SYS_NIRQ, pmic_data); +} + +static inline void omap3_pmic_init(const char *pmic_type, + struct twl4030_platform_data *pmic_data) +{ + omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data); +} + +static inline void omap4_pmic_init(const char *pmic_type, + struct twl4030_platform_data *pmic_data) +{ + /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */ + omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data); +} + +#endif /* __OMAP_PMIC_COMMON__ */ From b22f954bae35be115a10c6426dc070f7d652b32e Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Tue, 7 Jun 2011 10:26:46 +0300 Subject: [PATCH 03/56] OMAP4: Move common twl6030 configuration to twl-common Reduce the amount of duplicated code by moving the common configuration for TWL6030 (on OMAP4 platform) to the twl-common file. Use the omap4_pmic_get_config function from board files to properly configure the PMIC with the common fields. Signed-off-by: Peter Ujfalusi Acked-by: Tony Lindgren --- arch/arm/mach-omap2/board-4430sdp.c | 141 ++------------------- arch/arm/mach-omap2/board-omap4panda.c | 146 ++-------------------- arch/arm/mach-omap2/twl-common.c | 163 +++++++++++++++++++++++++ arch/arm/mach-omap2/twl-common.h | 20 +++ 4 files changed, 205 insertions(+), 265 deletions(-) diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index d7df07ef2cea..933b25bb10de 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -302,14 +302,6 @@ static struct omap_musb_board_data musb_board_data = { .power = 100, }; -static struct twl4030_usb_data omap4_usbphy_data = { - .phy_init = omap4430_phy_init, - .phy_exit = omap4430_phy_exit, - .phy_power = omap4430_phy_power, - .phy_set_clock = omap4430_phy_set_clk, - .phy_suspend = omap4430_phy_suspend, -}; - static struct omap2_hsmmc_info mmc[] = { { .mmc = 2, @@ -332,10 +324,6 @@ static struct regulator_consumer_supply sdp4430_vaux_supply[] = { REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), }; -static struct regulator_consumer_supply sdp4430_vmmc_supply[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), -}; - static int omap4_twl6030_hsmmc_late_init(struct device *dev) { int ret = 0; @@ -394,61 +382,6 @@ static struct regulator_init_data sdp4430_vaux1 = { .consumer_supplies = sdp4430_vaux_supply, }; -static struct regulator_init_data sdp4430_vaux2 = { - .constraints = { - .min_uV = 1200000, - .max_uV = 2800000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_init_data sdp4430_vaux3 = { - .constraints = { - .min_uV = 1000000, - .max_uV = 3000000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -/* VMMC1 for MMC1 card */ -static struct regulator_init_data sdp4430_vmmc = { - .constraints = { - .min_uV = 1200000, - .max_uV = 3000000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = 1, - .consumer_supplies = sdp4430_vmmc_supply, -}; - -static struct regulator_init_data sdp4430_vpp = { - .constraints = { - .min_uV = 1800000, - .max_uV = 2500000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - static struct regulator_init_data sdp4430_vusim = { .constraints = { .min_uV = 1200000, @@ -462,74 +395,10 @@ static struct regulator_init_data sdp4430_vusim = { }, }; -static struct regulator_init_data sdp4430_vana = { - .constraints = { - .min_uV = 2100000, - .max_uV = 2100000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_init_data sdp4430_vcxio = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_init_data sdp4430_vdac = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_init_data sdp4430_vusb = { - .constraints = { - .min_uV = 3300000, - .max_uV = 3300000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_init_data sdp4430_clk32kg = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -}; - static struct twl4030_platform_data sdp4430_twldata = { - .irq_base = TWL6030_IRQ_BASE, - .irq_end = TWL6030_IRQ_END, - /* Regulators */ - .vmmc = &sdp4430_vmmc, - .vpp = &sdp4430_vpp, .vusim = &sdp4430_vusim, - .vana = &sdp4430_vana, - .vcxio = &sdp4430_vcxio, - .vdac = &sdp4430_vdac, - .vusb = &sdp4430_vusb, .vaux1 = &sdp4430_vaux1, - .vaux2 = &sdp4430_vaux2, - .vaux3 = &sdp4430_vaux3, - .clk32kg = &sdp4430_clk32kg, - .usb = &omap4_usbphy_data }; static struct i2c_board_info __initdata sdp4430_i2c_3_boardinfo[] = { @@ -547,6 +416,16 @@ static struct i2c_board_info __initdata sdp4430_i2c_4_boardinfo[] = { }; static int __init omap4_i2c_init(void) { + omap4_pmic_get_config(&sdp4430_twldata, TWL_COMMON_PDATA_USB, + TWL_COMMON_REGULATOR_VDAC | + TWL_COMMON_REGULATOR_VAUX2 | + TWL_COMMON_REGULATOR_VAUX3 | + TWL_COMMON_REGULATOR_VMMC | + TWL_COMMON_REGULATOR_VPP | + TWL_COMMON_REGULATOR_VANA | + TWL_COMMON_REGULATOR_VCXIO | + TWL_COMMON_REGULATOR_VUSB | + TWL_COMMON_REGULATOR_CLK32KG); omap4_pmic_init("twl6030", &sdp4430_twldata); omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index ee2034e37468..9aaa96057666 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -154,14 +154,6 @@ static struct omap_musb_board_data musb_board_data = { .power = 100, }; -static struct twl4030_usb_data omap4_usbphy_data = { - .phy_init = omap4430_phy_init, - .phy_exit = omap4430_phy_exit, - .phy_power = omap4430_phy_power, - .phy_set_clock = omap4430_phy_set_clk, - .phy_suspend = omap4430_phy_suspend, -}; - static struct omap2_hsmmc_info mmc[] = { { .mmc = 1, @@ -181,10 +173,6 @@ static struct omap2_hsmmc_info mmc[] = { {} /* Terminator */ }; -static struct regulator_consumer_supply omap4_panda_vmmc_supply[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), -}; - static struct regulator_consumer_supply omap4_panda_vmmc5_supply[] = { REGULATOR_SUPPLY("vmmc", "omap_hsmmc.4"), }; @@ -269,128 +257,8 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers) return 0; } -static struct regulator_init_data omap4_panda_vaux2 = { - .constraints = { - .min_uV = 1200000, - .max_uV = 2800000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_init_data omap4_panda_vaux3 = { - .constraints = { - .min_uV = 1000000, - .max_uV = 3000000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -/* VMMC1 for MMC1 card */ -static struct regulator_init_data omap4_panda_vmmc = { - .constraints = { - .min_uV = 1200000, - .max_uV = 3000000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(omap4_panda_vmmc_supply), - .consumer_supplies = omap4_panda_vmmc_supply, -}; - -static struct regulator_init_data omap4_panda_vpp = { - .constraints = { - .min_uV = 1800000, - .max_uV = 2500000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_init_data omap4_panda_vana = { - .constraints = { - .min_uV = 2100000, - .max_uV = 2100000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_init_data omap4_panda_vcxio = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_init_data omap4_panda_vdac = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_init_data omap4_panda_vusb = { - .constraints = { - .min_uV = 3300000, - .max_uV = 3300000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_init_data omap4_panda_clk32kg = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -}; - -static struct twl4030_platform_data omap4_panda_twldata = { - .irq_base = TWL6030_IRQ_BASE, - .irq_end = TWL6030_IRQ_END, - - /* Regulators */ - .vmmc = &omap4_panda_vmmc, - .vpp = &omap4_panda_vpp, - .vana = &omap4_panda_vana, - .vcxio = &omap4_panda_vcxio, - .vdac = &omap4_panda_vdac, - .vusb = &omap4_panda_vusb, - .vaux2 = &omap4_panda_vaux2, - .vaux3 = &omap4_panda_vaux3, - .clk32kg = &omap4_panda_clk32kg, - .usb = &omap4_usbphy_data, -}; +/* Panda board uses the common PMIC configuration */ +static struct twl4030_platform_data omap4_panda_twldata; /* * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM @@ -404,6 +272,16 @@ static struct i2c_board_info __initdata panda_i2c_eeprom[] = { static int __init omap4_panda_i2c_init(void) { + omap4_pmic_get_config(&omap4_panda_twldata, TWL_COMMON_PDATA_USB, + TWL_COMMON_REGULATOR_VDAC | + TWL_COMMON_REGULATOR_VAUX2 | + TWL_COMMON_REGULATOR_VAUX3 | + TWL_COMMON_REGULATOR_VMMC | + TWL_COMMON_REGULATOR_VPP | + TWL_COMMON_REGULATOR_VANA | + TWL_COMMON_REGULATOR_VCXIO | + TWL_COMMON_REGULATOR_VUSB | + TWL_COMMON_REGULATOR_CLK32KG); omap4_pmic_init("twl6030", &omap4_panda_twldata); omap_register_i2c_bus(2, 400, NULL, 0); /* diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c index 4f7b24c1a264..cf80f4cad729 100644 --- a/arch/arm/mach-omap2/twl-common.c +++ b/arch/arm/mach-omap2/twl-common.c @@ -23,8 +23,11 @@ #include #include #include +#include +#include #include +#include #include "twl-common.h" @@ -44,3 +47,163 @@ void __init omap_pmic_init(int bus, u32 clkrate, omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); } + +static struct twl4030_usb_data omap4_usb_pdata = { + .phy_init = omap4430_phy_init, + .phy_exit = omap4430_phy_exit, + .phy_power = omap4430_phy_power, + .phy_set_clock = omap4430_phy_set_clk, + .phy_suspend = omap4430_phy_suspend, +}; + +static struct regulator_init_data omap4_vdac_idata = { + .constraints = { + .min_uV = 1800000, + .max_uV = 1800000, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, +}; + +static struct regulator_init_data omap4_vaux2_idata = { + .constraints = { + .min_uV = 1200000, + .max_uV = 2800000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE + | REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, +}; + +static struct regulator_init_data omap4_vaux3_idata = { + .constraints = { + .min_uV = 1000000, + .max_uV = 3000000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE + | REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, +}; + +static struct regulator_consumer_supply omap4_vmmc_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), +}; + +/* VMMC1 for MMC1 card */ +static struct regulator_init_data omap4_vmmc_idata = { + .constraints = { + .min_uV = 1200000, + .max_uV = 3000000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE + | REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(omap4_vmmc_supply), + .consumer_supplies = omap4_vmmc_supply, +}; + +static struct regulator_init_data omap4_vpp_idata = { + .constraints = { + .min_uV = 1800000, + .max_uV = 2500000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE + | REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, +}; + +static struct regulator_init_data omap4_vana_idata = { + .constraints = { + .min_uV = 2100000, + .max_uV = 2100000, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, +}; + +static struct regulator_init_data omap4_vcxio_idata = { + .constraints = { + .min_uV = 1800000, + .max_uV = 1800000, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, +}; + +static struct regulator_init_data omap4_vusb_idata = { + .constraints = { + .min_uV = 3300000, + .max_uV = 3300000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, +}; + +static struct regulator_init_data omap4_clk32kg_idata = { + .constraints = { + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, +}; + +void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, + u32 pdata_flags, u32 regulators_flags) +{ + if (!pmic_data->irq_base) + pmic_data->irq_base = TWL6030_IRQ_BASE; + if (!pmic_data->irq_end) + pmic_data->irq_end = TWL6030_IRQ_END; + + /* Common platform data configurations */ + if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) + pmic_data->usb = &omap4_usb_pdata; + + /* Common regulator configurations */ + if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) + pmic_data->vdac = &omap4_vdac_idata; + + if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && !pmic_data->vaux2) + pmic_data->vaux2 = &omap4_vaux2_idata; + + if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && !pmic_data->vaux3) + pmic_data->vaux3 = &omap4_vaux3_idata; + + if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && !pmic_data->vmmc) + pmic_data->vmmc = &omap4_vmmc_idata; + + if (regulators_flags & TWL_COMMON_REGULATOR_VPP && !pmic_data->vpp) + pmic_data->vpp = &omap4_vpp_idata; + + if (regulators_flags & TWL_COMMON_REGULATOR_VANA && !pmic_data->vana) + pmic_data->vana = &omap4_vana_idata; + + if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && !pmic_data->vcxio) + pmic_data->vcxio = &omap4_vcxio_idata; + + if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && !pmic_data->vusb) + pmic_data->vusb = &omap4_vusb_idata; + + if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG && + !pmic_data->clk32kg) + pmic_data->clk32kg = &omap4_clk32kg_idata; +} diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h index e9fe2ab4944a..d96c28987638 100644 --- a/arch/arm/mach-omap2/twl-common.h +++ b/arch/arm/mach-omap2/twl-common.h @@ -1,6 +1,23 @@ #ifndef __OMAP_PMIC_COMMON__ #define __OMAP_PMIC_COMMON__ +#define TWL_COMMON_PDATA_USB (1 << 0) + +/* Common LDO regulators for TWL4030/TWL6030 */ +#define TWL_COMMON_REGULATOR_VDAC (1 << 0) +#define TWL_COMMON_REGULATOR_VAUX1 (1 << 1) +#define TWL_COMMON_REGULATOR_VAUX2 (1 << 2) +#define TWL_COMMON_REGULATOR_VAUX3 (1 << 3) + +/* TWL6030 LDO regulators */ +#define TWL_COMMON_REGULATOR_VMMC (1 << 4) +#define TWL_COMMON_REGULATOR_VPP (1 << 5) +#define TWL_COMMON_REGULATOR_VUSIM (1 << 6) +#define TWL_COMMON_REGULATOR_VANA (1 << 7) +#define TWL_COMMON_REGULATOR_VCXIO (1 << 8) +#define TWL_COMMON_REGULATOR_VUSB (1 << 9) +#define TWL_COMMON_REGULATOR_CLK32KG (1 << 10) + struct twl4030_platform_data; void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, @@ -25,4 +42,7 @@ static inline void omap4_pmic_init(const char *pmic_type, omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data); } +void omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, + u32 pdata_flags, u32 regulators_flags); + #endif /* __OMAP_PMIC_COMMON__ */ From 827ed9aef2f13000d58616384ea6a22497e787b6 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Tue, 7 Jun 2011 10:28:54 +0300 Subject: [PATCH 04/56] OMAP3: Move common twl configuration to twl-common Reduce the amount of duplicated code by moving the common configuration for twl4030/5030/tpsxx to the twl-common file. Use the omap3_pmic_get_config function from board files to properly configure the PMIC with the common fields. Signed-off-by: Peter Ujfalusi Acked-by: Tony Lindgren --- arch/arm/mach-omap2/board-3430sdp.c | 42 ++-------------- arch/arm/mach-omap2/board-cm-t35.c | 9 +--- arch/arm/mach-omap2/board-devkit8000.c | 18 +------ arch/arm/mach-omap2/board-igep0020.c | 20 ++------ arch/arm/mach-omap2/board-ldp.c | 15 +----- arch/arm/mach-omap2/board-omap3beagle.c | 18 +------ arch/arm/mach-omap2/board-omap3evm.c | 24 ++------- arch/arm/mach-omap2/board-omap3pandora.c | 17 +------ arch/arm/mach-omap2/board-omap3stalker.c | 24 ++------- arch/arm/mach-omap2/board-omap3touchbook.c | 19 +------ arch/arm/mach-omap2/board-overo.c | 17 +------ arch/arm/mach-omap2/board-rm680.c | 8 +-- arch/arm/mach-omap2/board-rx51-peripherals.c | 15 +----- arch/arm/mach-omap2/board-zoom-peripherals.c | 51 ++++--------------- arch/arm/mach-omap2/twl-common.c | 53 ++++++++++++++++++++ arch/arm/mach-omap2/twl-common.h | 6 +++ 16 files changed, 99 insertions(+), 257 deletions(-) diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 12fae21346cf..8bbd4e0246b0 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -231,22 +231,6 @@ static void __init omap_3430sdp_init_early(void) omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL); } -static int sdp3430_batt_table[] = { -/* 0 C*/ -30800, 29500, 28300, 27100, -26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, -17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, -11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, -8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, -5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, -4040, 3910, 3790, 3670, 3550 -}; - -static struct twl4030_bci_platform_data sdp3430_bci_data = { - .battery_tmp_tbl = sdp3430_batt_table, - .tblsize = ARRAY_SIZE(sdp3430_batt_table), -}; - static struct omap2_hsmmc_info mmc[] = { { .mmc = 1, @@ -292,14 +276,6 @@ static struct twl4030_gpio_platform_data sdp3430_gpio_data = { .setup = sdp3430_twl_gpio_setup, }; -static struct twl4030_usb_data sdp3430_usb_data = { - .usb_mode = T2_USB_MODE_ULPI, -}; - -static struct twl4030_madc_platform_data sdp3430_madc_data = { - .irq_line = 1, -}; - /* regulator consumer mappings */ /* ads7846 on SPI */ @@ -463,24 +439,10 @@ static struct regulator_init_data sdp3430_vpll2 = { .consumer_supplies = sdp3430_vpll2_supplies, }; -static struct twl4030_codec_audio_data sdp3430_audio; - -static struct twl4030_codec_data sdp3430_codec = { - .audio_mclk = 26000000, - .audio = &sdp3430_audio, -}; - static struct twl4030_platform_data sdp3430_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - /* platform_data for children goes here */ - .bci = &sdp3430_bci_data, .gpio = &sdp3430_gpio_data, - .madc = &sdp3430_madc_data, .keypad = &sdp3430_kp_data, - .usb = &sdp3430_usb_data, - .codec = &sdp3430_codec, .vaux1 = &sdp3430_vaux1, .vaux2 = &sdp3430_vaux2, @@ -496,7 +458,11 @@ static struct twl4030_platform_data sdp3430_twldata = { static int __init omap3430_i2c_init(void) { /* i2c1 for PMIC only */ + omap3_pmic_get_config(&sdp3430_twldata, + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | + TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 0); omap3_pmic_init("twl4030", &sdp3430_twldata); + /* i2c2 on camera connector (for sensor control) and optional isp1301 */ omap_register_i2c_bus(2, 400, NULL, 0); /* i2c3 on display connector (for DVI, tfp410) */ diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index d76dca788540..cb00abc4dd5d 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -410,10 +410,6 @@ static struct regulator_init_data cm_t35_vpll2 = { .consumer_supplies = cm_t35_vdvi_supply, }; -static struct twl4030_usb_data cm_t35_usb_data = { - .usb_mode = T2_USB_MODE_ULPI, -}; - static uint32_t cm_t35_keymap[] = { KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN), @@ -492,12 +488,8 @@ static struct twl4030_gpio_platform_data cm_t35_gpio_data = { }; static struct twl4030_platform_data cm_t35_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - /* platform_data for children goes here */ .keypad = &cm_t35_kp_data, - .usb = &cm_t35_usb_data, .gpio = &cm_t35_gpio_data, .vmmc1 = &cm_t35_vmmc1, .vsim = &cm_t35_vsim, @@ -507,6 +499,7 @@ static struct twl4030_platform_data cm_t35_twldata = { static void __init cm_t35_init_i2c(void) { + omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, 0); omap3_pmic_init("tps65930", &cm_t35_twldata); } diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 949dbeabab26..364942ed36cc 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -332,25 +332,9 @@ static struct regulator_init_data devkit8000_vio = { .consumer_supplies = devkit8000_vio_supply, }; -static struct twl4030_usb_data devkit8000_usb_data = { - .usb_mode = T2_USB_MODE_ULPI, -}; - -static struct twl4030_codec_audio_data devkit8000_audio_data; - -static struct twl4030_codec_data devkit8000_codec_data = { - .audio_mclk = 26000000, - .audio = &devkit8000_audio_data, -}; - static struct twl4030_platform_data devkit8000_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - /* platform_data for children goes here */ - .usb = &devkit8000_usb_data, .gpio = &devkit8000_gpio_data, - .codec = &devkit8000_codec_data, .vmmc1 = &devkit8000_vmmc1, .vdac = &devkit8000_vdac, .vpll1 = &devkit8000_vpll1, @@ -360,6 +344,8 @@ static struct twl4030_platform_data devkit8000_twldata = { static int __init devkit8000_i2c_init(void) { + omap3_pmic_get_config(&devkit8000_twldata, + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); omap3_pmic_init("tps65930", &devkit8000_twldata); /* Bus 3 is attached to the DVI port where devices like the pico DLP * projector don't work reliably with 400kHz */ diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index f683835f936c..e0a66878112b 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c @@ -443,10 +443,6 @@ static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = { .setup = igep_twl_gpio_setup, }; -static struct twl4030_usb_data igep_usb_data = { - .usb_mode = T2_USB_MODE_ULPI, -}; - static int igep2_enable_dvi(struct omap_dss_device *dssdev) { gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1); @@ -522,13 +518,6 @@ static void __init igep_init_early(void) m65kxxxxam_sdrc_params); } -static struct twl4030_codec_audio_data igep2_audio_data; - -static struct twl4030_codec_data igep2_codec_data = { - .audio_mclk = 26000000, - .audio = &igep2_audio_data, -}; - static int igep2_keymap[] = { KEY(0, 0, KEY_LEFT), KEY(0, 1, KEY_RIGHT), @@ -561,11 +550,7 @@ static struct twl4030_keypad_data igep2_keypad_pdata = { }; static struct twl4030_platform_data igep_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - /* platform_data for children goes here */ - .usb = &igep_usb_data, .gpio = &igep_twl4030_gpio_pdata, .vmmc1 = &igep_vmmc1, .vio = &igep_vio, @@ -581,6 +566,8 @@ static void __init igep_i2c_init(void) { int ret; + omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_USB, 0); + if (machine_is_igep0020()) { /* * Bus 3 is attached to the DVI port where devices like the @@ -591,9 +578,10 @@ static void __init igep_i2c_init(void) if (ret) pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret); - igep_twldata.codec = &igep2_codec_data; igep_twldata.keypad = &igep2_keypad_pdata; igep_twldata.vpll2 = &igep2_vpll2; + /* Use common codec data */ + omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO, 0); } omap3_pmic_init("twl4030", &igep_twldata); diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index 5d4328f19c0f..218764c9377e 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -199,20 +199,12 @@ static void __init omap_ldp_init_early(void) omap2_init_common_devices(NULL, NULL); } -static struct twl4030_usb_data ldp_usb_data = { - .usb_mode = T2_USB_MODE_ULPI, -}; - static struct twl4030_gpio_platform_data ldp_gpio_data = { .gpio_base = OMAP_MAX_GPIO_LINES, .irq_base = TWL4030_GPIO_IRQ_BASE, .irq_end = TWL4030_GPIO_IRQ_END, }; -static struct twl4030_madc_platform_data ldp_madc_data = { - .irq_line = 1, -}; - static struct regulator_consumer_supply ldp_vmmc1_supply[] = { REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), }; @@ -253,12 +245,7 @@ static struct regulator_init_data ldp_vaux1 = { }; static struct twl4030_platform_data ldp_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - /* platform_data for children goes here */ - .madc = &ldp_madc_data, - .usb = &ldp_usb_data, .vmmc1 = &ldp_vmmc1, .vaux1 = &ldp_vaux1, .gpio = &ldp_gpio_data, @@ -267,6 +254,8 @@ static struct twl4030_platform_data ldp_twldata = { static int __init omap_i2c_init(void) { + omap3_pmic_get_config(&ldp_twldata, + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, 0); omap3_pmic_init("twl4030", &ldp_twldata); omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(3, 400, NULL, 0); diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 2d8dfb3213bf..ec61e9c460b2 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -380,25 +380,9 @@ static struct regulator_init_data beagle_vpll2 = { .consumer_supplies = beagle_vdvi_supplies, }; -static struct twl4030_usb_data beagle_usb_data = { - .usb_mode = T2_USB_MODE_ULPI, -}; - -static struct twl4030_codec_audio_data beagle_audio_data; - -static struct twl4030_codec_data beagle_codec_data = { - .audio_mclk = 26000000, - .audio = &beagle_audio_data, -}; - static struct twl4030_platform_data beagle_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - /* platform_data for children goes here */ - .usb = &beagle_usb_data, .gpio = &beagle_gpio_data, - .codec = &beagle_codec_data, .vmmc1 = &beagle_vmmc1, .vsim = &beagle_vsim, .vdac = &beagle_vdac, @@ -413,6 +397,8 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { static int __init omap3_beagle_i2c_init(void) { + omap3_pmic_get_config(&beagle_twldata, + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); omap3_pmic_init("twl4030", &beagle_twldata); /* Bus 3 is attached to the DVI port where devices like the pico DLP * projector don't work reliably with 400kHz */ diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 57bce0f2e195..1ca298a17623 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -396,10 +396,6 @@ static struct twl4030_gpio_platform_data omap3evm_gpio_data = { .setup = omap3evm_twl_gpio_setup, }; -static struct twl4030_usb_data omap3evm_usb_data = { - .usb_mode = T2_USB_MODE_ULPI, -}; - static uint32_t board_keymap[] = { KEY(0, 0, KEY_LEFT), KEY(0, 1, KEY_DOWN), @@ -434,17 +430,6 @@ static struct twl4030_keypad_data omap3evm_kp_data = { .rep = 1, }; -static struct twl4030_madc_platform_data omap3evm_madc_data = { - .irq_line = 1, -}; - -static struct twl4030_codec_audio_data omap3evm_audio_data; - -static struct twl4030_codec_data omap3evm_codec_data = { - .audio_mclk = 26000000, - .audio = &omap3evm_audio_data, -}; - static struct regulator_consumer_supply omap3_evm_vdda_dac_supply[] = { REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), }; @@ -547,15 +532,9 @@ struct wl12xx_platform_data omap3evm_wlan_data __initdata = { #endif static struct twl4030_platform_data omap3evm_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - /* platform_data for children goes here */ .keypad = &omap3evm_kp_data, - .madc = &omap3evm_madc_data, - .usb = &omap3evm_usb_data, .gpio = &omap3evm_gpio_data, - .codec = &omap3evm_codec_data, .vdac = &omap3_evm_vdac, .vpll2 = &omap3_evm_vpll2, .vio = &omap3evm_vio, @@ -565,6 +544,9 @@ static struct twl4030_platform_data omap3evm_twldata = { static int __init omap3_evm_i2c_init(void) { + omap3_pmic_get_config(&omap3evm_twldata, + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | + TWL_COMMON_PDATA_AUDIO, 0); omap3_pmic_init("twl4030", &omap3evm_twldata); omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(3, 400, NULL, 0); diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index d4ea9408560e..f5abf766db4f 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -508,25 +508,10 @@ static struct platform_device pandora_vwlan_device = { }, }; -static struct twl4030_usb_data omap3pandora_usb_data = { - .usb_mode = T2_USB_MODE_ULPI, -}; - -static struct twl4030_codec_audio_data omap3pandora_audio_data; - -static struct twl4030_codec_data omap3pandora_codec_data = { - .audio_mclk = 26000000, - .audio = &omap3pandora_audio_data, -}; - static struct twl4030_bci_platform_data pandora_bci_data; static struct twl4030_platform_data omap3pandora_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, .gpio = &omap3pandora_gpio_data, - .usb = &omap3pandora_usb_data, - .codec = &omap3pandora_codec_data, .vmmc1 = &pandora_vmmc1, .vmmc2 = &pandora_vmmc2, .vdac = &pandora_vdac, @@ -548,6 +533,8 @@ static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = { static int __init omap3pandora_i2c_init(void) { + omap3_pmic_get_config(&omap3pandora_twldata, + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); omap3_pmic_init("tps65950", &omap3pandora_twldata); /* i2c2 pins are not connected */ omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo, diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index b8ad4dd5bbbf..6e59e59c0fbb 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -349,10 +349,6 @@ static struct twl4030_gpio_platform_data omap3stalker_gpio_data = { .setup = omap3stalker_twl_gpio_setup, }; -static struct twl4030_usb_data omap3stalker_usb_data = { - .usb_mode = T2_USB_MODE_ULPI, -}; - static uint32_t board_keymap[] = { KEY(0, 0, KEY_LEFT), KEY(0, 1, KEY_DOWN), @@ -387,17 +383,6 @@ static struct twl4030_keypad_data omap3stalker_kp_data = { .rep = 1, }; -static struct twl4030_madc_platform_data omap3stalker_madc_data = { - .irq_line = 1, -}; - -static struct twl4030_codec_audio_data omap3stalker_audio_data; - -static struct twl4030_codec_data omap3stalker_codec_data = { - .audio_mclk = 26000000, - .audio = &omap3stalker_audio_data, -}; - static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply[] = { REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), }; @@ -439,15 +424,9 @@ static struct regulator_init_data omap3_stalker_vpll2 = { }; static struct twl4030_platform_data omap3stalker_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - /* platform_data for children goes here */ .keypad = &omap3stalker_kp_data, - .madc = &omap3stalker_madc_data, - .usb = &omap3stalker_usb_data, .gpio = &omap3stalker_gpio_data, - .codec = &omap3stalker_codec_data, .vdac = &omap3_stalker_vdac, .vpll2 = &omap3_stalker_vpll2, .vmmc1 = &omap3stalker_vmmc1, @@ -470,6 +449,9 @@ static struct i2c_board_info __initdata omap3stalker_i2c_boardinfo3[] = { static int __init omap3_stalker_i2c_init(void) { + omap3_pmic_get_config(&omap3stalker_twldata, + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | + TWL_COMMON_PDATA_AUDIO, 0); omap3_pmic_init("twl4030", &omap3stalker_twldata); omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3, diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index 57e6ed34ebbc..717972c5ce3e 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -235,25 +235,9 @@ static struct regulator_init_data touchbook_vpll2 = { .consumer_supplies = touchbook_vdvi_supply, }; -static struct twl4030_usb_data touchbook_usb_data = { - .usb_mode = T2_USB_MODE_ULPI, -}; - -static struct twl4030_codec_audio_data touchbook_audio_data; - -static struct twl4030_codec_data touchbook_codec_data = { - .audio_mclk = 26000000, - .audio = &touchbook_audio_data, -}; - static struct twl4030_platform_data touchbook_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - /* platform_data for children goes here */ - .usb = &touchbook_usb_data, .gpio = &touchbook_gpio_data, - .codec = &touchbook_codec_data, .vmmc1 = &touchbook_vmmc1, .vsim = &touchbook_vsim, .vdac = &touchbook_vdac, @@ -269,8 +253,9 @@ static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = { static int __init omap3_touchbook_i2c_init(void) { /* Standard TouchBook bus */ + omap3_pmic_get_config(&touchbook_twldata, + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); omap3_pmic_init("twl4030", &touchbook_twldata); - /* Additional TouchBook bus */ omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo, ARRAY_SIZE(touchBook_i2c_boardinfo)); diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 1bf2f39b9d0e..776b44412db1 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -433,10 +433,6 @@ static struct twl4030_gpio_platform_data overo_gpio_data = { .setup = overo_twl_gpio_setup, }; -static struct twl4030_usb_data overo_usb_data = { - .usb_mode = T2_USB_MODE_ULPI, -}; - static struct regulator_init_data overo_vmmc1 = { .constraints = { .min_uV = 1850000, @@ -480,19 +476,8 @@ static struct regulator_init_data overo_vpll2 = { .consumer_supplies = overo_vdds_dsi_supply, }; -static struct twl4030_codec_audio_data overo_audio_data; - -static struct twl4030_codec_data overo_codec_data = { - .audio_mclk = 26000000, - .audio = &overo_audio_data, -}; - static struct twl4030_platform_data overo_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, .gpio = &overo_gpio_data, - .usb = &overo_usb_data, - .codec = &overo_codec_data, .vmmc1 = &overo_vmmc1, .vdac = &overo_vdac, .vpll2 = &overo_vpll2, @@ -500,6 +485,8 @@ static struct twl4030_platform_data overo_twldata = { static int __init overo_i2c_init(void) { + omap3_pmic_get_config(&overo_twldata, + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); omap3_pmic_init("tps65950", &overo_twldata); /* i2c2 pins are used for gpio */ omap_register_i2c_bus(3, 400, NULL, 0); diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c index 54dceb163415..7dfed24ee12e 100644 --- a/arch/arm/mach-omap2/board-rm680.c +++ b/arch/arm/mach-omap2/board-rm680.c @@ -79,20 +79,14 @@ static struct twl4030_gpio_platform_data rm680_gpio_data = { .pulldowns = BIT(1) | BIT(2) | BIT(8) | BIT(15), }; -static struct twl4030_usb_data rm680_usb_data = { - .usb_mode = T2_USB_MODE_ULPI, -}; - static struct twl4030_platform_data rm680_twl_data = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, .gpio = &rm680_gpio_data, - .usb = &rm680_usb_data, /* add rest of the children here */ }; static void __init rm680_i2c_init(void) { + omap3_pmic_get_config(&rm680_twl_data, TWL_COMMON_PDATA_USB, 0); omap_pmic_init(1, 2900, "twl5031", INT_34XX_SYS_NIRQ, &rm680_twl_data); omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(3, 400, NULL, 0); diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 5e559dda3cc3..e0a2804e2b71 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -288,10 +288,6 @@ static struct twl4030_keypad_data rx51_kp_data = { .rep = 1, }; -static struct twl4030_madc_platform_data rx51_madc_data = { - .irq_line = 1, -}; - /* Enable input logic and pull all lines up when eMMC is on. */ static struct omap_board_mux rx51_mmc2_on_mux[] = { OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), @@ -603,10 +599,6 @@ static struct twl4030_gpio_platform_data rx51_gpio_data = { .setup = rx51_twlgpio_setup, }; -static struct twl4030_usb_data rx51_usb_data = { - .usb_mode = T2_USB_MODE_ULPI, -}; - static struct twl4030_ins sleep_on_seq[] __initdata = { /* * Turn off everything @@ -778,14 +770,9 @@ struct twl4030_codec_data rx51_codec_data __initdata = { }; static struct twl4030_platform_data rx51_twldata __initdata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - /* platform_data for children goes here */ .gpio = &rx51_gpio_data, .keypad = &rx51_kp_data, - .madc = &rx51_madc_data, - .usb = &rx51_usb_data, .power = &rx51_t2scripts_data, .codec = &rx51_codec_data, @@ -850,6 +837,8 @@ static int __init rx51_i2c_init(void) rx51_twldata.vaux3 = &rx51_vaux3_cam; } rx51_twldata.vmmc2 = &rx51_vmmc2; + omap3_pmic_get_config(&rx51_twldata, + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, 0); omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata); omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c index 8495f82fcbab..6d8df1b40d86 100644 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c @@ -285,26 +285,6 @@ static void zoom2_set_hs_extmute(int mute) gpio_set_value(ZOOM2_HEADSET_EXTMUTE_GPIO, mute); } -static int zoom_batt_table[] = { -/* 0 C*/ -30800, 29500, 28300, 27100, -26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, -17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, -11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, -8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, -5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, -4040, 3910, 3790, 3670, 3550 -}; - -static struct twl4030_bci_platform_data zoom_bci_data = { - .battery_tmp_tbl = zoom_batt_table, - .tblsize = ARRAY_SIZE(zoom_batt_table), -}; - -static struct twl4030_usb_data zoom_usb_data = { - .usb_mode = T2_USB_MODE_ULPI, -}; - static struct twl4030_gpio_platform_data zoom_gpio_data = { .gpio_base = OMAP_MAX_GPIO_LINES, .irq_base = TWL4030_GPIO_IRQ_BASE, @@ -312,28 +292,10 @@ static struct twl4030_gpio_platform_data zoom_gpio_data = { .setup = zoom_twl_gpio_setup, }; -static struct twl4030_madc_platform_data zoom_madc_data = { - .irq_line = 1, -}; - -static struct twl4030_codec_audio_data zoom_audio_data; - -static struct twl4030_codec_data zoom_codec_data = { - .audio_mclk = 26000000, - .audio = &zoom_audio_data, -}; - static struct twl4030_platform_data zoom_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - /* platform_data for children goes here */ - .bci = &zoom_bci_data, - .madc = &zoom_madc_data, - .usb = &zoom_usb_data, .gpio = &zoom_gpio_data, .keypad = &zoom_kp_twl4030_data, - .codec = &zoom_codec_data, .vmmc1 = &zoom_vmmc1, .vmmc2 = &zoom_vmmc2, .vsim = &zoom_vsim, @@ -343,10 +305,17 @@ static struct twl4030_platform_data zoom_twldata = { static int __init omap_i2c_init(void) { + omap3_pmic_get_config(&zoom_twldata, + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | + TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 0); + if (machine_is_omap_zoom2()) { - zoom_audio_data.ramp_delay_value = 3; /* 161 ms */ - zoom_audio_data.hs_extmute = 1; - zoom_audio_data.set_hs_extmute = zoom2_set_hs_extmute; + struct twl4030_codec_audio_data *audio_data; + audio_data = zoom_twldata.codec->audio; + + audio_data->ramp_delay_value = 3; /* 161 ms */ + audio_data->hs_extmute = 1; + audio_data->set_hs_extmute = zoom2_set_hs_extmute; } omap_pmic_init(1, 2400, "twl5030", INT_34XX_SYS_NIRQ, &zoom_twldata); omap_register_i2c_bus(2, 400, NULL, 0); diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c index cf80f4cad729..9e8decf14a22 100644 --- a/arch/arm/mach-omap2/twl-common.c +++ b/arch/arm/mach-omap2/twl-common.c @@ -56,6 +56,37 @@ static struct twl4030_usb_data omap4_usb_pdata = { .phy_suspend = omap4430_phy_suspend, }; +static struct twl4030_usb_data omap3_usb_pdata = { + .usb_mode = T2_USB_MODE_ULPI, +}; + +static int omap3_batt_table[] = { +/* 0 C */ +30800, 29500, 28300, 27100, +26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, +17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, +11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, +8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, +5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, +4040, 3910, 3790, 3670, 3550 +}; + +static struct twl4030_bci_platform_data omap3_bci_pdata = { + .battery_tmp_tbl = omap3_batt_table, + .tblsize = ARRAY_SIZE(omap3_batt_table), +}; + +static struct twl4030_madc_platform_data omap3_madc_pdata = { + .irq_line = 1, +}; + +static struct twl4030_codec_audio_data omap3_audio; + +static struct twl4030_codec_data omap3_codec_pdata = { + .audio_mclk = 26000000, + .audio = &omap3_audio, +}; + static struct regulator_init_data omap4_vdac_idata = { .constraints = { .min_uV = 1800000, @@ -207,3 +238,25 @@ void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, !pmic_data->clk32kg) pmic_data->clk32kg = &omap4_clk32kg_idata; } + +void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, + u32 pdata_flags, u32 regulators_flags) +{ + if (!pmic_data->irq_base) + pmic_data->irq_base = TWL4030_IRQ_BASE; + if (!pmic_data->irq_end) + pmic_data->irq_end = TWL4030_IRQ_END; + + /* Common platform data configurations */ + if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) + pmic_data->usb = &omap3_usb_pdata; + + if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci) + pmic_data->bci = &omap3_bci_pdata; + + if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc) + pmic_data->madc = &omap3_madc_pdata; + + if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->codec) + pmic_data->codec = &omap3_codec_pdata; +} diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h index d96c28987638..3b4b05d529ba 100644 --- a/arch/arm/mach-omap2/twl-common.h +++ b/arch/arm/mach-omap2/twl-common.h @@ -2,6 +2,9 @@ #define __OMAP_PMIC_COMMON__ #define TWL_COMMON_PDATA_USB (1 << 0) +#define TWL_COMMON_PDATA_BCI (1 << 1) +#define TWL_COMMON_PDATA_MADC (1 << 2) +#define TWL_COMMON_PDATA_AUDIO (1 << 3) /* Common LDO regulators for TWL4030/TWL6030 */ #define TWL_COMMON_REGULATOR_VDAC (1 << 0) @@ -42,6 +45,9 @@ static inline void omap4_pmic_init(const char *pmic_type, omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data); } +void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, + u32 pdata_flags, u32 regulators_flags); + void omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, u32 pdata_flags, u32 regulators_flags); From b252b0efb605b92a2f5d118e294d088d89cfd286 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Tue, 7 Jun 2011 11:38:24 +0300 Subject: [PATCH 05/56] OMAP3: Move common regulator configuration to twl-common Some regulator config can be moved out from board files, since they are close to identical. Signed-off-by: Peter Ujfalusi Acked-by: Tony Lindgren --- arch/arm/mach-omap2/board-3430sdp.c | 51 +++----------------- arch/arm/mach-omap2/board-cm-t35.c | 44 +++-------------- arch/arm/mach-omap2/board-devkit8000.c | 22 +-------- arch/arm/mach-omap2/board-igep0020.c | 28 ++--------- arch/arm/mach-omap2/board-omap3beagle.c | 46 ++---------------- arch/arm/mach-omap2/board-omap3evm.c | 50 +++---------------- arch/arm/mach-omap2/board-omap3pandora.c | 47 ++++-------------- arch/arm/mach-omap2/board-omap3stalker.c | 50 +++---------------- arch/arm/mach-omap2/board-omap3touchbook.c | 44 +++++------------ arch/arm/mach-omap2/board-overo.c | 46 ++---------------- arch/arm/mach-omap2/board-rx51-peripherals.c | 27 +++-------- arch/arm/mach-omap2/board-zoom-peripherals.c | 42 ++-------------- arch/arm/mach-omap2/twl-common.c | 42 ++++++++++++++++ arch/arm/mach-omap2/twl-common.h | 5 ++ 14 files changed, 124 insertions(+), 420 deletions(-) diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 8bbd4e0246b0..bd600cfb7f80 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -283,16 +283,6 @@ static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = { REGULATOR_SUPPLY("vcc", "spi1.0"), }; -static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = { - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -}; - -/* VPLL2 for digital video outputs */ -static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = { - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), -}; - static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = { REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), }; @@ -409,36 +399,6 @@ static struct regulator_init_data sdp3430_vsim = { .consumer_supplies = sdp3430_vsim_supplies, }; -/* VDAC for DSS driving S-Video */ -static struct regulator_init_data sdp3430_vdac = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(sdp3430_vdda_dac_supplies), - .consumer_supplies = sdp3430_vdda_dac_supplies, -}; - -static struct regulator_init_data sdp3430_vpll2 = { - .constraints = { - .name = "VDVI", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies), - .consumer_supplies = sdp3430_vpll2_supplies, -}; - static struct twl4030_platform_data sdp3430_twldata = { /* platform_data for children goes here */ .gpio = &sdp3430_gpio_data, @@ -451,16 +411,19 @@ static struct twl4030_platform_data sdp3430_twldata = { .vmmc1 = &sdp3430_vmmc1, .vmmc2 = &sdp3430_vmmc2, .vsim = &sdp3430_vsim, - .vdac = &sdp3430_vdac, - .vpll2 = &sdp3430_vpll2, }; static int __init omap3430_i2c_init(void) { /* i2c1 for PMIC only */ omap3_pmic_get_config(&sdp3430_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | - TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 0); + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | + TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); + sdp3430_twldata.vdac->constraints.apply_uV = true; + sdp3430_twldata.vpll2->constraints.apply_uV = true; + sdp3430_twldata.vpll2->constraints.name = "VDVI"; + omap3_pmic_init("twl4030", &sdp3430_twldata); /* i2c2 on camera connector (for sensor control) and optional isp1301 */ diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index cb00abc4dd5d..35891d49c631 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -343,10 +343,6 @@ static struct regulator_consumer_supply cm_t35_vsim_supply[] = { REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), }; -static struct regulator_consumer_supply cm_t35_vdac_supply[] = { - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -}; - static struct regulator_consumer_supply cm_t35_vdvi_supply[] = { REGULATOR_SUPPLY("vdvi", "omapdss"), }; @@ -381,35 +377,6 @@ static struct regulator_init_data cm_t35_vsim = { .consumer_supplies = cm_t35_vsim_supply, }; -/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ -static struct regulator_init_data cm_t35_vdac = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdac_supply), - .consumer_supplies = cm_t35_vdac_supply, -}; - -/* VPLL2 for digital video outputs */ -static struct regulator_init_data cm_t35_vpll2 = { - .constraints = { - .name = "VDVI", - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdvi_supply), - .consumer_supplies = cm_t35_vdvi_supply, -}; - static uint32_t cm_t35_keymap[] = { KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN), @@ -493,13 +460,18 @@ static struct twl4030_platform_data cm_t35_twldata = { .gpio = &cm_t35_gpio_data, .vmmc1 = &cm_t35_vmmc1, .vsim = &cm_t35_vsim, - .vdac = &cm_t35_vdac, - .vpll2 = &cm_t35_vpll2, }; static void __init cm_t35_init_i2c(void) { - omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, 0); + omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); + + cm_t35_twldata.vpll2->constraints.name = "VDVI"; + cm_t35_twldata.vpll2->num_consumer_supplies = + ARRAY_SIZE(cm_t35_vdvi_supply); + cm_t35_twldata.vpll2->consumer_supplies = cm_t35_vdvi_supply; + omap3_pmic_init("tps65930", &cm_t35_twldata); } diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 364942ed36cc..b6002ec31c6a 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -186,10 +186,6 @@ static struct omap_dss_board_info devkit8000_dss_data = { .default_device = &devkit8000_lcd_device, }; -static struct regulator_consumer_supply devkit8000_vdda_dac_supply[] = { - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -}; - static uint32_t board_keymap[] = { KEY(0, 0, KEY_1), KEY(1, 0, KEY_2), @@ -289,20 +285,6 @@ static struct regulator_init_data devkit8000_vmmc1 = { .consumer_supplies = devkit8000_vmmc1_supply, }; -/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ -static struct regulator_init_data devkit8000_vdac = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(devkit8000_vdda_dac_supply), - .consumer_supplies = devkit8000_vdda_dac_supply, -}; - /* VPLL1 for digital video outputs */ static struct regulator_init_data devkit8000_vpll1 = { .constraints = { @@ -336,7 +318,6 @@ static struct twl4030_platform_data devkit8000_twldata = { /* platform_data for children goes here */ .gpio = &devkit8000_gpio_data, .vmmc1 = &devkit8000_vmmc1, - .vdac = &devkit8000_vdac, .vpll1 = &devkit8000_vpll1, .vio = &devkit8000_vio, .keypad = &devkit8000_kp_data, @@ -345,7 +326,8 @@ static struct twl4030_platform_data devkit8000_twldata = { static int __init devkit8000_i2c_init(void) { omap3_pmic_get_config(&devkit8000_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, + TWL_COMMON_REGULATOR_VDAC); omap3_pmic_init("tps65930", &devkit8000_twldata); /* Bus 3 is attached to the DVI port where devices like the pico DLP * projector don't work reliably with 400kHz */ diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index e0a66878112b..35be778caf1b 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c @@ -479,26 +479,6 @@ static struct omap_dss_board_info igep2_dss_data = { .default_device = &igep2_dvi_device, }; -static struct regulator_consumer_supply igep2_vpll2_supplies[] = { - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), -}; - -static struct regulator_init_data igep2_vpll2 = { - .constraints = { - .name = "VDVI", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(igep2_vpll2_supplies), - .consumer_supplies = igep2_vpll2_supplies, -}; - static void __init igep2_display_init(void) { int err = gpio_request_one(IGEP2_GPIO_DVI_PUP, GPIOF_OUT_INIT_HIGH, @@ -579,9 +559,11 @@ static void __init igep_i2c_init(void) pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret); igep_twldata.keypad = &igep2_keypad_pdata; - igep_twldata.vpll2 = &igep2_vpll2; - /* Use common codec data */ - omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO, 0); + /* Get common pmic data */ + omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO, + TWL_COMMON_REGULATOR_VPLL2); + igep_twldata.vpll2->constraints.apply_uV = true; + igep_twldata.vpll2->constraints.name = "VDVI"; } omap3_pmic_init("twl4030", &igep_twldata); diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index ec61e9c460b2..34f841112768 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -209,15 +209,6 @@ static struct omap_dss_board_info beagle_dss_data = { .default_device = &beagle_dvi_device, }; -static struct regulator_consumer_supply beagle_vdac_supply[] = { - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -}; - -static struct regulator_consumer_supply beagle_vdvi_supplies[] = { - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), -}; - static void __init beagle_display_init(void) { int r; @@ -351,42 +342,11 @@ static struct regulator_init_data beagle_vsim = { .consumer_supplies = beagle_vsim_supply, }; -/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ -static struct regulator_init_data beagle_vdac = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(beagle_vdac_supply), - .consumer_supplies = beagle_vdac_supply, -}; - -/* VPLL2 for digital video outputs */ -static struct regulator_init_data beagle_vpll2 = { - .constraints = { - .name = "VDVI", - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(beagle_vdvi_supplies), - .consumer_supplies = beagle_vdvi_supplies, -}; - static struct twl4030_platform_data beagle_twldata = { /* platform_data for children goes here */ .gpio = &beagle_gpio_data, .vmmc1 = &beagle_vmmc1, .vsim = &beagle_vsim, - .vdac = &beagle_vdac, - .vpll2 = &beagle_vpll2, }; static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { @@ -398,7 +358,11 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { static int __init omap3_beagle_i2c_init(void) { omap3_pmic_get_config(&beagle_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); + + beagle_twldata.vpll2->constraints.name = "VDVI"; + omap3_pmic_init("twl4030", &beagle_twldata); /* Bus 3 is attached to the DVI port where devices like the pico DLP * projector don't work reliably with 400kHz */ diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 1ca298a17623..c452b3f3331a 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -430,45 +430,6 @@ static struct twl4030_keypad_data omap3evm_kp_data = { .rep = 1, }; -static struct regulator_consumer_supply omap3_evm_vdda_dac_supply[] = { - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -}; - -/* VDAC for DSS driving S-Video */ -static struct regulator_init_data omap3_evm_vdac = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(omap3_evm_vdda_dac_supply), - .consumer_supplies = omap3_evm_vdda_dac_supply, -}; - -/* VPLL2 for digital video outputs */ -static struct regulator_consumer_supply omap3_evm_vpll2_supplies[] = { - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), -}; - -static struct regulator_init_data omap3_evm_vpll2 = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(omap3_evm_vpll2_supplies), - .consumer_supplies = omap3_evm_vpll2_supplies, -}; - /* ads7846 on SPI */ static struct regulator_consumer_supply omap3evm_vio_supply[] = { REGULATOR_SUPPLY("vcc", "spi1.0"), @@ -535,8 +496,6 @@ static struct twl4030_platform_data omap3evm_twldata = { /* platform_data for children goes here */ .keypad = &omap3evm_kp_data, .gpio = &omap3evm_gpio_data, - .vdac = &omap3_evm_vdac, - .vpll2 = &omap3_evm_vpll2, .vio = &omap3evm_vio, .vmmc1 = &omap3evm_vmmc1, .vsim = &omap3evm_vsim, @@ -545,8 +504,13 @@ static struct twl4030_platform_data omap3evm_twldata = { static int __init omap3_evm_i2c_init(void) { omap3_pmic_get_config(&omap3evm_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | - TWL_COMMON_PDATA_AUDIO, 0); + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | + TWL_COMMON_PDATA_AUDIO, + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); + + omap3evm_twldata.vdac->constraints.apply_uV = true; + omap3evm_twldata.vpll2->constraints.apply_uV = true; + omap3_pmic_init("twl4030", &omap3evm_twldata); omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(3, 400, NULL, 0); diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index f5abf766db4f..080d7bd6795e 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -332,10 +332,6 @@ static struct regulator_consumer_supply pandora_vmmc3_supply[] = { REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"), }; -static struct regulator_consumer_supply pandora_vdda_dac_supply[] = { - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -}; - static struct regulator_consumer_supply pandora_vdds_supplies[] = { REGULATOR_SUPPLY("vdds_sdi", "omapdss"), REGULATOR_SUPPLY("vdds_dsi", "omapdss"), @@ -391,36 +387,6 @@ static struct regulator_init_data pandora_vmmc2 = { .consumer_supplies = pandora_vmmc2_supply, }; -/* VDAC for DSS driving S-Video */ -static struct regulator_init_data pandora_vdac = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(pandora_vdda_dac_supply), - .consumer_supplies = pandora_vdda_dac_supply, -}; - -/* VPLL2 for digital video outputs */ -static struct regulator_init_data pandora_vpll2 = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(pandora_vdds_supplies), - .consumer_supplies = pandora_vdds_supplies, -}; - /* VAUX1 for LCD */ static struct regulator_init_data pandora_vaux1 = { .constraints = { @@ -514,8 +480,6 @@ static struct twl4030_platform_data omap3pandora_twldata = { .gpio = &omap3pandora_gpio_data, .vmmc1 = &pandora_vmmc1, .vmmc2 = &pandora_vmmc2, - .vdac = &pandora_vdac, - .vpll2 = &pandora_vpll2, .vaux1 = &pandora_vaux1, .vaux2 = &pandora_vaux2, .vaux4 = &pandora_vaux4, @@ -534,7 +498,16 @@ static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = { static int __init omap3pandora_i2c_init(void) { omap3_pmic_get_config(&omap3pandora_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); + + omap3pandora_twldata.vdac->constraints.apply_uV = true; + + omap3pandora_twldata.vpll2->constraints.apply_uV = true; + omap3pandora_twldata.vpll2->num_consumer_supplies = + ARRAY_SIZE(pandora_vdds_supplies); + omap3pandora_twldata.vpll2->consumer_supplies = pandora_vdds_supplies; + omap3_pmic_init("tps65950", &omap3pandora_twldata); /* i2c2 pins are not connected */ omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo, diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index 6e59e59c0fbb..8e104980ea26 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -383,52 +383,10 @@ static struct twl4030_keypad_data omap3stalker_kp_data = { .rep = 1, }; -static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply[] = { - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -}; - -/* VDAC for DSS driving S-Video */ -static struct regulator_init_data omap3_stalker_vdac = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(omap3_stalker_vdda_dac_supply), - .consumer_supplies = omap3_stalker_vdda_dac_supply, -}; - -/* VPLL2 for digital video outputs */ -static struct regulator_consumer_supply omap3_stalker_vpll2_supplies[] = { - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), -}; - -static struct regulator_init_data omap3_stalker_vpll2 = { - .constraints = { - .name = "VDVI", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(omap3_stalker_vpll2_supplies), - .consumer_supplies = omap3_stalker_vpll2_supplies, -}; - static struct twl4030_platform_data omap3stalker_twldata = { /* platform_data for children goes here */ .keypad = &omap3stalker_kp_data, .gpio = &omap3stalker_gpio_data, - .vdac = &omap3_stalker_vdac, - .vpll2 = &omap3_stalker_vpll2, .vmmc1 = &omap3stalker_vmmc1, .vsim = &omap3stalker_vsim, }; @@ -451,7 +409,13 @@ static int __init omap3_stalker_i2c_init(void) { omap3_pmic_get_config(&omap3stalker_twldata, TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | - TWL_COMMON_PDATA_AUDIO, 0); + TWL_COMMON_PDATA_AUDIO, + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); + + omap3stalker_twldata.vdac->constraints.apply_uV = true; + omap3stalker_twldata.vpll2->constraints.apply_uV = true; + omap3stalker_twldata.vpll2->constraints.name = "VDVI"; + omap3_pmic_init("twl4030", &omap3stalker_twldata); omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3, diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index 717972c5ce3e..852ea0464057 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -206,42 +206,11 @@ static struct regulator_init_data touchbook_vsim = { .consumer_supplies = touchbook_vsim_supply, }; -/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ -static struct regulator_init_data touchbook_vdac = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(touchbook_vdac_supply), - .consumer_supplies = touchbook_vdac_supply, -}; - -/* VPLL2 for digital video outputs */ -static struct regulator_init_data touchbook_vpll2 = { - .constraints = { - .name = "VDVI", - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(touchbook_vdvi_supply), - .consumer_supplies = touchbook_vdvi_supply, -}; - static struct twl4030_platform_data touchbook_twldata = { /* platform_data for children goes here */ .gpio = &touchbook_gpio_data, .vmmc1 = &touchbook_vmmc1, .vsim = &touchbook_vsim, - .vdac = &touchbook_vdac, - .vpll2 = &touchbook_vpll2, }; static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = { @@ -254,7 +223,18 @@ static int __init omap3_touchbook_i2c_init(void) { /* Standard TouchBook bus */ omap3_pmic_get_config(&touchbook_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); + + touchbook_twldata.vdac->num_consumer_supplies = + ARRAY_SIZE(touchbook_vdac_supply); + touchbook_twldata.vdac->consumer_supplies = touchbook_vdac_supply; + + touchbook_twldata.vpll2->constraints.name = "VDVI"; + touchbook_twldata.vpll2->num_consumer_supplies = + ARRAY_SIZE(touchbook_vdvi_supply); + touchbook_twldata.vpll2->consumer_supplies = touchbook_vdvi_supply; + omap3_pmic_init("twl4030", &touchbook_twldata); /* Additional TouchBook bus */ omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo, diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 776b44412db1..f1f18d03d24c 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -265,15 +265,6 @@ static struct omap_dss_board_info overo_dss_data = { .default_device = &overo_dvi_device, }; -static struct regulator_consumer_supply overo_vdda_dac_supply[] = { - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -}; - -static struct regulator_consumer_supply overo_vdds_dsi_supply[] = { - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), -}; - static struct mtd_partition overo_nand_partitions[] = { { .name = "xloader", @@ -447,46 +438,19 @@ static struct regulator_init_data overo_vmmc1 = { .consumer_supplies = overo_vmmc1_supply, }; -/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ -static struct regulator_init_data overo_vdac = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(overo_vdda_dac_supply), - .consumer_supplies = overo_vdda_dac_supply, -}; - -/* VPLL2 for digital video outputs */ -static struct regulator_init_data overo_vpll2 = { - .constraints = { - .name = "VDVI", - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(overo_vdds_dsi_supply), - .consumer_supplies = overo_vdds_dsi_supply, -}; - static struct twl4030_platform_data overo_twldata = { .gpio = &overo_gpio_data, .vmmc1 = &overo_vmmc1, - .vdac = &overo_vdac, - .vpll2 = &overo_vpll2, }; static int __init overo_i2c_init(void) { omap3_pmic_get_config(&overo_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); + + overo_twldata.vpll2->constraints.name = "VDVI"; + omap3_pmic_init("tps65950", &overo_twldata); /* i2c2 pins are used for gpio */ omap_register_i2c_bus(3, 400, NULL, 0); diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index e0a2804e2b71..6140290721a0 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -394,10 +394,6 @@ static struct regulator_consumer_supply rx51_vaux1_consumers[] = { REGULATOR_SUPPLY("vdd", "2-0063"), }; -static struct regulator_consumer_supply rx51_vdac_supply[] = { - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -}; - static struct regulator_init_data rx51_vaux1 = { .constraints = { .name = "V28", @@ -514,21 +510,6 @@ static struct regulator_init_data rx51_vsim = { .consumer_supplies = rx51_vsim_supply, }; -static struct regulator_init_data rx51_vdac = { - .constraints = { - .name = "VDAC", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(rx51_vdac_supply), - .consumer_supplies = rx51_vdac_supply, -}; - static struct regulator_init_data rx51_vio = { .constraints = { .min_uV = 1800000, @@ -781,7 +762,6 @@ static struct twl4030_platform_data rx51_twldata __initdata = { .vaux4 = &rx51_vaux4, .vmmc1 = &rx51_vmmc1, .vsim = &rx51_vsim, - .vdac = &rx51_vdac, .vio = &rx51_vio, }; @@ -838,7 +818,12 @@ static int __init rx51_i2c_init(void) } rx51_twldata.vmmc2 = &rx51_vmmc2; omap3_pmic_get_config(&rx51_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, 0); + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, + TWL_COMMON_REGULATOR_VDAC); + + rx51_twldata.vdac->constraints.apply_uV = true; + rx51_twldata.vdac->constraints.name = "VDAC"; + omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata); omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c index 6d8df1b40d86..13a644233667 100644 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c @@ -226,41 +226,6 @@ static struct omap2_hsmmc_info mmc[] = { {} /* Terminator */ }; -static struct regulator_consumer_supply zoom_vpll2_supplies[] = { - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), -}; - -static struct regulator_consumer_supply zoom_vdda_dac_supply[] = { - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -}; - -static struct regulator_init_data zoom_vpll2 = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(zoom_vpll2_supplies), - .consumer_supplies = zoom_vpll2_supplies, -}; - -static struct regulator_init_data zoom_vdac = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(zoom_vdda_dac_supply), - .consumer_supplies = zoom_vdda_dac_supply, -}; - static int zoom_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio) { @@ -299,15 +264,14 @@ static struct twl4030_platform_data zoom_twldata = { .vmmc1 = &zoom_vmmc1, .vmmc2 = &zoom_vmmc2, .vsim = &zoom_vsim, - .vpll2 = &zoom_vpll2, - .vdac = &zoom_vdac, }; static int __init omap_i2c_init(void) { omap3_pmic_get_config(&zoom_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | - TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 0); + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | + TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); if (machine_is_omap_zoom2()) { struct twl4030_codec_audio_data *audio_data; diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c index 9e8decf14a22..3aaa46f6cd12 100644 --- a/arch/arm/mach-omap2/twl-common.c +++ b/arch/arm/mach-omap2/twl-common.c @@ -87,6 +87,41 @@ static struct twl4030_codec_data omap3_codec_pdata = { .audio = &omap3_audio, }; +static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = { + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), +}; + +static struct regulator_init_data omap3_vdac_idata = { + .constraints = { + .min_uV = 1800000, + .max_uV = 1800000, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(omap3_vdda_dac_supplies), + .consumer_supplies = omap3_vdda_dac_supplies, +}; + +static struct regulator_consumer_supply omap3_vpll2_supplies[] = { + REGULATOR_SUPPLY("vdds_dsi", "omapdss"), + REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), +}; + +static struct regulator_init_data omap3_vpll2_idata = { + .constraints = { + .min_uV = 1800000, + .max_uV = 1800000, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(omap3_vpll2_supplies), + .consumer_supplies = omap3_vpll2_supplies, +}; + static struct regulator_init_data omap4_vdac_idata = { .constraints = { .min_uV = 1800000, @@ -259,4 +294,11 @@ void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->codec) pmic_data->codec = &omap3_codec_pdata; + + /* Common regulator configurations */ + if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) + pmic_data->vdac = &omap3_vdac_idata; + + if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2) + pmic_data->vpll2 = &omap3_vpll2_idata; } diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h index 3b4b05d529ba..5e83a5bd37fb 100644 --- a/arch/arm/mach-omap2/twl-common.h +++ b/arch/arm/mach-omap2/twl-common.h @@ -21,6 +21,11 @@ #define TWL_COMMON_REGULATOR_VUSB (1 << 9) #define TWL_COMMON_REGULATOR_CLK32KG (1 << 10) +/* TWL4030 LDO regulators */ +#define TWL_COMMON_REGULATOR_VPLL1 (1 << 4) +#define TWL_COMMON_REGULATOR_VPLL2 (1 << 5) + + struct twl4030_platform_data; void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, From 9df0fcc4c842703080ee431112d624b1f8f2f1c8 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Fri, 1 Jul 2011 08:52:26 +0000 Subject: [PATCH 06/56] omap: mcbsp: Remove rx_/tx_word_length variables These variables got unused after ("omap: mcbsp: Drop in-driver transfer support") but was noticed only afterwards. Signed-off-by: Jarkko Nikula Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/mcbsp.h | 2 -- arch/arm/plat-omap/mcbsp.c | 3 --- 2 files changed, 5 deletions(-) diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 6c5350832407..63464ad9c67a 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -385,8 +385,6 @@ struct omap_mcbsp { void __iomem *io_base; u8 id; u8 free; - omap_mcbsp_word_length rx_word_length; - omap_mcbsp_word_length tx_word_length; int rx_irq; int tx_irq; diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 455eadcd820c..3c1fbdc92468 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -869,9 +869,6 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx) if (cpu_is_omap34xx()) omap_st_start(mcbsp); - mcbsp->rx_word_length = (MCBSP_READ_CACHE(mcbsp, RCR1) >> 5) & 0x7; - mcbsp->tx_word_length = (MCBSP_READ_CACHE(mcbsp, XCR1) >> 5) & 0x7; - /* Only enable SRG, if McBSP is master */ w = MCBSP_READ_CACHE(mcbsp, PCR0); if (w & (FSXM | FSRM | CLKXM | CLKRM)) From fd1ee39151f397730a2b23d14fb232c098743f4b Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Fri, 1 Jul 2011 08:52:27 +0000 Subject: [PATCH 07/56] omap: mcbsp: Remove port number enums These McBSP port number enums are used only in two places in the McBSP code so we may remove then and just use numeric values like rest of the code does. Signed-off-by: Jarkko Nikula Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/mcbsp.c | 4 ++-- arch/arm/plat-omap/include/plat/mcbsp.h | 10 +--------- 2 files changed, 3 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index d9af9811dedd..ab7395d84bc8 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -38,7 +38,7 @@ static void omap1_mcbsp_request(unsigned int id) * On 1510, 1610 and 1710, McBSP1 and McBSP3 * are DSP public peripherals. */ - if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { + if (id == 0 || id == 2) { if (dsp_use++ == 0) { api_clk = clk_get(NULL, "api_ck"); dsp_clk = clk_get(NULL, "dsp_ck"); @@ -59,7 +59,7 @@ static void omap1_mcbsp_request(unsigned int id) static void omap1_mcbsp_free(unsigned int id) { - if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { + if (id == 0 || id == 2) { if (--dsp_use == 0) { if (!IS_ERR(api_clk)) { clk_disable(api_clk); diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 63464ad9c67a..9882c657b2d4 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -33,7 +33,7 @@ #define OMAP_MCBSP_PLATFORM_DEVICE(port_nr) \ static struct platform_device omap_mcbsp##port_nr = { \ .name = "omap-mcbsp-dai", \ - .id = OMAP_MCBSP##port_nr, \ + .id = port_nr - 1, \ } #define MCBSP_CONFIG_TYPE2 0x2 @@ -331,14 +331,6 @@ struct omap_mcbsp_reg_cfg { u16 rccr; }; -typedef enum { - OMAP_MCBSP1 = 0, - OMAP_MCBSP2, - OMAP_MCBSP3, - OMAP_MCBSP4, - OMAP_MCBSP5 -} omap_mcbsp_id; - typedef enum { OMAP_MCBSP_WORD_8 = 0, OMAP_MCBSP_WORD_12, From a7cd4b08d9854bcf813fd6906ec3e97073b9bb19 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 18:00:25 -0600 Subject: [PATCH 08/56] OMAP: dmtimer: add missing include After commit caf64f2fdc48472995d40656eb1a75524c464447 ("omap: Make a subset of dmtimer functions into inline functions"), arch/arm/plat-omap/include/plat/dmtimer.h is missing an include of linux/io.h - add it. Signed-off-by: Paul Walmsley Cc: Tony Lindgren --- arch/arm/plat-omap/include/plat/dmtimer.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index d0f3a2d22fd3..eb5d16c60cd9 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -34,6 +34,7 @@ #include #include +#include #ifndef __ASM_ARCH_DMTIMER_H #define __ASM_ARCH_DMTIMER_H From 724019b0137acf2ea43e5ca854798851f5ebf51f Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:00 +0200 Subject: [PATCH 09/56] OMAP2+: hwmod: Fix smart-standby + wakeup support The commit 86009eb326afde34ffdc5648cd344aa86b8d58d4 was adding the wakeup support for new OMAP4 IPs. This support is incomplete for busmaster IPs that need as well to use smart-standby with wakeup. This new standbymode is suported on HSI and USB_HOST_FS for the moment. Add the new MSTANDBY_SMART_WKUP flag to mark the IPs that support this capability. Enable this new mode when applicable in _enable_wakeup, _disable_wakeup, _enable_sysc and _idle_sysc. The omap_hwmod_44xx_data.c will have to be updated to add this new flag. Signed-off-by: Benoit Cousson Signed-off-by: Djamil Elaidi Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 34 ++++++++++++++++---- arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 +- 2 files changed, 29 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 293fa6cd50e1..384d3c3ec36d 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -391,7 +391,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) if (!oh->class->sysc || !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || - (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP))) + (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || + (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) return -EINVAL; if (!oh->class->sysc->sysc_fields) { @@ -405,6 +406,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); + if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) + _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); /* XXX test pwrdm_get_wken for this hwmod's subsystem */ @@ -426,7 +429,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) if (!oh->class->sysc || !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || - (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP))) + (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || + (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) return -EINVAL; if (!oh->class->sysc->sysc_fields) { @@ -440,6 +444,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); + if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) + _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); /* XXX test pwrdm_get_wken for this hwmod's subsystem */ @@ -781,8 +787,16 @@ static void _enable_sysc(struct omap_hwmod *oh) } if (sf & SYSC_HAS_MIDLEMODE) { - idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? - HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; + if (oh->flags & HWMOD_SWSUP_MSTANDBY) { + idlemode = HWMOD_IDLEMODE_NO; + } else { + if (sf & SYSC_HAS_ENAWAKEUP) + _enable_wakeup(oh, &v); + if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) + idlemode = HWMOD_IDLEMODE_SMART_WKUP; + else + idlemode = HWMOD_IDLEMODE_SMART; + } _set_master_standbymode(oh, idlemode, &v); } @@ -840,8 +854,16 @@ static void _idle_sysc(struct omap_hwmod *oh) } if (sf & SYSC_HAS_MIDLEMODE) { - idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? - HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; + if (oh->flags & HWMOD_SWSUP_MSTANDBY) { + idlemode = HWMOD_IDLEMODE_FORCE; + } else { + if (sf & SYSC_HAS_ENAWAKEUP) + _enable_wakeup(oh, &v); + if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) + idlemode = HWMOD_IDLEMODE_SMART_WKUP; + else + idlemode = HWMOD_IDLEMODE_SMART; + } _set_master_standbymode(oh, idlemode, &v); } diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 1adea9c62984..e93438c4bdac 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -77,7 +77,6 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2; #define HWMOD_IDLEMODE_FORCE (1 << 0) #define HWMOD_IDLEMODE_NO (1 << 1) #define HWMOD_IDLEMODE_SMART (1 << 2) -/* Slave idle mode flag only */ #define HWMOD_IDLEMODE_SMART_WKUP (1 << 3) /** @@ -258,6 +257,7 @@ struct omap_hwmod_ocp_if { #define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT) #define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT) #define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT) +#define MSTANDBY_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << MASTER_STANDBY_SHIFT) /* omap_hwmod_sysconfig.sysc_flags capability flags */ #define SYSC_HAS_AUTOIDLE (1 << 0) From c614ebf6f73de8e6d0481c4b3b962b649166fee9 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:01 +0200 Subject: [PATCH 10/56] OMAP4: hwmod data: Add MSTANDBY_SMART_WKUP flag Add the flag to every IPs that support it to allow the framework to enable it instead of the SMART_STANDBY default mode. Without that, an IP with busmaster capability will not be able to wakeup the interconnect at all. Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index e1c69ffe0f69..8cbbfbf29076 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -660,7 +660,8 @@ static struct omap_hwmod_class_sysconfig omap44xx_aess_sysc = { .sysc_offs = 0x0010, .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART | + MSTANDBY_SMART_WKUP), .sysc_fields = &omap_hwmod_sysc_type2, }; @@ -2044,7 +2045,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_hsi_sysc = { SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | - MSTANDBY_SMART), + MSTANDBY_SMART | MSTANDBY_SMART_WKUP), .sysc_fields = &omap_hwmod_sysc_type1, }; @@ -2446,7 +2447,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = { SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | - MSTANDBY_SMART), + MSTANDBY_SMART | MSTANDBY_SMART_WKUP), .sysc_fields = &omap_hwmod_sysc_type2, }; @@ -3420,7 +3421,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_mmc_sysc = { SYSC_HAS_SOFTRESET), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | - MSTANDBY_SMART), + MSTANDBY_SMART | MSTANDBY_SMART_WKUP), .sysc_fields = &omap_hwmod_sysc_type2, }; From 6481c73c22613660a5b791d2b4d0faf60508d731 Mon Sep 17 00:00:00 2001 From: Miguel Vadillo Date: Fri, 1 Jul 2011 22:54:02 +0200 Subject: [PATCH 11/56] OMAP2+: hwmod: Enable module in shutdown to access sysconfig When calling the shutdown, the module may be already in idle. Accessing the sysconfig register will then lead to a crash. In that case, re-enable the module in order to allow the access to the sysconfig register. Signed-off-by: Miguel Vadillo Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 384d3c3ec36d..cbc2a8a4ce39 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1396,8 +1396,11 @@ static int _shutdown(struct omap_hwmod *oh) } } - if (oh->class->sysc) + if (oh->class->sysc) { + if (oh->_state == _HWMOD_STATE_IDLE) + _enable(oh); _shutdown_sysc(oh); + } /* * If an IP contains only one HW reset line, then assert it From 1fe741139be5acfe3758b53cdbf0b5e3d26db3fe Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:03 +0200 Subject: [PATCH 12/56] OMAP2+: hwmod: Do not write the enawakeup bit if SYSC_HAS_ENAWAKEUP is not set The Type 2 type of IPs will not have any enawakeup bit in their sysconfig. Writing to that bit will instead trigger a softreset. Check the flag to write this bit only if the module supports it. Reported-by: Miguel Vadillo Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index cbc2a8a4ce39..3800084a1e7a 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -387,8 +387,6 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, */ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) { - u32 wakeup_mask; - if (!oh->class->sysc || !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || @@ -400,9 +398,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) return -EINVAL; } - wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); - - *v |= wakeup_mask; + if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) + *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift; if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); @@ -425,8 +422,6 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) */ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) { - u32 wakeup_mask; - if (!oh->class->sysc || !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || @@ -438,9 +433,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) return -EINVAL; } - wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); - - *v &= ~wakeup_mask; + if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) + *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift); if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); From d24bcaa3fa711f7dd9c4aacf3c58083cf666418f Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:04 +0200 Subject: [PATCH 13/56] OMAP2+: hwmod: Remove _populate_mpu_rt_base warning It is perfectly valid for some hwmod to not have any register target address for sysconfig. This is especially true for interconnect hwmods. Remove the warning. Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 3800084a1e7a..f4014179d601 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1704,9 +1704,6 @@ static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data) return 0; oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index); - if (!oh->_mpu_rt_va) - pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n", - __func__, oh->name); return 0; } From 31f62866c578b3d47ef7810b336e9e193b90167f Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:05 +0200 Subject: [PATCH 14/56] OMAP2+: hwmod: Fix the HW reset management The HW reset must be de-assert after the clocks are enabled but before waiting for the target to be ready. Otherwise the reset might not work properly since the clock is not running to proceed the reset. De-assert the reset after _enable_clocks and before _wait_target_ready. Re-assert it only when the clocks are disabled. Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index f4014179d601..df91bb1dc972 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1250,15 +1250,6 @@ static int _enable(struct omap_hwmod *oh) pr_debug("omap_hwmod: %s: enabling\n", oh->name); - /* - * If an IP contains only one HW reset line, then de-assert it in order - * to allow to enable the clocks. Otherwise the PRCM will return - * Intransition status, and the init will failed. - */ - if ((oh->_state == _HWMOD_STATE_INITIALIZED || - oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1) - _deassert_hardreset(oh, oh->rst_lines[0].name); - /* Mux pins for device runtime if populated */ if (oh->mux && (!oh->mux->enabled || ((oh->_state == _HWMOD_STATE_IDLE) && @@ -1268,6 +1259,15 @@ static int _enable(struct omap_hwmod *oh) _add_initiator_dep(oh, mpu_oh); _enable_clocks(oh); + /* + * If an IP contains only one HW reset line, then de-assert it in order + * to allow the module state transition. Otherwise the PRCM will return + * Intransition status, and the init will failed. + */ + if ((oh->_state == _HWMOD_STATE_INITIALIZED || + oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1) + _deassert_hardreset(oh, oh->rst_lines[0].name); + r = _wait_target_ready(oh); if (!r) { oh->_state = _HWMOD_STATE_ENABLED; @@ -1396,13 +1396,6 @@ static int _shutdown(struct omap_hwmod *oh) _shutdown_sysc(oh); } - /* - * If an IP contains only one HW reset line, then assert it - * before disabling the clocks and shutting down the IP. - */ - if (oh->rst_lines_cnt == 1) - _assert_hardreset(oh, oh->rst_lines[0].name); - /* clocks and deps are already disabled in idle */ if (oh->_state == _HWMOD_STATE_ENABLED) { _del_initiator_dep(oh, mpu_oh); @@ -1411,6 +1404,13 @@ static int _shutdown(struct omap_hwmod *oh) } /* XXX Should this code also force-disable the optional clocks? */ + /* + * If an IP contains only one HW reset line, then assert it + * after disabling the clocks and before shutting down the IP. + */ + if (oh->rst_lines_cnt == 1) + _assert_hardreset(oh, oh->rst_lines[0].name); + /* Mux pins to safe mode or use populated off mode values */ if (oh->mux) omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED); From 6652271a2556c086c04658dce16de2947e849ffd Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:06 +0200 Subject: [PATCH 15/56] OMAP: hwmod: Add warnings if enable failed Change the debug into warning to check what IPs are failing. Signed-off-by: Benoit Cousson Cc: Rajendra Nayak Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index df91bb1dc972..64e983046217 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -944,6 +944,8 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) if (!ret) oh->_state = _HWMOD_STATE_CLKS_INITED; + else + pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name); return ret; } From 34617e2a4d331fdd8172077d8c70a0421fc136e6 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:07 +0200 Subject: [PATCH 16/56] OMAP: hwmod: Move pr_debug to improve the readability Move the pr_debug at the top of the function to trace the entry even if the first test is failing. That help understanding that we entered the function but failed in it. Move the _enable last part out of the test to reduce indentation and improve readability. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 32 +++++++++++++++++--------------- 1 file changed, 17 insertions(+), 15 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 64e983046217..e530bcbdebf4 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1242,6 +1242,8 @@ static int _enable(struct omap_hwmod *oh) { int r; + pr_debug("omap_hwmod: %s: enabling\n", oh->name); + if (oh->_state != _HWMOD_STATE_INITIALIZED && oh->_state != _HWMOD_STATE_IDLE && oh->_state != _HWMOD_STATE_DISABLED) { @@ -1250,8 +1252,6 @@ static int _enable(struct omap_hwmod *oh) return -EINVAL; } - pr_debug("omap_hwmod: %s: enabling\n", oh->name); - /* Mux pins for device runtime if populated */ if (oh->mux && (!oh->mux->enabled || ((oh->_state == _HWMOD_STATE_IDLE) && @@ -1271,19 +1271,21 @@ static int _enable(struct omap_hwmod *oh) _deassert_hardreset(oh, oh->rst_lines[0].name); r = _wait_target_ready(oh); - if (!r) { - oh->_state = _HWMOD_STATE_ENABLED; - - /* Access the sysconfig only if the target is ready */ - if (oh->class->sysc) { - if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) - _update_sysc_cache(oh); - _enable_sysc(oh); - } - } else { - _disable_clocks(oh); + if (r) { pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", oh->name, r); + _disable_clocks(oh); + + return r; + } + + oh->_state = _HWMOD_STATE_ENABLED; + + /* Access the sysconfig only if the target is ready */ + if (oh->class->sysc) { + if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) + _update_sysc_cache(oh); + _enable_sysc(oh); } return r; @@ -1299,14 +1301,14 @@ static int _enable(struct omap_hwmod *oh) */ static int _idle(struct omap_hwmod *oh) { + pr_debug("omap_hwmod: %s: idling\n", oh->name); + if (oh->_state != _HWMOD_STATE_ENABLED) { WARN(1, "omap_hwmod: %s: idle state can only be entered from " "enabled state\n", oh->name); return -EINVAL; } - pr_debug("omap_hwmod: %s: idling\n", oh->name); - if (oh->class->sysc) _idle_sysc(oh); _del_initiator_dep(oh, mpu_oh); From 78183f3fdf76f422431a81852468be01b36db325 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:05 -0600 Subject: [PATCH 17/56] omap_hwmod: use a null structure record to terminate omap_hwmod_addr_space arrays Previously, struct omap_hwmod_addr_space arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_addr_space arrays and uses a null structure member as the array terminator instead. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 45 ++++- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 66 +++---- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 83 +++++---- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 108 ++++++------ arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 170 +++++++++---------- arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 - 6 files changed, 249 insertions(+), 225 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 293fa6cd50e1..77094d75367f 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -2,6 +2,7 @@ * omap_hwmod implementation for OMAP2/3/4 * * Copyright (C) 2009-2011 Nokia Corporation + * Copyright (C) 2011 Texas Instruments, Inc. * * Paul Walmsley, Benoît Cousson, Kevin Hilman * @@ -677,6 +678,29 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) } } +/** + * _count_ocp_if_addr_spaces - count the number of address space entries for @oh + * @oh: struct omap_hwmod *oh + * + * Count and return the number of address space ranges associated with + * the hwmod @oh. Used to allocate struct resource data. Returns 0 + * if @oh is NULL. + */ +static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os) +{ + struct omap_hwmod_addr_space *mem; + int i = 0; + + if (!os || !os->addr) + return 0; + + do { + mem = &os->addr[i++]; + } while (mem->pa_start != mem->pa_end); + + return i; +} + /** * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use * @oh: struct omap_hwmod * @@ -722,8 +746,7 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index) { struct omap_hwmod_ocp_if *os; struct omap_hwmod_addr_space *mem; - int i; - int found = 0; + int i = 0, found = 0; void __iomem *va_start; if (!oh || oh->slaves_cnt == 0) @@ -731,12 +754,14 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index) os = oh->slaves[index]; - for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) { - if (mem->flags & ADDR_TYPE_RT) { + if (!os->addr) + return NULL; + + do { + mem = &os->addr[i++]; + if (mem->flags & ADDR_TYPE_RT) found = 1; - break; - } - } + } while (!found && mem->pa_start != mem->pa_end); if (found) { va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); @@ -1942,7 +1967,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt; for (i = 0; i < oh->slaves_cnt; i++) - ret += oh->slaves[i]->addr_cnt; + ret += _count_ocp_if_addr_spaces(oh->slaves[i]); return ret; } @@ -1982,10 +2007,12 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) for (i = 0; i < oh->slaves_cnt; i++) { struct omap_hwmod_ocp_if *os; + int addr_cnt; os = oh->slaves[i]; + addr_cnt = _count_ocp_if_addr_spaces(os); - for (j = 0; j < os->addr_cnt; j++) { + for (j = 0; j < addr_cnt; j++) { (res + r)->name = (os->addr + j)->name; (res + r)->start = (os->addr + j)->pa_start; (res + r)->end = (os->addr + j)->pa_end; diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index c4d0ae87d62a..1a7ce3ec0c0b 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -1,7 +1,7 @@ /* * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips * - * Copyright (C) 2009-2010 Nokia Corporation + * Copyright (C) 2009-2011 Nokia Corporation * Paul Walmsley * * This program is free software; you can redistribute it and/or modify @@ -120,6 +120,7 @@ static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = { .pa_end = 0x480980ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { @@ -127,7 +128,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { .slave = &omap2420_mcspi1_hwmod, .clk = "mcspi1_ick", .addr = omap2420_mcspi1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_mcspi1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -138,6 +138,7 @@ static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = { .pa_end = 0x4809a0ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { @@ -145,7 +146,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { .slave = &omap2420_mcspi2_hwmod, .clk = "mcspi2_ick", .addr = omap2420_mcspi2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_mcspi2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -163,6 +163,7 @@ static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = { .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { @@ -170,7 +171,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { .slave = &omap2420_uart1_hwmod, .clk = "uart1_ick", .addr = omap2420_uart1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_uart1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -181,6 +181,7 @@ static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = { .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { @@ -188,7 +189,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { .slave = &omap2420_uart2_hwmod, .clk = "uart2_ick", .addr = omap2420_uart2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_uart2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -199,6 +199,7 @@ static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = { .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { @@ -206,7 +207,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { .slave = &omap2420_uart3_hwmod, .clk = "uart3_ick", .addr = omap2420_uart3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_uart3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -220,6 +220,7 @@ static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = { .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { @@ -227,7 +228,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { .slave = &omap2420_i2c1_hwmod, .clk = "i2c1_ick", .addr = omap2420_i2c1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_i2c1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -238,6 +238,7 @@ static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = { .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { @@ -245,7 +246,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { .slave = &omap2420_i2c2_hwmod, .clk = "i2c2_ick", .addr = omap2420_i2c2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_i2c2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -370,6 +370,7 @@ static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { .pa_end = 0x48028000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> timer1 */ @@ -378,7 +379,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = { .slave = &omap2420_timer1_hwmod, .clk = "gpt1_ick", .addr = omap2420_timer1_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -420,6 +420,7 @@ static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = { .pa_end = 0x4802a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer2 */ @@ -428,7 +429,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { .slave = &omap2420_timer2_hwmod, .clk = "gpt2_ick", .addr = omap2420_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -470,6 +470,7 @@ static struct omap_hwmod_addr_space omap2420_timer3_addrs[] = { .pa_end = 0x48078000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer3 */ @@ -478,7 +479,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { .slave = &omap2420_timer3_hwmod, .clk = "gpt3_ick", .addr = omap2420_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -520,6 +520,7 @@ static struct omap_hwmod_addr_space omap2420_timer4_addrs[] = { .pa_end = 0x4807a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer4 */ @@ -528,7 +529,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { .slave = &omap2420_timer4_hwmod, .clk = "gpt4_ick", .addr = omap2420_timer4_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -570,6 +570,7 @@ static struct omap_hwmod_addr_space omap2420_timer5_addrs[] = { .pa_end = 0x4807c000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer5 */ @@ -578,7 +579,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { .slave = &omap2420_timer5_hwmod, .clk = "gpt5_ick", .addr = omap2420_timer5_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -621,6 +621,7 @@ static struct omap_hwmod_addr_space omap2420_timer6_addrs[] = { .pa_end = 0x4807e000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer6 */ @@ -629,7 +630,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { .slave = &omap2420_timer6_hwmod, .clk = "gpt6_ick", .addr = omap2420_timer6_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer6_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -671,6 +671,7 @@ static struct omap_hwmod_addr_space omap2420_timer7_addrs[] = { .pa_end = 0x48080000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer7 */ @@ -679,7 +680,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { .slave = &omap2420_timer7_hwmod, .clk = "gpt7_ick", .addr = omap2420_timer7_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer7_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -721,6 +721,7 @@ static struct omap_hwmod_addr_space omap2420_timer8_addrs[] = { .pa_end = 0x48082000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer8 */ @@ -729,7 +730,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { .slave = &omap2420_timer8_hwmod, .clk = "gpt8_ick", .addr = omap2420_timer8_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer8_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -771,6 +771,7 @@ static struct omap_hwmod_addr_space omap2420_timer9_addrs[] = { .pa_end = 0x48084000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer9 */ @@ -779,7 +780,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { .slave = &omap2420_timer9_hwmod, .clk = "gpt9_ick", .addr = omap2420_timer9_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer9_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -821,6 +821,7 @@ static struct omap_hwmod_addr_space omap2420_timer10_addrs[] = { .pa_end = 0x48086000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer10 */ @@ -829,7 +830,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { .slave = &omap2420_timer10_hwmod, .clk = "gpt10_ick", .addr = omap2420_timer10_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer10_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -871,6 +871,7 @@ static struct omap_hwmod_addr_space omap2420_timer11_addrs[] = { .pa_end = 0x48088000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer11 */ @@ -879,7 +880,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { .slave = &omap2420_timer11_hwmod, .clk = "gpt11_ick", .addr = omap2420_timer11_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer11_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -921,6 +921,7 @@ static struct omap_hwmod_addr_space omap2420_timer12_addrs[] = { .pa_end = 0x4808a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer12 */ @@ -929,7 +930,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { .slave = &omap2420_timer12_hwmod, .clk = "gpt12_ick", .addr = omap2420_timer12_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer12_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -966,6 +966,7 @@ static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = { .pa_end = 0x4802207f, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { @@ -973,7 +974,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { .slave = &omap2420_wd_timer2_hwmod, .clk = "mpu_wdt_ick", .addr = omap2420_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1184,6 +1184,7 @@ static struct omap_hwmod_addr_space omap2420_dss_addrs[] = { .pa_end = 0x480503FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss */ @@ -1192,7 +1193,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss = { .slave = &omap2420_dss_core_hwmod, .clk = "dss_ick", .addr = omap2420_dss_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dss_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, @@ -1268,6 +1268,7 @@ static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = { .pa_end = 0x480507FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_dispc */ @@ -1276,7 +1277,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { .slave = &omap2420_dss_dispc_hwmod, .clk = "dss_ick", .addr = omap2420_dss_dispc_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dss_dispc_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, @@ -1338,6 +1338,7 @@ static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = { .pa_end = 0x48050BFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_rfbi */ @@ -1346,7 +1347,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { .slave = &omap2420_dss_rfbi_hwmod, .clk = "dss_ick", .addr = omap2420_dss_rfbi_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dss_rfbi_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, @@ -1394,6 +1394,7 @@ static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = { .pa_end = 0x48050FFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_venc */ @@ -1402,7 +1403,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { .slave = &omap2420_dss_venc_hwmod, .clk = "dss_54m_fck", .addr = omap2420_dss_venc_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dss_venc_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION, @@ -1536,6 +1536,7 @@ static struct omap_hwmod_addr_space omap2420_gpio1_addr_space[] = { .pa_end = 0x480181ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = { @@ -1543,7 +1544,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = { .slave = &omap2420_gpio1_hwmod, .clk = "gpios_ick", .addr = omap2420_gpio1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_gpio1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1554,6 +1554,7 @@ static struct omap_hwmod_addr_space omap2420_gpio2_addr_space[] = { .pa_end = 0x4801a1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = { @@ -1561,7 +1562,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = { .slave = &omap2420_gpio2_hwmod, .clk = "gpios_ick", .addr = omap2420_gpio2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_gpio2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1572,6 +1572,7 @@ static struct omap_hwmod_addr_space omap2420_gpio3_addr_space[] = { .pa_end = 0x4801c1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = { @@ -1579,7 +1580,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = { .slave = &omap2420_gpio3_hwmod, .clk = "gpios_ick", .addr = omap2420_gpio3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_gpio3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1590,6 +1590,7 @@ static struct omap_hwmod_addr_space omap2420_gpio4_addr_space[] = { .pa_end = 0x4801e1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = { @@ -1597,7 +1598,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = { .slave = &omap2420_gpio4_hwmod, .clk = "gpios_ick", .addr = omap2420_gpio4_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_gpio4_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1789,6 +1789,7 @@ static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = { .pa_end = 0x48056fff, .flags = ADDR_TYPE_RT }, + { } }; /* dma_system -> L3 */ @@ -1810,7 +1811,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = { .slave = &omap2420_dma_system_hwmod, .clk = "sdma_ick", .addr = omap2420_dma_system_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dma_system_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1868,6 +1868,7 @@ static struct omap_hwmod_addr_space omap2420_mailbox_addrs[] = { .pa_end = 0x480941ff, .flags = ADDR_TYPE_RT, }, + { } }; /* l4_core -> mailbox */ @@ -1875,7 +1876,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mailbox_hwmod, .addr = omap2420_mailbox_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_mailbox_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2044,6 +2044,7 @@ static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = { .pa_end = 0x480740ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp1 */ @@ -2052,7 +2053,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { .slave = &omap2420_mcbsp1_hwmod, .clk = "mcbsp1_ick", .addr = omap2420_mcbsp1_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_mcbsp1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2101,6 +2101,7 @@ static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = { .pa_end = 0x480760ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp2 */ @@ -2109,7 +2110,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { .slave = &omap2420_mcbsp2_hwmod, .clk = "mcbsp2_ick", .addr = omap2420_mcbsp2_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_mcbsp2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 9682dd519f8d..da287947cc18 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -1,7 +1,7 @@ /* * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips * - * Copyright (C) 2009-2010 Nokia Corporation + * Copyright (C) 2009-2011 Nokia Corporation * Paul Walmsley * * This program is free software; you can redistribute it and/or modify @@ -141,6 +141,7 @@ static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = { .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { @@ -148,7 +149,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { .slave = &omap2430_i2c1_hwmod, .clk = "i2c1_ick", .addr = omap2430_i2c1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_i2c1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -159,6 +159,7 @@ static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = { .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { @@ -166,7 +167,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { .slave = &omap2430_i2c2_hwmod, .clk = "i2c2_ick", .addr = omap2430_i2c2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_i2c2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -184,6 +184,7 @@ static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = { .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { @@ -191,7 +192,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { .slave = &omap2430_uart1_hwmod, .clk = "uart1_ick", .addr = omap2430_uart1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_uart1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -202,6 +202,7 @@ static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = { .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { @@ -209,7 +210,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { .slave = &omap2430_uart2_hwmod, .clk = "uart2_ick", .addr = omap2430_uart2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_uart2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -220,6 +220,7 @@ static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = { .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { @@ -227,7 +228,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { .slave = &omap2430_uart3_hwmod, .clk = "uart3_ick", .addr = omap2430_uart3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_uart3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -248,7 +248,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = { .slave = &omap2430_usbhsotg_hwmod, .clk = "usb_l4_ick", .addr = omap2430_usbhsotg_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_usbhsotg_addrs), .user = OCP_USER_MPU, }; @@ -267,6 +266,7 @@ static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { .pa_end = 0x4809c1ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { @@ -274,7 +274,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { .slave = &omap2430_mmc1_hwmod, .clk = "mmchs1_ick", .addr = omap2430_mmc1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_mmc1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -285,14 +284,14 @@ static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { .pa_end = 0x480b41ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mmc2_hwmod, - .addr = omap2430_mmc2_addr_space, .clk = "mmchs2_ick", - .addr_cnt = ARRAY_SIZE(omap2430_mmc2_addr_space), + .addr = omap2430_mmc2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -339,6 +338,7 @@ static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = { .pa_end = 0x480980ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { @@ -346,7 +346,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { .slave = &omap2430_mcspi1_hwmod, .clk = "mcspi1_ick", .addr = omap2430_mcspi1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_mcspi1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -357,6 +356,7 @@ static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = { .pa_end = 0x4809a0ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { @@ -364,7 +364,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { .slave = &omap2430_mcspi2_hwmod, .clk = "mcspi2_ick", .addr = omap2430_mcspi2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_mcspi2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -375,6 +374,7 @@ static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { .pa_end = 0x480b80ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { @@ -382,7 +382,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { .slave = &omap2430_mcspi3_hwmod, .clk = "mcspi3_ick", .addr = omap2430_mcspi3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_mcspi3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -471,6 +470,7 @@ static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { .pa_end = 0x49018000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> timer1 */ @@ -479,7 +479,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = { .slave = &omap2430_timer1_hwmod, .clk = "gpt1_ick", .addr = omap2430_timer1_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -521,6 +520,7 @@ static struct omap_hwmod_addr_space omap2430_timer2_addrs[] = { .pa_end = 0x4802a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer2 */ @@ -529,7 +529,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { .slave = &omap2430_timer2_hwmod, .clk = "gpt2_ick", .addr = omap2430_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -571,6 +570,7 @@ static struct omap_hwmod_addr_space omap2430_timer3_addrs[] = { .pa_end = 0x48078000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer3 */ @@ -579,7 +579,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { .slave = &omap2430_timer3_hwmod, .clk = "gpt3_ick", .addr = omap2430_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -621,6 +620,7 @@ static struct omap_hwmod_addr_space omap2430_timer4_addrs[] = { .pa_end = 0x4807a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer4 */ @@ -629,7 +629,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { .slave = &omap2430_timer4_hwmod, .clk = "gpt4_ick", .addr = omap2430_timer4_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -671,6 +670,7 @@ static struct omap_hwmod_addr_space omap2430_timer5_addrs[] = { .pa_end = 0x4807c000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer5 */ @@ -679,7 +679,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { .slave = &omap2430_timer5_hwmod, .clk = "gpt5_ick", .addr = omap2430_timer5_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -721,6 +720,7 @@ static struct omap_hwmod_addr_space omap2430_timer6_addrs[] = { .pa_end = 0x4807e000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer6 */ @@ -729,7 +729,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { .slave = &omap2430_timer6_hwmod, .clk = "gpt6_ick", .addr = omap2430_timer6_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer6_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -771,6 +770,7 @@ static struct omap_hwmod_addr_space omap2430_timer7_addrs[] = { .pa_end = 0x48080000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer7 */ @@ -779,7 +779,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { .slave = &omap2430_timer7_hwmod, .clk = "gpt7_ick", .addr = omap2430_timer7_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer7_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -821,6 +820,7 @@ static struct omap_hwmod_addr_space omap2430_timer8_addrs[] = { .pa_end = 0x48082000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer8 */ @@ -829,7 +829,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { .slave = &omap2430_timer8_hwmod, .clk = "gpt8_ick", .addr = omap2430_timer8_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer8_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -871,6 +870,7 @@ static struct omap_hwmod_addr_space omap2430_timer9_addrs[] = { .pa_end = 0x48084000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer9 */ @@ -879,7 +879,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { .slave = &omap2430_timer9_hwmod, .clk = "gpt9_ick", .addr = omap2430_timer9_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer9_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -921,6 +920,7 @@ static struct omap_hwmod_addr_space omap2430_timer10_addrs[] = { .pa_end = 0x48086000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer10 */ @@ -929,7 +929,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { .slave = &omap2430_timer10_hwmod, .clk = "gpt10_ick", .addr = omap2430_timer10_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer10_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -971,6 +970,7 @@ static struct omap_hwmod_addr_space omap2430_timer11_addrs[] = { .pa_end = 0x48088000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer11 */ @@ -979,7 +979,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { .slave = &omap2430_timer11_hwmod, .clk = "gpt11_ick", .addr = omap2430_timer11_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer11_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1021,6 +1020,7 @@ static struct omap_hwmod_addr_space omap2430_timer12_addrs[] = { .pa_end = 0x4808a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer12 */ @@ -1029,7 +1029,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { .slave = &omap2430_timer12_hwmod, .clk = "gpt12_ick", .addr = omap2430_timer12_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer12_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1066,6 +1065,7 @@ static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = { .pa_end = 0x4901607f, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { @@ -1073,7 +1073,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { .slave = &omap2430_wd_timer2_hwmod, .clk = "mpu_wdt_ick", .addr = omap2430_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1284,6 +1283,7 @@ static struct omap_hwmod_addr_space omap2430_dss_addrs[] = { .pa_end = 0x480503FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss */ @@ -1292,7 +1292,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss = { .slave = &omap2430_dss_core_hwmod, .clk = "dss_ick", .addr = omap2430_dss_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_dss_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1362,6 +1361,7 @@ static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = { .pa_end = 0x480507FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_dispc */ @@ -1370,7 +1370,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { .slave = &omap2430_dss_dispc_hwmod, .clk = "dss_ick", .addr = omap2430_dss_dispc_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_dss_dispc_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1426,6 +1425,7 @@ static struct omap_hwmod_addr_space omap2430_dss_rfbi_addrs[] = { .pa_end = 0x48050BFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_rfbi */ @@ -1434,7 +1434,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { .slave = &omap2430_dss_rfbi_hwmod, .clk = "dss_ick", .addr = omap2430_dss_rfbi_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_dss_rfbi_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1476,6 +1475,7 @@ static struct omap_hwmod_addr_space omap2430_dss_venc_addrs[] = { .pa_end = 0x48050FFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_venc */ @@ -1484,7 +1484,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { .slave = &omap2430_dss_venc_hwmod, .clk = "dss_54m_fck", .addr = omap2430_dss_venc_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_dss_venc_addrs), .flags = OCPIF_SWSUP_IDLE, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1621,6 +1620,7 @@ static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = { .pa_end = 0x4900C1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { @@ -1628,7 +1628,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { .slave = &omap2430_gpio1_hwmod, .clk = "gpios_ick", .addr = omap2430_gpio1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_gpio1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1639,6 +1638,7 @@ static struct omap_hwmod_addr_space omap2430_gpio2_addr_space[] = { .pa_end = 0x4900E1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { @@ -1646,7 +1646,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { .slave = &omap2430_gpio2_hwmod, .clk = "gpios_ick", .addr = omap2430_gpio2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_gpio2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1657,6 +1656,7 @@ static struct omap_hwmod_addr_space omap2430_gpio3_addr_space[] = { .pa_end = 0x490101ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { @@ -1664,7 +1664,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { .slave = &omap2430_gpio3_hwmod, .clk = "gpios_ick", .addr = omap2430_gpio3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_gpio3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1675,6 +1674,7 @@ static struct omap_hwmod_addr_space omap2430_gpio4_addr_space[] = { .pa_end = 0x490121ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { @@ -1682,7 +1682,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { .slave = &omap2430_gpio4_hwmod, .clk = "gpios_ick", .addr = omap2430_gpio4_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_gpio4_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1693,6 +1692,7 @@ static struct omap_hwmod_addr_space omap2430_gpio5_addr_space[] = { .pa_end = 0x480B61ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { @@ -1700,7 +1700,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { .slave = &omap2430_gpio5_hwmod, .clk = "gpio5_ick", .addr = omap2430_gpio5_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_gpio5_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1923,6 +1922,7 @@ static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { .pa_end = 0x48056fff, .flags = ADDR_TYPE_RT }, + { } }; /* dma_system -> L3 */ @@ -1944,7 +1944,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { .slave = &omap2430_dma_system_hwmod, .clk = "sdma_ick", .addr = omap2430_dma_system_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_dma_system_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2001,6 +2000,7 @@ static struct omap_hwmod_addr_space omap2430_mailbox_addrs[] = { .pa_end = 0x480941ff, .flags = ADDR_TYPE_RT, }, + { } }; /* l4_core -> mailbox */ @@ -2008,7 +2008,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mailbox_hwmod, .addr = omap2430_mailbox_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mailbox_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2287,6 +2286,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp1_addrs[] = { .pa_end = 0x480740ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp1 */ @@ -2295,7 +2295,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { .slave = &omap2430_mcbsp1_hwmod, .clk = "mcbsp1_ick", .addr = omap2430_mcbsp1_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2345,6 +2344,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp2_addrs[] = { .pa_end = 0x480760ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp2 */ @@ -2353,7 +2353,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { .slave = &omap2430_mcbsp2_hwmod, .clk = "mcbsp2_ick", .addr = omap2430_mcbsp2_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2403,6 +2402,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { .pa_end = 0x4808C0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp3 */ @@ -2411,7 +2411,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = { .slave = &omap2430_mcbsp3_hwmod, .clk = "mcbsp3_ick", .addr = omap2430_mcbsp3_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2461,6 +2460,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { .pa_end = 0x4808E0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp4 */ @@ -2469,7 +2469,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = { .slave = &omap2430_mcbsp4_hwmod, .clk = "mcbsp4_ick", .addr = omap2430_mcbsp4_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2519,6 +2518,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { .pa_end = 0x480960ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp5 */ @@ -2527,7 +2527,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = { .slave = &omap2430_mcbsp5_hwmod, .clk = "mcbsp5_ick", .addr = omap2430_mcbsp5_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 909a84de6682..64107795f1ae 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1,7 +1,7 @@ /* * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips * - * Copyright (C) 2009-2010 Nokia Corporation + * Copyright (C) 2009-2011 Nokia Corporation * Paul Walmsley * * This program is free software; you can redistribute it and/or modify @@ -111,6 +111,7 @@ static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = { .pa_end = 0x6800ffff, .flags = ADDR_TYPE_RT, }, + { } }; /* MPU -> L3 interface */ @@ -118,7 +119,6 @@ static struct omap_hwmod_ocp_if omap3xxx_mpu__l3_main = { .master = &omap3xxx_mpu_hwmod, .slave = &omap3xxx_l3_main_hwmod, .addr = omap3xxx_l3_main_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_l3_main_addrs), .user = OCP_USER_MPU, }; @@ -196,6 +196,7 @@ static struct omap_hwmod_addr_space omap3xxx_mmc1_addr_space[] = { .pa_end = 0x4809c1ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { @@ -203,7 +204,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { .slave = &omap3xxx_mmc1_hwmod, .clk = "mmchs1_ick", .addr = omap3xxx_mmc1_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_mmc1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, .flags = OMAP_FIREWALL_L4 }; @@ -215,6 +215,7 @@ static struct omap_hwmod_addr_space omap3xxx_mmc2_addr_space[] = { .pa_end = 0x480b41ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { @@ -222,7 +223,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { .slave = &omap3xxx_mmc2_hwmod, .clk = "mmchs2_ick", .addr = omap3xxx_mmc2_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_mmc2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, .flags = OMAP_FIREWALL_L4 }; @@ -234,6 +234,7 @@ static struct omap_hwmod_addr_space omap3xxx_mmc3_addr_space[] = { .pa_end = 0x480ad1ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = { @@ -241,7 +242,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = { .slave = &omap3xxx_mmc3_hwmod, .clk = "mmchs3_ick", .addr = omap3xxx_mmc3_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_mmc3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, .flags = OMAP_FIREWALL_L4 }; @@ -253,6 +253,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart1_addr_space[] = { .pa_end = OMAP3_UART1_BASE + SZ_8K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = { @@ -260,7 +261,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = { .slave = &omap3xxx_uart1_hwmod, .clk = "uart1_ick", .addr = omap3xxx_uart1_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_uart1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -271,6 +271,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart2_addr_space[] = { .pa_end = OMAP3_UART2_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = { @@ -278,7 +279,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = { .slave = &omap3xxx_uart2_hwmod, .clk = "uart2_ick", .addr = omap3xxx_uart2_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_uart2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -289,6 +289,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart3_addr_space[] = { .pa_end = OMAP3_UART3_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = { @@ -296,7 +297,6 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = { .slave = &omap3xxx_uart3_hwmod, .clk = "uart3_ick", .addr = omap3xxx_uart3_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_uart3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -307,6 +307,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart4_addr_space[] = { .pa_end = OMAP3_UART4_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = { @@ -314,7 +315,6 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = { .slave = &omap3xxx_uart4_hwmod, .clk = "uart4_ick", .addr = omap3xxx_uart4_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_uart4_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -328,6 +328,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c1_addr_space[] = { .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { @@ -335,7 +336,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { .slave = &omap3xxx_i2c1_hwmod, .clk = "i2c1_ick", .addr = omap3xxx_i2c1_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_i2c1_addr_space), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_I2C1_REGION, @@ -353,6 +353,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c2_addr_space[] = { .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { @@ -360,7 +361,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { .slave = &omap3xxx_i2c2_hwmod, .clk = "i2c2_ick", .addr = omap3xxx_i2c2_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_i2c2_addr_space), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_I2C2_REGION, @@ -378,6 +378,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = { .pa_end = 0x48060000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = { @@ -385,7 +386,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = { .slave = &omap3xxx_i2c3_hwmod, .clk = "i2c3_ick", .addr = omap3xxx_i2c3_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_i2c3_addr_space), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_I2C3_REGION, @@ -403,6 +403,7 @@ static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = { .pa_end = OMAP34XX_SR1_BASE + SZ_1K - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = { @@ -410,7 +411,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = { .slave = &omap34xx_sr1_hwmod, .clk = "sr_l4_ick", .addr = omap3_sr1_addr_space, - .addr_cnt = ARRAY_SIZE(omap3_sr1_addr_space), .user = OCP_USER_MPU, }; @@ -421,6 +421,7 @@ static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = { .pa_end = OMAP34XX_SR2_BASE + SZ_1K - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = { @@ -428,7 +429,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = { .slave = &omap34xx_sr2_hwmod, .clk = "sr_l4_ick", .addr = omap3_sr2_addr_space, - .addr_cnt = ARRAY_SIZE(omap3_sr2_addr_space), .user = OCP_USER_MPU, }; @@ -442,6 +442,7 @@ static struct omap_hwmod_addr_space omap3xxx_usbhsotg_addrs[] = { .pa_end = OMAP34XX_HSUSB_OTG_BASE + SZ_4K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> usbhsotg */ @@ -450,7 +451,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__usbhsotg = { .slave = &omap3xxx_usbhsotg_hwmod, .clk = "l4_ick", .addr = omap3xxx_usbhsotg_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_addrs), .user = OCP_USER_MPU, }; @@ -468,6 +468,7 @@ static struct omap_hwmod_addr_space am35xx_usbhsotg_addrs[] = { .pa_end = AM35XX_IPSS_USBOTGSS_BASE + SZ_4K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> usbhsotg */ @@ -476,7 +477,6 @@ static struct omap_hwmod_ocp_if am35xx_l4_core__usbhsotg = { .slave = &am35xx_usbhsotg_hwmod, .clk = "l4_ick", .addr = am35xx_usbhsotg_addrs, - .addr_cnt = ARRAY_SIZE(am35xx_usbhsotg_addrs), .user = OCP_USER_MPU, }; @@ -621,6 +621,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { .pa_end = 0x48318000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> timer1 */ @@ -629,7 +630,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__timer1 = { .slave = &omap3xxx_timer1_hwmod, .clk = "gpt1_ick", .addr = omap3xxx_timer1_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -671,6 +671,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { .pa_end = 0x49032000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer2 */ @@ -679,7 +680,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer2 = { .slave = &omap3xxx_timer2_hwmod, .clk = "gpt2_ick", .addr = omap3xxx_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -721,6 +721,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { .pa_end = 0x49034000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer3 */ @@ -729,7 +730,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer3 = { .slave = &omap3xxx_timer3_hwmod, .clk = "gpt3_ick", .addr = omap3xxx_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -771,6 +771,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { .pa_end = 0x49036000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer4 */ @@ -779,7 +780,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer4 = { .slave = &omap3xxx_timer4_hwmod, .clk = "gpt4_ick", .addr = omap3xxx_timer4_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -821,6 +821,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { .pa_end = 0x49038000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer5 */ @@ -829,7 +830,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer5 = { .slave = &omap3xxx_timer5_hwmod, .clk = "gpt5_ick", .addr = omap3xxx_timer5_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -871,6 +871,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { .pa_end = 0x4903A000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer6 */ @@ -879,7 +880,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer6 = { .slave = &omap3xxx_timer6_hwmod, .clk = "gpt6_ick", .addr = omap3xxx_timer6_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer6_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -921,6 +921,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { .pa_end = 0x4903C000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer7 */ @@ -929,7 +930,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer7 = { .slave = &omap3xxx_timer7_hwmod, .clk = "gpt7_ick", .addr = omap3xxx_timer7_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer7_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -971,6 +971,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { .pa_end = 0x4903E000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer8 */ @@ -979,7 +980,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer8 = { .slave = &omap3xxx_timer8_hwmod, .clk = "gpt8_ick", .addr = omap3xxx_timer8_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer8_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1021,6 +1021,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { .pa_end = 0x49040000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer9 */ @@ -1029,7 +1030,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer9 = { .slave = &omap3xxx_timer9_hwmod, .clk = "gpt9_ick", .addr = omap3xxx_timer9_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer9_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1071,6 +1071,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer10_addrs[] = { .pa_end = 0x48086000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer10 */ @@ -1079,7 +1080,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { .slave = &omap3xxx_timer10_hwmod, .clk = "gpt10_ick", .addr = omap3xxx_timer10_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer10_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1121,6 +1121,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer11_addrs[] = { .pa_end = 0x48088000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer11 */ @@ -1129,7 +1130,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { .slave = &omap3xxx_timer11_hwmod, .clk = "gpt11_ick", .addr = omap3xxx_timer11_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer11_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1171,6 +1171,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = { .pa_end = 0x48304000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer12 */ @@ -1179,7 +1180,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer12 = { .slave = &omap3xxx_timer12_hwmod, .clk = "gpt12_ick", .addr = omap3xxx_timer12_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer12_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1216,6 +1216,7 @@ static struct omap_hwmod_addr_space omap3xxx_wd_timer2_addrs[] = { .pa_end = 0x4831407f, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { @@ -1223,7 +1224,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { .slave = &omap3xxx_wd_timer2_hwmod, .clk = "wdt2_ick", .addr = omap3xxx_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1497,6 +1497,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_addrs[] = { .pa_end = 0x480503FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss */ @@ -1505,7 +1506,6 @@ static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = { .slave = &omap3430es1_dss_core_hwmod, .clk = "dss_ick", .addr = omap3xxx_dss_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION, @@ -1521,7 +1521,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = { .slave = &omap3xxx_dss_core_hwmod, .clk = "dss_ick", .addr = omap3xxx_dss_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_CORE_REGION, @@ -1632,6 +1631,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = { .pa_end = 0x480507FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_dispc */ @@ -1640,7 +1640,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { .slave = &omap3xxx_dss_dispc_hwmod, .clk = "dss_ick", .addr = omap3xxx_dss_dispc_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DISPC_REGION, @@ -1697,6 +1696,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = { .pa_end = 0x4804FFFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_dsi1 */ @@ -1704,7 +1704,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_dss_dsi1_hwmod, .addr = omap3xxx_dss_dsi1_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DSI_REGION, @@ -1767,6 +1766,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_rfbi_addrs[] = { .pa_end = 0x48050BFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_rfbi */ @@ -1775,7 +1775,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { .slave = &omap3xxx_dss_rfbi_hwmod, .clk = "dss_ick", .addr = omap3xxx_dss_rfbi_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_RFBI_REGION, @@ -1826,6 +1825,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_venc_addrs[] = { .pa_end = 0x48050FFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_venc */ @@ -1834,7 +1834,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { .slave = &omap3xxx_dss_venc_hwmod, .clk = "dss_tv_fck", .addr = omap3xxx_dss_venc_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_venc_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_VENC_REGION, @@ -2003,13 +2002,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio1_addrs[] = { .pa_end = 0x483101ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__gpio1 = { .master = &omap3xxx_l4_wkup_hwmod, .slave = &omap3xxx_gpio1_hwmod, .addr = omap3xxx_gpio1_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2020,13 +2019,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio2_addrs[] = { .pa_end = 0x490501ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio2 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio2_hwmod, .addr = omap3xxx_gpio2_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2037,13 +2036,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio3_addrs[] = { .pa_end = 0x490521ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio3 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio3_hwmod, .addr = omap3xxx_gpio3_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2054,13 +2053,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio4_addrs[] = { .pa_end = 0x490541ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio4 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio4_hwmod, .addr = omap3xxx_gpio4_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2071,13 +2070,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio5_addrs[] = { .pa_end = 0x490561ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio5 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio5_hwmod, .addr = omap3xxx_gpio5_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2088,13 +2087,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio6_addrs[] = { .pa_end = 0x490581ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio6 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio6_hwmod, .addr = omap3xxx_gpio6_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio6_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2395,6 +2394,7 @@ static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { .pa_end = 0x48056fff, .flags = ADDR_TYPE_RT }, + { } }; /* dma_system master ports */ @@ -2408,7 +2408,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = { .slave = &omap3xxx_dma_system_hwmod, .clk = "core_l4_ick", .addr = omap3xxx_dma_system_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dma_system_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2480,6 +2479,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { .pa_end = 0x480740ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp1 */ @@ -2488,7 +2488,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp1 = { .slave = &omap3xxx_mcbsp1_hwmod, .clk = "mcbsp1_ick", .addr = omap3xxx_mcbsp1_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2538,6 +2537,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { .pa_end = 0x490220ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp2 */ @@ -2546,7 +2546,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = { .slave = &omap3xxx_mcbsp2_hwmod, .clk = "mcbsp2_ick", .addr = omap3xxx_mcbsp2_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_addrs), + .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2601,6 +2601,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { .pa_end = 0x490240ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp3 */ @@ -2609,7 +2610,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3 = { .slave = &omap3xxx_mcbsp3_hwmod, .clk = "mcbsp3_ick", .addr = omap3xxx_mcbsp3_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2664,6 +2664,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = { .pa_end = 0x490260ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp4 */ @@ -2672,7 +2673,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp4 = { .slave = &omap3xxx_mcbsp4_hwmod, .clk = "mcbsp4_ick", .addr = omap3xxx_mcbsp4_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2722,6 +2722,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = { .pa_end = 0x480960ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp5 */ @@ -2730,7 +2731,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp5 = { .slave = &omap3xxx_mcbsp5_hwmod, .clk = "mcbsp5_ick", .addr = omap3xxx_mcbsp5_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2785,6 +2785,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = { .pa_end = 0x490280ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp2_sidetone */ @@ -2793,7 +2794,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2_sidetone = { .slave = &omap3xxx_mcbsp2_sidetone_hwmod, .clk = "mcbsp2_ick", .addr = omap3xxx_mcbsp2_sidetone_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_addrs), .user = OCP_USER_MPU, }; @@ -2834,6 +2834,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = { .pa_end = 0x4902A0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp3_sidetone */ @@ -2842,7 +2843,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3_sidetone = { .slave = &omap3xxx_mcbsp3_sidetone_hwmod, .clk = "mcbsp3_ick", .addr = omap3xxx_mcbsp3_sidetone_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_addrs), .user = OCP_USER_MPU, }; @@ -3033,6 +3033,7 @@ static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = { .pa_end = 0x480941ff, .flags = ADDR_TYPE_RT, }, + { } }; /* l4_core -> mailbox */ @@ -3040,7 +3041,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mailbox = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_mailbox_hwmod, .addr = omap3xxx_mailbox_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mailbox_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3076,6 +3076,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi1_addr_space[] = { .pa_end = 0x480980ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { @@ -3083,7 +3084,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { .slave = &omap34xx_mcspi1, .clk = "mcspi1_ick", .addr = omap34xx_mcspi1_addr_space, - .addr_cnt = ARRAY_SIZE(omap34xx_mcspi1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3094,6 +3094,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi2_addr_space[] = { .pa_end = 0x4809a0ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { @@ -3101,7 +3102,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { .slave = &omap34xx_mcspi2, .clk = "mcspi2_ick", .addr = omap34xx_mcspi2_addr_space, - .addr_cnt = ARRAY_SIZE(omap34xx_mcspi2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3112,6 +3112,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi3_addr_space[] = { .pa_end = 0x480b80ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { @@ -3119,7 +3120,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { .slave = &omap34xx_mcspi3, .clk = "mcspi3_ick", .addr = omap34xx_mcspi3_addr_space, - .addr_cnt = ARRAY_SIZE(omap34xx_mcspi3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3130,6 +3130,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi4_addr_space[] = { .pa_end = 0x480ba0ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi4 = { @@ -3137,7 +3138,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi4 = { .slave = &omap34xx_mcspi4, .clk = "mcspi4_ick", .addr = omap34xx_mcspi4_addr_space, - .addr_cnt = ARRAY_SIZE(omap34xx_mcspi4_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index e1c69ffe0f69..81fd313bb1ad 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -95,6 +95,7 @@ static struct omap_hwmod_addr_space omap44xx_dmm_addrs[] = { .pa_end = 0x4e0007ff, .flags = ADDR_TYPE_RT }, + { } }; /* mpu -> dmm */ @@ -103,7 +104,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = { .slave = &omap44xx_dmm_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dmm_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dmm_addrs), .user = OCP_USER_MPU, }; @@ -150,6 +150,7 @@ static struct omap_hwmod_addr_space omap44xx_emif_fw_addrs[] = { .pa_end = 0x4a20c0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> emif_fw */ @@ -158,7 +159,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__emif_fw = { .slave = &omap44xx_emif_fw_hwmod, .clk = "l4_div_ck", .addr = omap44xx_emif_fw_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_emif_fw_addrs), .user = OCP_USER_MPU, }; @@ -276,6 +276,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { .pa_end = 0x44000fff, .flags = ADDR_TYPE_RT, }, + { } }; /* mpu -> l3_main_1 */ @@ -284,7 +285,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = { .slave = &omap44xx_l3_main_1_hwmod, .clk = "l3_div_ck", .addr = omap44xx_l3_main_1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -356,6 +356,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = { .pa_end = 0x44801fff, .flags = ADDR_TYPE_RT, }, + { } }; /* l3_main_1 -> l3_main_2 */ @@ -364,7 +365,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = { .slave = &omap44xx_l3_main_2_hwmod, .clk = "l3_div_ck", .addr = omap44xx_l3_main_2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -411,6 +411,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { .pa_end = 0x45000fff, .flags = ADDR_TYPE_RT, }, + { } }; /* l3_main_1 -> l3_main_3 */ @@ -419,7 +420,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = { .slave = &omap44xx_l3_main_3_hwmod, .clk = "l3_div_ck", .addr = omap44xx_l3_main_3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -696,6 +696,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = { .pa_end = 0x401f13ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> aess */ @@ -704,7 +705,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess = { .slave = &omap44xx_aess_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_aess_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_aess_addrs), .user = OCP_USER_MPU, }; @@ -714,6 +714,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = { .pa_end = 0x490f13ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> aess (dma) */ @@ -722,7 +723,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = { .slave = &omap44xx_aess_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_aess_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_aess_dma_addrs), .user = OCP_USER_SDMA, }; @@ -806,6 +806,7 @@ static struct omap_hwmod_addr_space omap44xx_counter_32k_addrs[] = { .pa_end = 0x4a30401f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> counter_32k */ @@ -814,7 +815,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = { .slave = &omap44xx_counter_32k_hwmod, .clk = "l4_wkup_clk_mux_ck", .addr = omap44xx_counter_32k_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_counter_32k_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -888,6 +888,7 @@ static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = { .pa_end = 0x4a056fff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> dma_system */ @@ -896,7 +897,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dma_system = { .slave = &omap44xx_dma_system_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dma_system_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dma_system_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -960,6 +960,7 @@ static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { .pa_end = 0x4012e07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> dmic */ @@ -968,7 +969,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = { .slave = &omap44xx_dmic_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_dmic_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dmic_addrs), .user = OCP_USER_MPU, }; @@ -978,6 +978,7 @@ static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = { .pa_end = 0x4902e07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> dmic (dma) */ @@ -986,7 +987,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic_dma = { .slave = &omap44xx_dmic_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_dmic_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dmic_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1127,6 +1127,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = { .pa_end = 0x5800007f, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss */ @@ -1135,7 +1136,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = { .slave = &omap44xx_dss_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1145,6 +1145,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_addrs[] = { .pa_end = 0x4804007f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss */ @@ -1153,7 +1154,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss = { .slave = &omap44xx_dss_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_addrs), .user = OCP_USER_MPU, }; @@ -1227,6 +1227,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { .pa_end = 0x58001fff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_dispc */ @@ -1235,7 +1236,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = { .slave = &omap44xx_dss_dispc_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_dispc_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1245,6 +1245,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = { .pa_end = 0x48041fff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_dispc */ @@ -1253,7 +1254,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = { .slave = &omap44xx_dss_dispc_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_dispc_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_addrs), .user = OCP_USER_MPU, }; @@ -1318,6 +1318,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { .pa_end = 0x580041ff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_dsi1 */ @@ -1326,7 +1327,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = { .slave = &omap44xx_dss_dsi1_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_dsi1_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1336,6 +1336,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_addrs[] = { .pa_end = 0x480441ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_dsi1 */ @@ -1344,7 +1345,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi1 = { .slave = &omap44xx_dss_dsi1_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_dsi1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_addrs), .user = OCP_USER_MPU, }; @@ -1388,6 +1388,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { .pa_end = 0x580051ff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_dsi2 */ @@ -1396,7 +1397,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = { .slave = &omap44xx_dss_dsi2_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_dsi2_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1406,6 +1406,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_addrs[] = { .pa_end = 0x480451ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_dsi2 */ @@ -1414,7 +1415,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi2 = { .slave = &omap44xx_dss_dsi2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_dsi2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_addrs), .user = OCP_USER_MPU, }; @@ -1478,6 +1478,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { .pa_end = 0x58006fff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_hdmi */ @@ -1486,7 +1487,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = { .slave = &omap44xx_dss_hdmi_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_hdmi_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1496,6 +1496,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_addrs[] = { .pa_end = 0x48046fff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_hdmi */ @@ -1504,7 +1505,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_hdmi = { .slave = &omap44xx_dss_hdmi_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_hdmi_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_addrs), .user = OCP_USER_MPU, }; @@ -1564,6 +1564,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { .pa_end = 0x580020ff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_rfbi */ @@ -1572,7 +1573,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = { .slave = &omap44xx_dss_rfbi_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_rfbi_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1582,6 +1582,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_addrs[] = { .pa_end = 0x480420ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_rfbi */ @@ -1590,7 +1591,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_rfbi = { .slave = &omap44xx_dss_rfbi_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_rfbi_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_addrs), .user = OCP_USER_MPU, }; @@ -1633,6 +1633,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = { .pa_end = 0x580030ff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_venc */ @@ -1641,7 +1642,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = { .slave = &omap44xx_dss_venc_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_venc_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1651,6 +1651,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_addrs[] = { .pa_end = 0x480430ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_venc */ @@ -1659,7 +1660,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = { .slave = &omap44xx_dss_venc_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_venc_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_addrs), .user = OCP_USER_MPU, }; @@ -1724,6 +1724,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = { .pa_end = 0x4a3101ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> gpio1 */ @@ -1732,7 +1733,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__gpio1 = { .slave = &omap44xx_gpio1_hwmod, .clk = "l4_wkup_clk_mux_ck", .addr = omap44xx_gpio1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1776,6 +1776,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = { .pa_end = 0x480551ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> gpio2 */ @@ -1784,7 +1785,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio2 = { .slave = &omap44xx_gpio2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_gpio2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1829,6 +1829,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = { .pa_end = 0x480571ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> gpio3 */ @@ -1837,7 +1838,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio3 = { .slave = &omap44xx_gpio3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_gpio3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1882,6 +1882,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = { .pa_end = 0x480591ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> gpio4 */ @@ -1890,7 +1891,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio4 = { .slave = &omap44xx_gpio4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_gpio4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1935,6 +1935,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = { .pa_end = 0x4805b1ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> gpio5 */ @@ -1943,7 +1944,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio5 = { .slave = &omap44xx_gpio5_hwmod, .clk = "l4_div_ck", .addr = omap44xx_gpio5_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1988,6 +1988,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = { .pa_end = 0x4805d1ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> gpio6 */ @@ -1996,7 +1997,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio6 = { .slave = &omap44xx_gpio6_hwmod, .clk = "l4_div_ck", .addr = omap44xx_gpio6_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio6_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2071,6 +2071,7 @@ static struct omap_hwmod_addr_space omap44xx_hsi_addrs[] = { .pa_end = 0x4a05bfff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> hsi */ @@ -2079,7 +2080,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__hsi = { .slave = &omap44xx_hsi_hwmod, .clk = "l4_div_ck", .addr = omap44xx_hsi_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_hsi_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2144,6 +2144,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = { .pa_end = 0x480700ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> i2c1 */ @@ -2152,7 +2153,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = { .slave = &omap44xx_i2c1_hwmod, .clk = "l4_div_ck", .addr = omap44xx_i2c1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_i2c1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2197,6 +2197,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = { .pa_end = 0x480720ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> i2c2 */ @@ -2205,7 +2206,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = { .slave = &omap44xx_i2c2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_i2c2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_i2c2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2250,6 +2250,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = { .pa_end = 0x480600ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> i2c3 */ @@ -2258,7 +2259,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c3 = { .slave = &omap44xx_i2c3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_i2c3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_i2c3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2303,6 +2303,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = { .pa_end = 0x483500ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> i2c4 */ @@ -2311,7 +2312,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c4 = { .slave = &omap44xx_i2c4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_i2c4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_i2c4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2478,6 +2478,7 @@ static struct omap_hwmod_addr_space omap44xx_iss_addrs[] = { .pa_end = 0x520000ff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> iss */ @@ -2486,7 +2487,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = { .slave = &omap44xx_iss_hwmod, .clk = "l3_div_ck", .addr = omap44xx_iss_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_iss_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2561,6 +2561,7 @@ static struct omap_hwmod_addr_space omap44xx_iva_addrs[] = { .pa_end = 0x5a07ffff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> iva */ @@ -2569,7 +2570,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iva = { .slave = &omap44xx_iva_hwmod, .clk = "l3_div_ck", .addr = omap44xx_iva_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_iva_addrs), .user = OCP_USER_MPU, }; @@ -2664,6 +2664,7 @@ static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = { .pa_end = 0x4a31c07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> kbd */ @@ -2672,7 +2673,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__kbd = { .slave = &omap44xx_kbd_hwmod, .clk = "l4_wkup_clk_mux_ck", .addr = omap44xx_kbd_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_kbd_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2729,6 +2729,7 @@ static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = { .pa_end = 0x4a0f41ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> mailbox */ @@ -2737,7 +2738,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mailbox = { .slave = &omap44xx_mailbox_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mailbox_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mailbox_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2798,6 +2798,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = { .pa_end = 0x401220ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp1 */ @@ -2806,7 +2807,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = { .slave = &omap44xx_mcbsp1_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp1_addrs), .user = OCP_USER_MPU, }; @@ -2817,6 +2817,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp1_dma_addrs[] = { .pa_end = 0x490220ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp1 (dma) */ @@ -2825,7 +2826,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = { .slave = &omap44xx_mcbsp1_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp1_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp1_dma_addrs), .user = OCP_USER_SDMA, }; @@ -2871,6 +2871,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = { .pa_end = 0x401240ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp2 */ @@ -2879,7 +2880,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = { .slave = &omap44xx_mcbsp2_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp2_addrs), .user = OCP_USER_MPU, }; @@ -2890,6 +2890,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp2_dma_addrs[] = { .pa_end = 0x490240ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp2 (dma) */ @@ -2898,7 +2899,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = { .slave = &omap44xx_mcbsp2_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp2_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp2_dma_addrs), .user = OCP_USER_SDMA, }; @@ -2944,6 +2944,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = { .pa_end = 0x401260ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp3 */ @@ -2952,7 +2953,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = { .slave = &omap44xx_mcbsp3_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp3_addrs), .user = OCP_USER_MPU, }; @@ -2963,6 +2963,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp3_dma_addrs[] = { .pa_end = 0x490260ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp3 (dma) */ @@ -2971,7 +2972,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = { .slave = &omap44xx_mcbsp3_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp3_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp3_dma_addrs), .user = OCP_USER_SDMA, }; @@ -3016,6 +3016,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = { .pa_end = 0x480960ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp4 */ @@ -3024,7 +3025,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = { .slave = &omap44xx_mcbsp4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mcbsp4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3089,6 +3089,7 @@ static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = { .pa_end = 0x4013207f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcpdm */ @@ -3097,7 +3098,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = { .slave = &omap44xx_mcpdm_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcpdm_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcpdm_addrs), .user = OCP_USER_MPU, }; @@ -3107,6 +3107,7 @@ static struct omap_hwmod_addr_space omap44xx_mcpdm_dma_addrs[] = { .pa_end = 0x4903207f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcpdm (dma) */ @@ -3115,7 +3116,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm_dma = { .slave = &omap44xx_mcpdm_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcpdm_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcpdm_dma_addrs), .user = OCP_USER_SDMA, }; @@ -3188,6 +3188,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = { .pa_end = 0x480981ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcspi1 */ @@ -3196,7 +3197,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi1 = { .slave = &omap44xx_mcspi1_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mcspi1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcspi1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3248,6 +3248,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = { .pa_end = 0x4809a1ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcspi2 */ @@ -3256,7 +3257,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi2 = { .slave = &omap44xx_mcspi2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mcspi2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcspi2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3308,6 +3308,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = { .pa_end = 0x480b81ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcspi3 */ @@ -3316,7 +3317,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi3 = { .slave = &omap44xx_mcspi3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mcspi3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcspi3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3366,6 +3366,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = { .pa_end = 0x480ba1ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcspi4 */ @@ -3374,7 +3375,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi4 = { .slave = &omap44xx_mcspi4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mcspi4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcspi4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3451,6 +3451,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc1_addrs[] = { .pa_end = 0x4809c3ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mmc1 */ @@ -3459,7 +3460,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc1 = { .slave = &omap44xx_mmc1_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mmc1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mmc1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3515,6 +3515,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc2_addrs[] = { .pa_end = 0x480b43ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mmc2 */ @@ -3523,7 +3524,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc2 = { .slave = &omap44xx_mmc2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mmc2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mmc2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3569,6 +3569,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = { .pa_end = 0x480ad3ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mmc3 */ @@ -3577,7 +3578,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc3 = { .slave = &omap44xx_mmc3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mmc3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mmc3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3621,6 +3621,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = { .pa_end = 0x480d13ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mmc4 */ @@ -3629,7 +3630,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc4 = { .slave = &omap44xx_mmc4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mmc4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mmc4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3673,6 +3673,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = { .pa_end = 0x480d53ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mmc5 */ @@ -3681,7 +3682,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = { .slave = &omap44xx_mmc5_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mmc5_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mmc5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3786,6 +3786,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = { .pa_end = 0x4a0dd03f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> smartreflex_core */ @@ -3794,7 +3795,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_core = { .slave = &omap44xx_smartreflex_core_hwmod, .clk = "l4_div_ck", .addr = omap44xx_smartreflex_core_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3832,6 +3832,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = { .pa_end = 0x4a0db03f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> smartreflex_iva */ @@ -3840,7 +3841,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_iva = { .slave = &omap44xx_smartreflex_iva_hwmod, .clk = "l4_div_ck", .addr = omap44xx_smartreflex_iva_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3878,6 +3878,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = { .pa_end = 0x4a0d903f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> smartreflex_mpu */ @@ -3886,7 +3887,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_mpu = { .slave = &omap44xx_smartreflex_mpu_hwmod, .clk = "l4_div_ck", .addr = omap44xx_smartreflex_mpu_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3943,6 +3943,7 @@ static struct omap_hwmod_addr_space omap44xx_spinlock_addrs[] = { .pa_end = 0x4a0f6fff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> spinlock */ @@ -3951,7 +3952,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__spinlock = { .slave = &omap44xx_spinlock_hwmod, .clk = "l4_div_ck", .addr = omap44xx_spinlock_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_spinlock_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4023,6 +4023,7 @@ static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = { .pa_end = 0x4a31807f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> timer1 */ @@ -4031,7 +4032,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = { .slave = &omap44xx_timer1_hwmod, .clk = "l4_wkup_clk_mux_ck", .addr = omap44xx_timer1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4068,6 +4068,7 @@ static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = { .pa_end = 0x4803207f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer2 */ @@ -4076,7 +4077,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer2 = { .slave = &omap44xx_timer2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4113,6 +4113,7 @@ static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = { .pa_end = 0x4803407f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer3 */ @@ -4121,7 +4122,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer3 = { .slave = &omap44xx_timer3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4158,6 +4158,7 @@ static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = { .pa_end = 0x4803607f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer4 */ @@ -4166,7 +4167,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer4 = { .slave = &omap44xx_timer4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4203,6 +4203,7 @@ static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = { .pa_end = 0x4013807f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer5 */ @@ -4211,7 +4212,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5 = { .slave = &omap44xx_timer5_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer5_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer5_addrs), .user = OCP_USER_MPU, }; @@ -4221,6 +4221,7 @@ static struct omap_hwmod_addr_space omap44xx_timer5_dma_addrs[] = { .pa_end = 0x4903807f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer5 (dma) */ @@ -4229,7 +4230,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5_dma = { .slave = &omap44xx_timer5_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer5_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer5_dma_addrs), .user = OCP_USER_SDMA, }; @@ -4267,6 +4267,7 @@ static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = { .pa_end = 0x4013a07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer6 */ @@ -4275,7 +4276,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6 = { .slave = &omap44xx_timer6_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer6_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer6_addrs), .user = OCP_USER_MPU, }; @@ -4285,6 +4285,7 @@ static struct omap_hwmod_addr_space omap44xx_timer6_dma_addrs[] = { .pa_end = 0x4903a07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer6 (dma) */ @@ -4293,7 +4294,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6_dma = { .slave = &omap44xx_timer6_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer6_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer6_dma_addrs), .user = OCP_USER_SDMA, }; @@ -4331,6 +4331,7 @@ static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = { .pa_end = 0x4013c07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer7 */ @@ -4339,7 +4340,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7 = { .slave = &omap44xx_timer7_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer7_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer7_addrs), .user = OCP_USER_MPU, }; @@ -4349,6 +4349,7 @@ static struct omap_hwmod_addr_space omap44xx_timer7_dma_addrs[] = { .pa_end = 0x4903c07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer7 (dma) */ @@ -4357,7 +4358,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7_dma = { .slave = &omap44xx_timer7_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer7_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer7_dma_addrs), .user = OCP_USER_SDMA, }; @@ -4395,6 +4395,7 @@ static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = { .pa_end = 0x4013e07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer8 */ @@ -4403,7 +4404,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8 = { .slave = &omap44xx_timer8_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer8_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer8_addrs), .user = OCP_USER_MPU, }; @@ -4413,6 +4413,7 @@ static struct omap_hwmod_addr_space omap44xx_timer8_dma_addrs[] = { .pa_end = 0x4903e07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer8 (dma) */ @@ -4421,7 +4422,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8_dma = { .slave = &omap44xx_timer8_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer8_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer8_dma_addrs), .user = OCP_USER_SDMA, }; @@ -4459,6 +4459,7 @@ static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = { .pa_end = 0x4803e07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer9 */ @@ -4467,7 +4468,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer9 = { .slave = &omap44xx_timer9_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer9_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer9_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4504,6 +4504,7 @@ static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = { .pa_end = 0x4808607f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer10 */ @@ -4512,7 +4513,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer10 = { .slave = &omap44xx_timer10_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer10_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer10_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4549,6 +4549,7 @@ static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = { .pa_end = 0x4808807f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer11 */ @@ -4557,7 +4558,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer11 = { .slave = &omap44xx_timer11_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer11_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer11_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4621,6 +4621,7 @@ static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = { .pa_end = 0x4806a0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> uart1 */ @@ -4629,7 +4630,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart1 = { .slave = &omap44xx_uart1_hwmod, .clk = "l4_div_ck", .addr = omap44xx_uart1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_uart1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4673,6 +4673,7 @@ static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = { .pa_end = 0x4806c0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> uart2 */ @@ -4681,7 +4682,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart2 = { .slave = &omap44xx_uart2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_uart2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_uart2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4725,6 +4725,7 @@ static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = { .pa_end = 0x480200ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> uart3 */ @@ -4733,7 +4734,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart3 = { .slave = &omap44xx_uart3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_uart3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_uart3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4778,6 +4778,7 @@ static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = { .pa_end = 0x4806e0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> uart4 */ @@ -4786,7 +4787,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart4 = { .slave = &omap44xx_uart4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_uart4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_uart4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4853,6 +4853,7 @@ static struct omap_hwmod_addr_space omap44xx_usb_otg_hs_addrs[] = { .pa_end = 0x4a0ab003, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> usb_otg_hs */ @@ -4861,7 +4862,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_otg_hs = { .slave = &omap44xx_usb_otg_hs_hwmod, .clk = "l4_div_ck", .addr = omap44xx_usb_otg_hs_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4930,6 +4930,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = { .pa_end = 0x4a31407f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> wd_timer2 */ @@ -4938,7 +4939,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = { .slave = &omap44xx_wd_timer2_hwmod, .clk = "l4_wkup_clk_mux_ck", .addr = omap44xx_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4975,6 +4975,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = { .pa_end = 0x4013007f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> wd_timer3 */ @@ -4983,7 +4984,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3 = { .slave = &omap44xx_wd_timer3_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_wd_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_addrs), .user = OCP_USER_MPU, }; @@ -4993,6 +4993,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer3_dma_addrs[] = { .pa_end = 0x4903007f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> wd_timer3 (dma) */ @@ -5001,7 +5002,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = { .slave = &omap44xx_wd_timer3_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_wd_timer3_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_dma_addrs), .user = OCP_USER_SDMA, }; diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 1adea9c62984..523e0b585b6c 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -220,7 +220,6 @@ struct omap_hwmod_addr_space { * @clk: interface clock: OMAP clock name * @_clk: pointer to the interface struct clk (filled in at runtime) * @fw: interface firewall data - * @addr_cnt: ARRAY_SIZE(@addr) * @width: OCP data width * @user: initiators using this interface (see OCP_USER_* macros above) * @flags: OCP interface flags (see OCPIF_* macros above) @@ -239,7 +238,6 @@ struct omap_hwmod_ocp_if { union { struct omap_hwmod_omap2_firewall omap2; } fw; - u8 addr_cnt; u8 width; u8 user; u8 flags; From ded11383fc14a7483cf30700ffc253caf37c9933 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:06 -0600 Subject: [PATCH 18/56] omap_hwmod: share identical omap_hwmod_addr_space arrays To reduce kernel source file data duplication, share struct omap_hwmod_addr_space arrays across OMAP2xxx and 3xxx hwmod data files. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/Makefile | 11 +- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 291 ++-------------- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 319 ++---------------- .../omap_hwmod_2xxx_3xxx_interconnect_data.c | 173 ++++++++++ .../omap_hwmod_2xxx_interconnect_data.c | 130 +++++++ arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 151 +-------- arch/arm/mach-omap2/omap_hwmod_common_data.h | 38 ++- 7 files changed, 414 insertions(+), 699 deletions(-) create mode 100644 arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c create mode 100644 arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index ff1466fbf5c5..8a75d176ec6c 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -145,9 +145,14 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o # hwmod data -obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2420_data.o -obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2430_data.o -obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o +obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o \ + omap_hwmod_2xxx_3xxx_interconnect_data.o \ + omap_hwmod_2420_data.o +obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_interconnect_data.o \ + omap_hwmod_2xxx_3xxx_interconnect_data.o \ + omap_hwmod_2430_data.o +obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o \ + omap_hwmod_3xxx_data.o obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o # EMU peripherals diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 1a7ce3ec0c0b..3ec625c40c1f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -114,38 +114,20 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod; static struct omap_hwmod omap2420_mcbsp2_hwmod; /* l4 core -> mcspi1 interface */ -static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = { - { - .pa_start = 0x48098000, - .pa_end = 0x480980ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mcspi1_hwmod, .clk = "mcspi1_ick", - .addr = omap2420_mcspi1_addr_space, + .addr = omap2_mcspi1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi2 interface */ -static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = { - { - .pa_start = 0x4809a000, - .pa_end = 0x4809a0ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mcspi2_hwmod, .clk = "mcspi2_ick", - .addr = omap2420_mcspi2_addr_space, + .addr = omap2_mcspi2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -157,95 +139,47 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { }; /* L4 CORE -> UART1 interface */ -static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = { - { - .pa_start = OMAP2_UART1_BASE, - .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_uart1_hwmod, .clk = "uart1_ick", - .addr = omap2420_uart1_addr_space, + .addr = omap2xxx_uart1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 CORE -> UART2 interface */ -static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = { - { - .pa_start = OMAP2_UART2_BASE, - .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_uart2_hwmod, .clk = "uart2_ick", - .addr = omap2420_uart2_addr_space, + .addr = omap2xxx_uart2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 PER -> UART3 interface */ -static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = { - { - .pa_start = OMAP2_UART3_BASE, - .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_uart3_hwmod, .clk = "uart3_ick", - .addr = omap2420_uart3_addr_space, + .addr = omap2xxx_uart3_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* I2C IP block address space length (in bytes) */ -#define OMAP2_I2C_AS_LEN 128 - /* L4 CORE -> I2C1 interface */ -static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = { - { - .pa_start = 0x48070000, - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_i2c1_hwmod, .clk = "i2c1_ick", - .addr = omap2420_i2c1_addr_space, + .addr = omap2_i2c1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 CORE -> I2C2 interface */ -static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = { - { - .pa_start = 0x48072000, - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_i2c2_hwmod, .clk = "i2c2_ick", - .addr = omap2420_i2c2_addr_space, + .addr = omap2_i2c2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -414,21 +348,13 @@ static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { { .irq = 38, }, }; -static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = { - { - .pa_start = 0x4802a000, - .pa_end = 0x4802a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_core -> timer2 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer2_hwmod, .clk = "gpt2_ick", - .addr = omap2420_timer2_addrs, + .addr = omap2xxx_timer2_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -464,21 +390,12 @@ static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { { .irq = 39, }, }; -static struct omap_hwmod_addr_space omap2420_timer3_addrs[] = { - { - .pa_start = 0x48078000, - .pa_end = 0x48078000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer3 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer3_hwmod, .clk = "gpt3_ick", - .addr = omap2420_timer3_addrs, + .addr = omap2xxx_timer3_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -514,21 +431,12 @@ static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { { .irq = 40, }, }; -static struct omap_hwmod_addr_space omap2420_timer4_addrs[] = { - { - .pa_start = 0x4807a000, - .pa_end = 0x4807a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer4 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer4_hwmod, .clk = "gpt4_ick", - .addr = omap2420_timer4_addrs, + .addr = omap2xxx_timer4_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -564,21 +472,12 @@ static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { { .irq = 41, }, }; -static struct omap_hwmod_addr_space omap2420_timer5_addrs[] = { - { - .pa_start = 0x4807c000, - .pa_end = 0x4807c000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer5 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer5_hwmod, .clk = "gpt5_ick", - .addr = omap2420_timer5_addrs, + .addr = omap2xxx_timer5_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -615,21 +514,12 @@ static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { { .irq = 42, }, }; -static struct omap_hwmod_addr_space omap2420_timer6_addrs[] = { - { - .pa_start = 0x4807e000, - .pa_end = 0x4807e000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer6 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer6_hwmod, .clk = "gpt6_ick", - .addr = omap2420_timer6_addrs, + .addr = omap2xxx_timer6_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -665,21 +555,12 @@ static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { { .irq = 43, }, }; -static struct omap_hwmod_addr_space omap2420_timer7_addrs[] = { - { - .pa_start = 0x48080000, - .pa_end = 0x48080000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer7 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer7_hwmod, .clk = "gpt7_ick", - .addr = omap2420_timer7_addrs, + .addr = omap2xxx_timer7_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -715,21 +596,12 @@ static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { { .irq = 44, }, }; -static struct omap_hwmod_addr_space omap2420_timer8_addrs[] = { - { - .pa_start = 0x48082000, - .pa_end = 0x48082000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer8 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer8_hwmod, .clk = "gpt8_ick", - .addr = omap2420_timer8_addrs, + .addr = omap2xxx_timer8_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -765,21 +637,12 @@ static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { { .irq = 45, }, }; -static struct omap_hwmod_addr_space omap2420_timer9_addrs[] = { - { - .pa_start = 0x48084000, - .pa_end = 0x48084000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer9 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer9_hwmod, .clk = "gpt9_ick", - .addr = omap2420_timer9_addrs, + .addr = omap2xxx_timer9_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -815,21 +678,12 @@ static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { { .irq = 46, }, }; -static struct omap_hwmod_addr_space omap2420_timer10_addrs[] = { - { - .pa_start = 0x48086000, - .pa_end = 0x48086000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer10 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer10_hwmod, .clk = "gpt10_ick", - .addr = omap2420_timer10_addrs, + .addr = omap2_timer10_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -865,21 +719,12 @@ static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { { .irq = 47, }, }; -static struct omap_hwmod_addr_space omap2420_timer11_addrs[] = { - { - .pa_start = 0x48088000, - .pa_end = 0x48088000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer11 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer11_hwmod, .clk = "gpt11_ick", - .addr = omap2420_timer11_addrs, + .addr = omap2_timer11_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -915,21 +760,12 @@ static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { { .irq = 48, }, }; -static struct omap_hwmod_addr_space omap2420_timer12_addrs[] = { - { - .pa_start = 0x4808a000, - .pa_end = 0x4808a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer12 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer12_hwmod, .clk = "gpt12_ick", - .addr = omap2420_timer12_addrs, + .addr = omap2xxx_timer12_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1178,21 +1014,12 @@ static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { &omap2420_dss__l3, }; -static struct omap_hwmod_addr_space omap2420_dss_addrs[] = { - { - .pa_start = 0x48050000, - .pa_end = 0x480503FF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_dss_core_hwmod, .clk = "dss_ick", - .addr = omap2420_dss_addrs, + .addr = omap2_dss_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, @@ -1262,21 +1089,12 @@ static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { { .irq = 25 }, }; -static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = { - { - .pa_start = 0x48050400, - .pa_end = 0x480507FF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_dss_dispc_hwmod, .clk = "dss_ick", - .addr = omap2420_dss_dispc_addrs, + .addr = omap2_dss_dispc_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, @@ -1332,21 +1150,12 @@ static struct omap_hwmod_class omap2420_rfbi_hwmod_class = { .sysc = &omap2420_rfbi_sysc, }; -static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = { - { - .pa_start = 0x48050800, - .pa_end = 0x48050BFF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_rfbi */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_dss_rfbi_hwmod, .clk = "dss_ick", - .addr = omap2420_dss_rfbi_addrs, + .addr = omap2_dss_rfbi_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, @@ -1387,22 +1196,12 @@ static struct omap_hwmod_class omap2420_venc_hwmod_class = { .name = "venc", }; -/* dss_venc */ -static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = { - { - .pa_start = 0x48050C00, - .pa_end = 0x48050FFF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_venc */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_dss_venc_hwmod, .clk = "dss_54m_fck", - .addr = omap2420_dss_venc_addrs, + .addr = omap2_dss_venc_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION, @@ -1783,15 +1582,6 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ }; -static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = { - { - .pa_start = 0x48056000, - .pa_end = 0x48056fff, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* dma_system -> L3 */ static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { .master = &omap2420_dma_system_hwmod, @@ -1810,7 +1600,7 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_dma_system_hwmod, .clk = "sdma_ick", - .addr = omap2420_dma_system_addrs, + .addr = omap2_dma_system_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1862,20 +1652,11 @@ static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { { .name = "iva", .irq = 34 }, }; -static struct omap_hwmod_addr_space omap2420_mailbox_addrs[] = { - { - .pa_start = 0x48094000, - .pa_end = 0x480941ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - /* l4_core -> mailbox */ static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mailbox_hwmod, - .addr = omap2420_mailbox_addrs, + .addr = omap2_mailbox_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2037,22 +1818,12 @@ static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { { .name = "tx", .dma_req = 31 }, }; -static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = { - { - .name = "mpu", - .pa_start = 0x48074000, - .pa_end = 0x480740ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> mcbsp1 */ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mcbsp1_hwmod, .clk = "mcbsp1_ick", - .addr = omap2420_mcbsp1_addrs, + .addr = omap2_mcbsp1_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2094,22 +1865,12 @@ static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { { .name = "tx", .dma_req = 33 }, }; -static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = { - { - .name = "mpu", - .pa_start = 0x48076000, - .pa_end = 0x480760ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> mcbsp2 */ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mcbsp2_hwmod, .clk = "mcbsp2_ick", - .addr = omap2420_mcbsp2_addrs, + .addr = omap2xxx_mcbsp2_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index da287947cc18..9531ef2802f2 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -131,42 +131,21 @@ static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = { .user = OCP_USER_MPU, }; -/* I2C IP block address space length (in bytes) */ -#define OMAP2_I2C_AS_LEN 128 - /* L4 CORE -> I2C1 interface */ -static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = { - { - .pa_start = 0x48070000, - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_i2c1_hwmod, .clk = "i2c1_ick", - .addr = omap2430_i2c1_addr_space, + .addr = omap2_i2c1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 CORE -> I2C2 interface */ -static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = { - { - .pa_start = 0x48072000, - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_i2c2_hwmod, .clk = "i2c2_ick", - .addr = omap2430_i2c2_addr_space, + .addr = omap2_i2c2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -178,56 +157,29 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = { }; /* L4 CORE -> UART1 interface */ -static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = { - { - .pa_start = OMAP2_UART1_BASE, - .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_uart1_hwmod, .clk = "uart1_ick", - .addr = omap2430_uart1_addr_space, + .addr = omap2xxx_uart1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 CORE -> UART2 interface */ -static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = { - { - .pa_start = OMAP2_UART2_BASE, - .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_uart2_hwmod, .clk = "uart2_ick", - .addr = omap2430_uart2_addr_space, + .addr = omap2xxx_uart2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 PER -> UART3 interface */ -static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = { - { - .pa_start = OMAP2_UART3_BASE, - .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_uart3_hwmod, .clk = "uart3_ick", - .addr = omap2430_uart3_addr_space, + .addr = omap2xxx_uart3_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -260,15 +212,6 @@ static struct omap_hwmod_ocp_if *omap2430_usbhsotg_slaves[] = { }; /* L4 CORE -> MMC1 interface */ -static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { - { - .pa_start = 0x4809c000, - .pa_end = 0x4809c1ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mmc1_hwmod, @@ -278,15 +221,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { }; /* L4 CORE -> MMC2 interface */ -static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { - { - .pa_start = 0x480b4000, - .pa_end = 0x480b41ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mmc2_hwmod, @@ -332,51 +266,24 @@ static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { }; /* l4 core -> mcspi1 interface */ -static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = { - { - .pa_start = 0x48098000, - .pa_end = 0x480980ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mcspi1_hwmod, .clk = "mcspi1_ick", - .addr = omap2430_mcspi1_addr_space, + .addr = omap2_mcspi1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi2 interface */ -static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = { - { - .pa_start = 0x4809a000, - .pa_end = 0x4809a0ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mcspi2_hwmod, .clk = "mcspi2_ick", - .addr = omap2430_mcspi2_addr_space, + .addr = omap2_mcspi2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi3 interface */ -static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { - { - .pa_start = 0x480b8000, - .pa_end = 0x480b80ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mcspi3_hwmod, @@ -514,21 +421,12 @@ static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { { .irq = 38, }, }; -static struct omap_hwmod_addr_space omap2430_timer2_addrs[] = { - { - .pa_start = 0x4802a000, - .pa_end = 0x4802a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer2 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer2_hwmod, .clk = "gpt2_ick", - .addr = omap2430_timer2_addrs, + .addr = omap2xxx_timer2_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -564,21 +462,12 @@ static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { { .irq = 39, }, }; -static struct omap_hwmod_addr_space omap2430_timer3_addrs[] = { - { - .pa_start = 0x48078000, - .pa_end = 0x48078000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer3 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer3_hwmod, .clk = "gpt3_ick", - .addr = omap2430_timer3_addrs, + .addr = omap2xxx_timer3_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -614,21 +503,12 @@ static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { { .irq = 40, }, }; -static struct omap_hwmod_addr_space omap2430_timer4_addrs[] = { - { - .pa_start = 0x4807a000, - .pa_end = 0x4807a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer4 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer4_hwmod, .clk = "gpt4_ick", - .addr = omap2430_timer4_addrs, + .addr = omap2xxx_timer4_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -664,21 +544,12 @@ static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { { .irq = 41, }, }; -static struct omap_hwmod_addr_space omap2430_timer5_addrs[] = { - { - .pa_start = 0x4807c000, - .pa_end = 0x4807c000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer5 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer5_hwmod, .clk = "gpt5_ick", - .addr = omap2430_timer5_addrs, + .addr = omap2xxx_timer5_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -714,21 +585,12 @@ static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { { .irq = 42, }, }; -static struct omap_hwmod_addr_space omap2430_timer6_addrs[] = { - { - .pa_start = 0x4807e000, - .pa_end = 0x4807e000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer6 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer6_hwmod, .clk = "gpt6_ick", - .addr = omap2430_timer6_addrs, + .addr = omap2xxx_timer6_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -764,21 +626,12 @@ static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { { .irq = 43, }, }; -static struct omap_hwmod_addr_space omap2430_timer7_addrs[] = { - { - .pa_start = 0x48080000, - .pa_end = 0x48080000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer7 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer7_hwmod, .clk = "gpt7_ick", - .addr = omap2430_timer7_addrs, + .addr = omap2xxx_timer7_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -814,21 +667,12 @@ static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { { .irq = 44, }, }; -static struct omap_hwmod_addr_space omap2430_timer8_addrs[] = { - { - .pa_start = 0x48082000, - .pa_end = 0x48082000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer8 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer8_hwmod, .clk = "gpt8_ick", - .addr = omap2430_timer8_addrs, + .addr = omap2xxx_timer8_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -864,21 +708,12 @@ static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { { .irq = 45, }, }; -static struct omap_hwmod_addr_space omap2430_timer9_addrs[] = { - { - .pa_start = 0x48084000, - .pa_end = 0x48084000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer9 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer9_hwmod, .clk = "gpt9_ick", - .addr = omap2430_timer9_addrs, + .addr = omap2xxx_timer9_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -914,21 +749,12 @@ static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { { .irq = 46, }, }; -static struct omap_hwmod_addr_space omap2430_timer10_addrs[] = { - { - .pa_start = 0x48086000, - .pa_end = 0x48086000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer10 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer10_hwmod, .clk = "gpt10_ick", - .addr = omap2430_timer10_addrs, + .addr = omap2_timer10_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -964,21 +790,12 @@ static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { { .irq = 47, }, }; -static struct omap_hwmod_addr_space omap2430_timer11_addrs[] = { - { - .pa_start = 0x48088000, - .pa_end = 0x48088000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer11 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer11_hwmod, .clk = "gpt11_ick", - .addr = omap2430_timer11_addrs, + .addr = omap2_timer11_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1014,21 +831,12 @@ static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { { .irq = 48, }, }; -static struct omap_hwmod_addr_space omap2430_timer12_addrs[] = { - { - .pa_start = 0x4808a000, - .pa_end = 0x4808a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer12 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer12_hwmod, .clk = "gpt12_ick", - .addr = omap2430_timer12_addrs, + .addr = omap2xxx_timer12_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1277,21 +1085,12 @@ static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = { &omap2430_dss__l3, }; -static struct omap_hwmod_addr_space omap2430_dss_addrs[] = { - { - .pa_start = 0x48050000, - .pa_end = 0x480503FF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss */ static struct omap_hwmod_ocp_if omap2430_l4_core__dss = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_dss_core_hwmod, .clk = "dss_ick", - .addr = omap2430_dss_addrs, + .addr = omap2_dss_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1355,21 +1154,12 @@ static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { { .irq = 25 }, }; -static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = { - { - .pa_start = 0x48050400, - .pa_end = 0x480507FF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_dss_dispc_hwmod, .clk = "dss_ick", - .addr = omap2430_dss_dispc_addrs, + .addr = omap2_dss_dispc_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1419,21 +1209,12 @@ static struct omap_hwmod_class omap2430_rfbi_hwmod_class = { .sysc = &omap2430_rfbi_sysc, }; -static struct omap_hwmod_addr_space omap2430_dss_rfbi_addrs[] = { - { - .pa_start = 0x48050800, - .pa_end = 0x48050BFF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_rfbi */ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_dss_rfbi_hwmod, .clk = "dss_ick", - .addr = omap2430_dss_rfbi_addrs, + .addr = omap2_dss_rfbi_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1468,22 +1249,12 @@ static struct omap_hwmod_class omap2430_venc_hwmod_class = { .name = "venc", }; -/* dss_venc */ -static struct omap_hwmod_addr_space omap2430_dss_venc_addrs[] = { - { - .pa_start = 0x48050C00, - .pa_end = 0x48050FFF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_venc */ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_dss_venc_hwmod, .clk = "dss_54m_fck", - .addr = omap2430_dss_venc_addrs, + .addr = omap2_dss_venc_addrs, .flags = OCPIF_SWSUP_IDLE, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1916,15 +1687,6 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ }; -static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { - { - .pa_start = 0x48056000, - .pa_end = 0x48056fff, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* dma_system -> L3 */ static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { .master = &omap2430_dma_system_hwmod, @@ -1943,7 +1705,7 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_dma_system_hwmod, .clk = "sdma_ick", - .addr = omap2430_dma_system_addrs, + .addr = omap2_dma_system_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1994,20 +1756,11 @@ static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { { .irq = 26 }, }; -static struct omap_hwmod_addr_space omap2430_mailbox_addrs[] = { - { - .pa_start = 0x48094000, - .pa_end = 0x480941ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - /* l4_core -> mailbox */ static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mailbox_hwmod, - .addr = omap2430_mailbox_addrs, + .addr = omap2_mailbox_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2279,22 +2032,12 @@ static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { { .name = "tx", .dma_req = 31 }, }; -static struct omap_hwmod_addr_space omap2430_mcbsp1_addrs[] = { - { - .name = "mpu", - .pa_start = 0x48074000, - .pa_end = 0x480740ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> mcbsp1 */ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mcbsp1_hwmod, .clk = "mcbsp1_ick", - .addr = omap2430_mcbsp1_addrs, + .addr = omap2_mcbsp1_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2337,22 +2080,12 @@ static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { { .name = "tx", .dma_req = 33 }, }; -static struct omap_hwmod_addr_space omap2430_mcbsp2_addrs[] = { - { - .name = "mpu", - .pa_start = 0x48076000, - .pa_end = 0x480760ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> mcbsp2 */ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mcbsp2_hwmod, .clk = "mcbsp2_ick", - .addr = omap2430_mcbsp2_addrs, + .addr = omap2xxx_mcbsp2_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c new file mode 100644 index 000000000000..04637fabadd2 --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c @@ -0,0 +1,173 @@ +/* + * omap_hwmod_2xxx_3xxx_interconnect_data.c - common interconnect data, OMAP2/3 + * + * Copyright (C) 2009-2011 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * XXX handle crossbar/shared link difference for L3? + * XXX these should be marked initdata for multi-OMAP kernels + */ +#include + +#include +#include + +#include "omap_hwmod_common_data.h" + +struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { + { + .pa_start = 0x4809c000, + .pa_end = 0x4809c1ff, + .flags = ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { + { + .pa_start = 0x480b4000, + .pa_end = 0x480b41ff, + .flags = ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2_i2c1_addr_space[] = { + { + .pa_start = 0x48070000, + .pa_end = 0x48070000 + SZ_128 - 1, + .flags = ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2_i2c2_addr_space[] = { + { + .pa_start = 0x48072000, + .pa_end = 0x48072000 + SZ_128 - 1, + .flags = ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2_dss_addrs[] = { + { + .pa_start = 0x48050000, + .pa_end = 0x48050000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2_dss_dispc_addrs[] = { + { + .pa_start = 0x48050400, + .pa_end = 0x48050400 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[] = { + { + .pa_start = 0x48050800, + .pa_end = 0x48050800 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2_dss_venc_addrs[] = { + { + .pa_start = 0x48050C00, + .pa_end = 0x48050C00 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2_timer10_addrs[] = { + { + .pa_start = 0x48086000, + .pa_end = 0x48086000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2_timer11_addrs[] = { + { + .pa_start = 0x48088000, + .pa_end = 0x48088000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer12_addrs[] = { + { + .pa_start = 0x4808a000, + .pa_end = 0x4808a000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2_mcspi1_addr_space[] = { + { + .pa_start = 0x48098000, + .pa_end = 0x48098000 + SZ_256 - 1, + .flags = ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2_mcspi2_addr_space[] = { + { + .pa_start = 0x4809a000, + .pa_end = 0x4809a000 + SZ_256 - 1, + .flags = ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { + { + .pa_start = 0x480b8000, + .pa_end = 0x480b8000 + SZ_256 - 1, + .flags = ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2_dma_system_addrs[] = { + { + .pa_start = 0x48056000, + .pa_end = 0x48056000 + SZ_4K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2_mailbox_addrs[] = { + { + .pa_start = 0x48094000, + .pa_end = 0x48094000 + SZ_512 - 1, + .flags = ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = { + { + .name = "mpu", + .pa_start = 0x48074000, + .pa_end = 0x480740ff, + .flags = ADDR_TYPE_RT + }, + { } +}; diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c new file mode 100644 index 000000000000..4f3547c2a49e --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c @@ -0,0 +1,130 @@ +/* + * omap_hwmod_2xxx_interconnect_data.c - common interconnect data for OMAP2xxx + * + * Copyright (C) 2009-2011 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * XXX handle crossbar/shared link difference for L3? + * XXX these should be marked initdata for multi-OMAP kernels + */ +#include + +#include +#include + +#include "omap_hwmod_common_data.h" + +struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = { + { + .pa_start = OMAP2_UART1_BASE, + .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, + .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = { + { + .pa_start = OMAP2_UART2_BASE, + .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, + .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = { + { + .pa_start = OMAP2_UART3_BASE, + .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, + .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = { + { + .pa_start = 0x4802a000, + .pa_end = 0x4802a000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = { + { + .pa_start = 0x48078000, + .pa_end = 0x48078000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = { + { + .pa_start = 0x4807a000, + .pa_end = 0x4807a000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = { + { + .pa_start = 0x4807c000, + .pa_end = 0x4807c000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = { + { + .pa_start = 0x4807e000, + .pa_end = 0x4807e000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = { + { + .pa_start = 0x48080000, + .pa_end = 0x48080000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = { + { + .pa_start = 0x48082000, + .pa_end = 0x48082000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = { + { + .pa_start = 0x48084000, + .pa_end = 0x48084000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[] = { + { + .name = "mpu", + .pa_start = 0x48076000, + .pa_end = 0x480760ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + + diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 64107795f1ae..791f9b290e81 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -190,39 +190,21 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = { }; /* L4 CORE -> MMC1 interface */ -static struct omap_hwmod_addr_space omap3xxx_mmc1_addr_space[] = { - { - .pa_start = 0x4809c000, - .pa_end = 0x4809c1ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_mmc1_hwmod, .clk = "mmchs1_ick", - .addr = omap3xxx_mmc1_addr_space, + .addr = omap2430_mmc1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, .flags = OMAP_FIREWALL_L4 }; /* L4 CORE -> MMC2 interface */ -static struct omap_hwmod_addr_space omap3xxx_mmc2_addr_space[] = { - { - .pa_start = 0x480b4000, - .pa_end = 0x480b41ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_mmc2_hwmod, .clk = "mmchs2_ick", - .addr = omap3xxx_mmc2_addr_space, + .addr = omap2430_mmc2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, .flags = OMAP_FIREWALL_L4 }; @@ -318,24 +300,12 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* I2C IP block address space length (in bytes) */ -#define OMAP2_I2C_AS_LEN 128 - /* L4 CORE -> I2C1 interface */ -static struct omap_hwmod_addr_space omap3xxx_i2c1_addr_space[] = { - { - .pa_start = 0x48070000, - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_i2c1_hwmod, .clk = "i2c1_ick", - .addr = omap3xxx_i2c1_addr_space, + .addr = omap2_i2c1_addr_space, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_I2C1_REGION, @@ -347,20 +317,11 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { }; /* L4 CORE -> I2C2 interface */ -static struct omap_hwmod_addr_space omap3xxx_i2c2_addr_space[] = { - { - .pa_start = 0x48072000, - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_i2c2_hwmod, .clk = "i2c2_ick", - .addr = omap3xxx_i2c2_addr_space, + .addr = omap2_i2c2_addr_space, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_I2C2_REGION, @@ -375,7 +336,7 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = { { .pa_start = 0x48060000, - .pa_end = 0x48060000 + OMAP2_I2C_AS_LEN - 1, + .pa_end = 0x48060000 + SZ_128 - 1, .flags = ADDR_TYPE_RT, }, { } @@ -1065,21 +1026,12 @@ static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { { .irq = 46, }, }; -static struct omap_hwmod_addr_space omap3xxx_timer10_addrs[] = { - { - .pa_start = 0x48086000, - .pa_end = 0x48086000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer10 */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_timer10_hwmod, .clk = "gpt10_ick", - .addr = omap3xxx_timer10_addrs, + .addr = omap2_timer10_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1115,21 +1067,12 @@ static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { { .irq = 47, }, }; -static struct omap_hwmod_addr_space omap3xxx_timer11_addrs[] = { - { - .pa_start = 0x48088000, - .pa_end = 0x48088000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer11 */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_timer11_hwmod, .clk = "gpt11_ick", - .addr = omap3xxx_timer11_addrs, + .addr = omap2_timer11_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1491,21 +1434,12 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_masters[] = { &omap3xxx_dss__l3, }; -static struct omap_hwmod_addr_space omap3xxx_dss_addrs[] = { - { - .pa_start = 0x48050000, - .pa_end = 0x480503FF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss */ static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3430es1_dss_core_hwmod, .clk = "dss_ick", - .addr = omap3xxx_dss_addrs, + .addr = omap2_dss_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION, @@ -1520,7 +1454,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_dss_core_hwmod, .clk = "dss_ick", - .addr = omap3xxx_dss_addrs, + .addr = omap2_dss_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_CORE_REGION, @@ -1625,21 +1559,12 @@ static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { { .irq = 25 }, }; -static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = { - { - .pa_start = 0x48050400, - .pa_end = 0x480507FF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_dss_dispc_hwmod, .clk = "dss_ick", - .addr = omap3xxx_dss_dispc_addrs, + .addr = omap2_dss_dispc_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DISPC_REGION, @@ -1760,21 +1685,12 @@ static struct omap_hwmod_class omap3xxx_rfbi_hwmod_class = { .sysc = &omap3xxx_rfbi_sysc, }; -static struct omap_hwmod_addr_space omap3xxx_dss_rfbi_addrs[] = { - { - .pa_start = 0x48050800, - .pa_end = 0x48050BFF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_rfbi */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_dss_rfbi_hwmod, .clk = "dss_ick", - .addr = omap3xxx_dss_rfbi_addrs, + .addr = omap2_dss_rfbi_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_RFBI_REGION, @@ -1818,22 +1734,12 @@ static struct omap_hwmod_class omap3xxx_venc_hwmod_class = { .name = "venc", }; -/* dss_venc */ -static struct omap_hwmod_addr_space omap3xxx_dss_venc_addrs[] = { - { - .pa_start = 0x48050C00, - .pa_end = 0x48050FFF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_venc */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_dss_venc_hwmod, .clk = "dss_tv_fck", - .addr = omap3xxx_dss_venc_addrs, + .addr = omap2_dss_venc_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_VENC_REGION, @@ -3070,56 +2976,29 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = { }; /* l4 core -> mcspi1 interface */ -static struct omap_hwmod_addr_space omap34xx_mcspi1_addr_space[] = { - { - .pa_start = 0x48098000, - .pa_end = 0x480980ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap34xx_mcspi1, .clk = "mcspi1_ick", - .addr = omap34xx_mcspi1_addr_space, + .addr = omap2_mcspi1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi2 interface */ -static struct omap_hwmod_addr_space omap34xx_mcspi2_addr_space[] = { - { - .pa_start = 0x4809a000, - .pa_end = 0x4809a0ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap34xx_mcspi2, .clk = "mcspi2_ick", - .addr = omap34xx_mcspi2_addr_space, + .addr = omap2_mcspi2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi3 interface */ -static struct omap_hwmod_addr_space omap34xx_mcspi3_addr_space[] = { - { - .pa_start = 0x480b8000, - .pa_end = 0x480b80ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap34xx_mcspi3, .clk = "mcspi3_ick", - .addr = omap34xx_mcspi3_addr_space, + .addr = omap2430_mcspi3_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index c34e98bf1242..76a2f11e5f4e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h @@ -1,10 +1,10 @@ /* * omap_hwmod_common_data.h - OMAP hwmod common macros and declarations * - * Copyright (C) 2010 Nokia Corporation + * Copyright (C) 2010-2011 Nokia Corporation * Paul Walmsley * - * Copyright (C) 2010 Texas Instruments, Inc. + * Copyright (C) 2010-2011 Texas Instruments, Inc. * Benoît Cousson * * This program is free software; you can redistribute it and/or modify @@ -16,10 +16,44 @@ #include +/* Common address space across OMAP2xxx */ +extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[]; +extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[]; +extern struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[]; +extern struct omap_hwmod_addr_space omap2xxx_timer2_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_timer3_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_timer4_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_timer5_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_timer6_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_timer7_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_timer8_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_timer9_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_timer12_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[]; + +/* Common address space across OMAP2xxx/3xxx */ +extern struct omap_hwmod_addr_space omap2_i2c1_addr_space[]; +extern struct omap_hwmod_addr_space omap2_i2c2_addr_space[]; +extern struct omap_hwmod_addr_space omap2_dss_addrs[]; +extern struct omap_hwmod_addr_space omap2_dss_dispc_addrs[]; +extern struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[]; +extern struct omap_hwmod_addr_space omap2_dss_venc_addrs[]; +extern struct omap_hwmod_addr_space omap2_timer10_addrs[]; +extern struct omap_hwmod_addr_space omap2_timer11_addrs[]; +extern struct omap_hwmod_addr_space omap2430_mmc1_addr_space[]; +extern struct omap_hwmod_addr_space omap2430_mmc2_addr_space[]; +extern struct omap_hwmod_addr_space omap2_mcspi1_addr_space[]; +extern struct omap_hwmod_addr_space omap2_mcspi2_addr_space[]; +extern struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[]; +extern struct omap_hwmod_addr_space omap2_dma_system_addrs[]; +extern struct omap_hwmod_addr_space omap2_mailbox_addrs[]; +extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; + /* OMAP hwmod classes - forward declarations */ extern struct omap_hwmod_class l3_hwmod_class; extern struct omap_hwmod_class l4_hwmod_class; extern struct omap_hwmod_class mpu_hwmod_class; extern struct omap_hwmod_class iva_hwmod_class; + #endif From 212738a4499d278254ed6fdb400e3b4be4cb1de2 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:06 -0600 Subject: [PATCH 19/56] omap_hwmod: use a terminator record with omap_hwmod_mpu_irqs arrays Previously, struct omap_hwmod_mpu_irqs arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_mpu_irqs arrays and uses a sentinel value (irq == -1) as the array terminator instead. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 30 ++++- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 56 ++++---- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 72 +++++------ arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 92 +++++++------- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 127 ++++++++++--------- arch/arm/plat-omap/include/plat/omap_hwmod.h | 8 +- 6 files changed, 205 insertions(+), 180 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 77094d75367f..21e3eb8e83c1 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -678,6 +678,29 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) } } +/** + * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh + * @oh: struct omap_hwmod *oh + * + * Count and return the number of MPU IRQs associated with the hwmod + * @oh. Used to allocate struct resource data. Returns 0 if @oh is + * NULL. + */ +static int _count_mpu_irqs(struct omap_hwmod *oh) +{ + struct omap_hwmod_irq_info *ohii; + int i = 0; + + if (!oh || !oh->mpu_irqs) + return 0; + + do { + ohii = &oh->mpu_irqs[i++]; + } while (ohii->irq != -1); + + return i; +} + /** * _count_ocp_if_addr_spaces - count the number of address space entries for @oh * @oh: struct omap_hwmod *oh @@ -1964,7 +1987,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) { int ret, i; - ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt; + ret = _count_mpu_irqs(oh) + oh->sdma_reqs_cnt; for (i = 0; i < oh->slaves_cnt; i++) ret += _count_ocp_if_addr_spaces(oh->slaves[i]); @@ -1984,12 +2007,13 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) */ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) { - int i, j; + int i, j, mpu_irqs_cnt; int r = 0; /* For each IRQ, DMA, memory area, fill in array.*/ - for (i = 0; i < oh->mpu_irqs_cnt; i++) { + mpu_irqs_cnt = _count_mpu_irqs(oh); + for (i = 0; i < mpu_irqs_cnt; i++) { (res + r)->name = (oh->mpu_irqs + i)->name; (res + r)->start = (oh->mpu_irqs + i)->irq; (res + r)->end = (oh->mpu_irqs + i)->irq; diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 3ec625c40c1f..04730d33ba5c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -296,6 +296,7 @@ static struct omap_hwmod_class omap2420_timer_hwmod_class = { static struct omap_hwmod omap2420_timer1_hwmod; static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = { { .irq = 37, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { @@ -325,7 +326,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = { static struct omap_hwmod omap2420_timer1_hwmod = { .name = "timer1", .mpu_irqs = omap2420_timer1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer1_mpu_irqs), .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -346,6 +346,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = { static struct omap_hwmod omap2420_timer2_hwmod; static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { { .irq = 38, }, + { .irq = -1 } }; @@ -367,7 +368,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = { static struct omap_hwmod omap2420_timer2_hwmod = { .name = "timer2", .mpu_irqs = omap2420_timer2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer2_mpu_irqs), .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -388,6 +388,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = { static struct omap_hwmod omap2420_timer3_hwmod; static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { { .irq = 39, }, + { .irq = -1 } }; /* l4_core -> timer3 */ @@ -408,7 +409,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = { static struct omap_hwmod omap2420_timer3_hwmod = { .name = "timer3", .mpu_irqs = omap2420_timer3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer3_mpu_irqs), .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -429,6 +429,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = { static struct omap_hwmod omap2420_timer4_hwmod; static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { { .irq = 40, }, + { .irq = -1 } }; /* l4_core -> timer4 */ @@ -449,7 +450,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = { static struct omap_hwmod omap2420_timer4_hwmod = { .name = "timer4", .mpu_irqs = omap2420_timer4_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer4_mpu_irqs), .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -470,6 +470,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = { static struct omap_hwmod omap2420_timer5_hwmod; static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { { .irq = 41, }, + { .irq = -1 } }; /* l4_core -> timer5 */ @@ -490,7 +491,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = { static struct omap_hwmod omap2420_timer5_hwmod = { .name = "timer5", .mpu_irqs = omap2420_timer5_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer5_mpu_irqs), .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -512,6 +512,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = { static struct omap_hwmod omap2420_timer6_hwmod; static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { { .irq = 42, }, + { .irq = -1 } }; /* l4_core -> timer6 */ @@ -532,7 +533,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = { static struct omap_hwmod omap2420_timer6_hwmod = { .name = "timer6", .mpu_irqs = omap2420_timer6_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer6_mpu_irqs), .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -553,6 +553,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = { static struct omap_hwmod omap2420_timer7_hwmod; static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { { .irq = 43, }, + { .irq = -1 } }; /* l4_core -> timer7 */ @@ -573,7 +574,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = { static struct omap_hwmod omap2420_timer7_hwmod = { .name = "timer7", .mpu_irqs = omap2420_timer7_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer7_mpu_irqs), .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -594,6 +594,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = { static struct omap_hwmod omap2420_timer8_hwmod; static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { { .irq = 44, }, + { .irq = -1 } }; /* l4_core -> timer8 */ @@ -614,7 +615,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = { static struct omap_hwmod omap2420_timer8_hwmod = { .name = "timer8", .mpu_irqs = omap2420_timer8_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer8_mpu_irqs), .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -635,6 +635,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = { static struct omap_hwmod omap2420_timer9_hwmod; static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { { .irq = 45, }, + { .irq = -1 } }; /* l4_core -> timer9 */ @@ -655,7 +656,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = { static struct omap_hwmod omap2420_timer9_hwmod = { .name = "timer9", .mpu_irqs = omap2420_timer9_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer9_mpu_irqs), .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -676,6 +676,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = { static struct omap_hwmod omap2420_timer10_hwmod; static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { { .irq = 46, }, + { .irq = -1 } }; /* l4_core -> timer10 */ @@ -696,7 +697,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = { static struct omap_hwmod omap2420_timer10_hwmod = { .name = "timer10", .mpu_irqs = omap2420_timer10_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer10_mpu_irqs), .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -717,6 +717,7 @@ static struct omap_hwmod omap2420_timer10_hwmod = { static struct omap_hwmod omap2420_timer11_hwmod; static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { { .irq = 47, }, + { .irq = -1 } }; /* l4_core -> timer11 */ @@ -737,7 +738,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = { static struct omap_hwmod omap2420_timer11_hwmod = { .name = "timer11", .mpu_irqs = omap2420_timer11_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer11_mpu_irqs), .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -758,6 +758,7 @@ static struct omap_hwmod omap2420_timer11_hwmod = { static struct omap_hwmod omap2420_timer12_hwmod; static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { { .irq = 48, }, + { .irq = -1 } }; /* l4_core -> timer12 */ @@ -778,7 +779,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = { static struct omap_hwmod omap2420_timer12_hwmod = { .name = "timer12", .mpu_irqs = omap2420_timer12_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer12_mpu_irqs), .main_clk = "gpt12_fck", .prcm = { .omap2 = { @@ -879,6 +879,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { { .irq = INT_24XX_UART1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { @@ -893,7 +894,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { static struct omap_hwmod omap2420_uart1_hwmod = { .name = "uart1", .mpu_irqs = uart1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), .sdma_reqs = uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -916,6 +916,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = { static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { { .irq = INT_24XX_UART2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { @@ -930,7 +931,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { static struct omap_hwmod omap2420_uart2_hwmod = { .name = "uart2", .mpu_irqs = uart2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), .sdma_reqs = uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -953,6 +953,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = { static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { { .irq = INT_24XX_UART3_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { @@ -967,7 +968,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { static struct omap_hwmod omap2420_uart3_hwmod = { .name = "uart3", .mpu_irqs = uart3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), .sdma_reqs = uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -1087,6 +1087,7 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = { static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { { .irq = 25 }, + { .irq = -1 } }; /* l4_core -> dss_dispc */ @@ -1113,7 +1114,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap2420_dispc_hwmod_class, .mpu_irqs = omap2420_dispc_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dispc_irqs), .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1254,6 +1254,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr; static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { { .irq = INT_24XX_I2C1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { @@ -1268,7 +1269,6 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { static struct omap_hwmod omap2420_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = i2c1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), .sdma_reqs = i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2c1_fck", @@ -1293,6 +1293,7 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { { .irq = INT_24XX_I2C2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { @@ -1307,7 +1308,6 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { static struct omap_hwmod omap2420_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = i2c2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), .sdma_reqs = i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2c2_fck", @@ -1430,6 +1430,7 @@ static struct omap_hwmod_class omap242x_gpio_hwmod_class = { /* gpio1 */ static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = { { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { @@ -1440,7 +1441,6 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap242x_gpio1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1461,6 +1461,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { /* gpio2 */ static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = { { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { @@ -1471,7 +1472,6 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap242x_gpio2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1492,6 +1492,7 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { /* gpio3 */ static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = { { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { @@ -1502,7 +1503,6 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap242x_gpio3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1523,6 +1523,7 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { /* gpio4 */ static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = { { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { @@ -1533,7 +1534,6 @@ static struct omap_hwmod omap2420_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap242x_gpio4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1580,6 +1580,7 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ + { .irq = -1 } }; /* dma_system -> L3 */ @@ -1613,7 +1614,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = { .name = "dma", .class = &omap2420_dma_hwmod_class, .mpu_irqs = omap2420_dma_system_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dma_system_irqs), .main_clk = "core_l3_ck", .slaves = omap2420_dma_system_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves), @@ -1650,6 +1650,7 @@ static struct omap_hwmod omap2420_mailbox_hwmod; static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { { .name = "dsp", .irq = 26 }, { .name = "iva", .irq = 34 }, + { .irq = -1 } }; /* l4_core -> mailbox */ @@ -1669,7 +1670,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = { .name = "mailbox", .class = &omap2420_mailbox_hwmod_class, .mpu_irqs = omap2420_mailbox_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mailbox_irqs), .main_clk = "mailboxes_ick", .prcm = { .omap2 = { @@ -1711,6 +1711,7 @@ static struct omap_hwmod_class omap2420_mcspi_class = { /* mcspi1 */ static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = { { .irq = 65 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { @@ -1735,7 +1736,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap2420_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2420_mcspi1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi1_mpu_irqs), .sdma_reqs = omap2420_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -1758,6 +1758,7 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { /* mcspi2 */ static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = { { .irq = 66 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { @@ -1778,7 +1779,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap2420_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2420_mcspi2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi2_mpu_irqs), .sdma_reqs = omap2420_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", @@ -1811,6 +1811,7 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = { static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { { .name = "tx", .irq = 59 }, { .name = "rx", .irq = 60 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { @@ -1836,7 +1837,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_irqs), .sdma_reqs = omap2420_mcbsp1_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", @@ -1858,6 +1858,7 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { { .name = "tx", .irq = 62 }, { .name = "rx", .irq = 63 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { @@ -1883,7 +1884,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_irqs), .sdma_reqs = omap2420_mcbsp2_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 9531ef2802f2..2c28468a37f8 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -369,6 +369,7 @@ static struct omap_hwmod_class omap2430_timer_hwmod_class = { static struct omap_hwmod omap2430_timer1_hwmod; static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = { { .irq = 37, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { @@ -398,7 +399,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = { static struct omap_hwmod omap2430_timer1_hwmod = { .name = "timer1", .mpu_irqs = omap2430_timer1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer1_mpu_irqs), .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -419,6 +419,7 @@ static struct omap_hwmod omap2430_timer1_hwmod = { static struct omap_hwmod omap2430_timer2_hwmod; static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { { .irq = 38, }, + { .irq = -1 } }; /* l4_core -> timer2 */ @@ -439,7 +440,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = { static struct omap_hwmod omap2430_timer2_hwmod = { .name = "timer2", .mpu_irqs = omap2430_timer2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer2_mpu_irqs), .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -460,6 +460,7 @@ static struct omap_hwmod omap2430_timer2_hwmod = { static struct omap_hwmod omap2430_timer3_hwmod; static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { { .irq = 39, }, + { .irq = -1 } }; /* l4_core -> timer3 */ @@ -480,7 +481,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = { static struct omap_hwmod omap2430_timer3_hwmod = { .name = "timer3", .mpu_irqs = omap2430_timer3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer3_mpu_irqs), .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -501,6 +501,7 @@ static struct omap_hwmod omap2430_timer3_hwmod = { static struct omap_hwmod omap2430_timer4_hwmod; static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { { .irq = 40, }, + { .irq = -1 } }; /* l4_core -> timer4 */ @@ -521,7 +522,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = { static struct omap_hwmod omap2430_timer4_hwmod = { .name = "timer4", .mpu_irqs = omap2430_timer4_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer4_mpu_irqs), .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -542,6 +542,7 @@ static struct omap_hwmod omap2430_timer4_hwmod = { static struct omap_hwmod omap2430_timer5_hwmod; static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { { .irq = 41, }, + { .irq = -1 } }; /* l4_core -> timer5 */ @@ -562,7 +563,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = { static struct omap_hwmod omap2430_timer5_hwmod = { .name = "timer5", .mpu_irqs = omap2430_timer5_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer5_mpu_irqs), .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -583,6 +583,7 @@ static struct omap_hwmod omap2430_timer5_hwmod = { static struct omap_hwmod omap2430_timer6_hwmod; static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { { .irq = 42, }, + { .irq = -1 } }; /* l4_core -> timer6 */ @@ -603,7 +604,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = { static struct omap_hwmod omap2430_timer6_hwmod = { .name = "timer6", .mpu_irqs = omap2430_timer6_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer6_mpu_irqs), .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -624,6 +624,7 @@ static struct omap_hwmod omap2430_timer6_hwmod = { static struct omap_hwmod omap2430_timer7_hwmod; static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { { .irq = 43, }, + { .irq = -1 } }; /* l4_core -> timer7 */ @@ -644,7 +645,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = { static struct omap_hwmod omap2430_timer7_hwmod = { .name = "timer7", .mpu_irqs = omap2430_timer7_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer7_mpu_irqs), .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -665,6 +665,7 @@ static struct omap_hwmod omap2430_timer7_hwmod = { static struct omap_hwmod omap2430_timer8_hwmod; static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { { .irq = 44, }, + { .irq = -1 } }; /* l4_core -> timer8 */ @@ -685,7 +686,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = { static struct omap_hwmod omap2430_timer8_hwmod = { .name = "timer8", .mpu_irqs = omap2430_timer8_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer8_mpu_irqs), .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -706,6 +706,7 @@ static struct omap_hwmod omap2430_timer8_hwmod = { static struct omap_hwmod omap2430_timer9_hwmod; static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { { .irq = 45, }, + { .irq = -1 } }; /* l4_core -> timer9 */ @@ -726,7 +727,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = { static struct omap_hwmod omap2430_timer9_hwmod = { .name = "timer9", .mpu_irqs = omap2430_timer9_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer9_mpu_irqs), .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -747,6 +747,7 @@ static struct omap_hwmod omap2430_timer9_hwmod = { static struct omap_hwmod omap2430_timer10_hwmod; static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { { .irq = 46, }, + { .irq = -1 } }; /* l4_core -> timer10 */ @@ -767,7 +768,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = { static struct omap_hwmod omap2430_timer10_hwmod = { .name = "timer10", .mpu_irqs = omap2430_timer10_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer10_mpu_irqs), .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -788,6 +788,7 @@ static struct omap_hwmod omap2430_timer10_hwmod = { static struct omap_hwmod omap2430_timer11_hwmod; static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { { .irq = 47, }, + { .irq = -1 } }; /* l4_core -> timer11 */ @@ -808,7 +809,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = { static struct omap_hwmod omap2430_timer11_hwmod = { .name = "timer11", .mpu_irqs = omap2430_timer11_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer11_mpu_irqs), .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -829,6 +829,7 @@ static struct omap_hwmod omap2430_timer11_hwmod = { static struct omap_hwmod omap2430_timer12_hwmod; static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { { .irq = 48, }, + { .irq = -1 } }; /* l4_core -> timer12 */ @@ -849,7 +850,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = { static struct omap_hwmod omap2430_timer12_hwmod = { .name = "timer12", .mpu_irqs = omap2430_timer12_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer12_mpu_irqs), .main_clk = "gpt12_fck", .prcm = { .omap2 = { @@ -950,6 +950,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { { .irq = INT_24XX_UART1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { @@ -964,7 +965,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { static struct omap_hwmod omap2430_uart1_hwmod = { .name = "uart1", .mpu_irqs = uart1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), .sdma_reqs = uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -987,6 +987,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = { static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { { .irq = INT_24XX_UART2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { @@ -1001,7 +1002,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { static struct omap_hwmod omap2430_uart2_hwmod = { .name = "uart2", .mpu_irqs = uart2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), .sdma_reqs = uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -1024,6 +1024,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = { static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { { .irq = INT_24XX_UART3_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { @@ -1038,7 +1039,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { static struct omap_hwmod omap2430_uart3_hwmod = { .name = "uart3", .mpu_irqs = uart3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), .sdma_reqs = uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -1152,6 +1152,7 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = { static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { { .irq = 25 }, + { .irq = -1 } }; /* l4_core -> dss_dispc */ @@ -1172,7 +1173,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap2430_dispc_hwmod_class, .mpu_irqs = omap2430_dispc_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dispc_irqs), .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1304,6 +1304,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { { .irq = INT_24XX_I2C1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { @@ -1318,7 +1319,6 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { static struct omap_hwmod omap2430_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = i2c1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), .sdma_reqs = i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2chs1_fck", @@ -1350,6 +1350,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { { .irq = INT_24XX_I2C2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { @@ -1364,7 +1365,6 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { static struct omap_hwmod omap2430_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = i2c2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), .sdma_reqs = i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2chs2_fck", @@ -1504,6 +1504,7 @@ static struct omap_hwmod_class omap243x_gpio_hwmod_class = { /* gpio1 */ static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { @@ -1514,7 +1515,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap243x_gpio1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1535,6 +1535,7 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { /* gpio2 */ static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { @@ -1545,7 +1546,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap243x_gpio2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1566,6 +1566,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { /* gpio3 */ static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { @@ -1576,7 +1577,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap243x_gpio3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1597,6 +1597,7 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { /* gpio4 */ static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { @@ -1607,7 +1608,6 @@ static struct omap_hwmod omap2430_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap243x_gpio4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1628,6 +1628,7 @@ static struct omap_hwmod omap2430_gpio4_hwmod = { /* gpio5 */ static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = { { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = { @@ -1638,7 +1639,6 @@ static struct omap_hwmod omap2430_gpio5_hwmod = { .name = "gpio5", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap243x_gpio5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs), .main_clk = "gpio5_fck", .prcm = { .omap2 = { @@ -1685,6 +1685,7 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ + { .irq = -1 } }; /* dma_system -> L3 */ @@ -1718,7 +1719,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = { .name = "dma", .class = &omap2430_dma_hwmod_class, .mpu_irqs = omap2430_dma_system_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dma_system_irqs), .main_clk = "core_l3_ck", .slaves = omap2430_dma_system_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), @@ -1754,6 +1754,7 @@ static struct omap_hwmod_class omap2430_mailbox_hwmod_class = { static struct omap_hwmod omap2430_mailbox_hwmod; static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { { .irq = 26 }, + { .irq = -1 } }; /* l4_core -> mailbox */ @@ -1773,7 +1774,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = { .name = "mailbox", .class = &omap2430_mailbox_hwmod_class, .mpu_irqs = omap2430_mailbox_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mailbox_irqs), .main_clk = "mailboxes_ick", .prcm = { .omap2 = { @@ -1815,6 +1815,7 @@ static struct omap_hwmod_class omap2430_mcspi_class = { /* mcspi1 */ static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { { .irq = 65 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { @@ -1839,7 +1840,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap2430_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2430_mcspi1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi1_mpu_irqs), .sdma_reqs = omap2430_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -1862,6 +1862,7 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { /* mcspi2 */ static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { { .irq = 66 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { @@ -1882,7 +1883,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap2430_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2430_mcspi2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi2_mpu_irqs), .sdma_reqs = omap2430_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", @@ -1905,6 +1905,7 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = { /* mcspi3 */ static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = { { .irq = 91 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { @@ -1925,7 +1926,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { static struct omap_hwmod omap2430_mcspi3_hwmod = { .name = "mcspi3_hwmod", .mpu_irqs = omap2430_mcspi3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi3_mpu_irqs), .sdma_reqs = omap2430_mcspi3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", @@ -1970,12 +1970,12 @@ static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = { { .name = "mc", .irq = 92 }, { .name = "dma", .irq = 93 }, + { .irq = -1 } }; static struct omap_hwmod omap2430_usbhsotg_hwmod = { .name = "usb_otg_hs", .mpu_irqs = omap2430_usbhsotg_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_usbhsotg_mpu_irqs), .main_clk = "usbhs_ick", .prcm = { .omap2 = { @@ -2025,6 +2025,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { { .name = "rx", .irq = 60 }, { .name = "ovr", .irq = 61 }, { .name = "common", .irq = 64 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { @@ -2050,7 +2051,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_irqs), .sdma_reqs = omap2430_mcbsp1_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", @@ -2073,6 +2073,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { { .name = "tx", .irq = 62 }, { .name = "rx", .irq = 63 }, { .name = "common", .irq = 16 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { @@ -2098,7 +2099,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_irqs), .sdma_reqs = omap2430_mcbsp2_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", @@ -2121,6 +2121,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { { .name = "tx", .irq = 89 }, { .name = "rx", .irq = 90 }, { .name = "common", .irq = 17 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { @@ -2156,7 +2157,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { .name = "mcbsp3", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_irqs), .sdma_reqs = omap2430_mcbsp3_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs), .main_clk = "mcbsp3_fck", @@ -2179,6 +2179,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = { { .name = "tx", .irq = 54 }, { .name = "rx", .irq = 55 }, { .name = "common", .irq = 18 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { @@ -2214,7 +2215,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = { .name = "mcbsp4", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_irqs), .sdma_reqs = omap2430_mcbsp4_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs), .main_clk = "mcbsp4_fck", @@ -2237,6 +2237,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = { { .name = "tx", .irq = 81 }, { .name = "rx", .irq = 82 }, { .name = "common", .irq = 19 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { @@ -2272,7 +2273,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = { .name = "mcbsp5", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_irqs), .sdma_reqs = omap2430_mcbsp5_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs), .main_clk = "mcbsp5_fck", @@ -2312,6 +2312,7 @@ static struct omap_hwmod_class omap2430_mmc_class = { static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = { { .irq = 83 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { @@ -2335,7 +2336,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { .name = "mmc1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap2430_mmc1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc1_mpu_irqs), .sdma_reqs = omap2430_mmc1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs), .opt_clks = omap2430_mmc1_opt_clks, @@ -2361,6 +2361,7 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = { { .irq = 86 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { @@ -2380,7 +2381,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = { .name = "mmc2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap2430_mmc2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc2_mpu_irqs), .sdma_reqs = omap2430_mmc2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs), .opt_clks = omap2430_mmc2_opt_clks, diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 791f9b290e81..cc178b573fe2 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -103,6 +103,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_per = { static struct omap_hwmod_irq_info omap3xxx_l3_main_irqs[] = { { .irq = INT_34XX_L3_DBG_IRQ }, { .irq = INT_34XX_L3_APP_IRQ }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = { @@ -151,7 +152,6 @@ static struct omap_hwmod omap3xxx_l3_main_hwmod = { .name = "l3_main", .class = &l3_hwmod_class, .mpu_irqs = omap3xxx_l3_main_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_l3_main_irqs), .masters = omap3xxx_l3_main_masters, .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), .slaves = omap3xxx_l3_main_slaves, @@ -574,6 +574,7 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { static struct omap_hwmod omap3xxx_timer1_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = { { .irq = 37, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { @@ -603,7 +604,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = { static struct omap_hwmod omap3xxx_timer1_hwmod = { .name = "timer1", .mpu_irqs = omap3xxx_timer1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer1_mpu_irqs), .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -624,6 +624,7 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { static struct omap_hwmod omap3xxx_timer2_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = { { .irq = 38, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { @@ -653,7 +654,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer2_slaves[] = { static struct omap_hwmod omap3xxx_timer2_hwmod = { .name = "timer2", .mpu_irqs = omap3xxx_timer2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer2_mpu_irqs), .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -674,6 +674,7 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { static struct omap_hwmod omap3xxx_timer3_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = { { .irq = 39, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { @@ -703,7 +704,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer3_slaves[] = { static struct omap_hwmod omap3xxx_timer3_hwmod = { .name = "timer3", .mpu_irqs = omap3xxx_timer3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer3_mpu_irqs), .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -724,6 +724,7 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { static struct omap_hwmod omap3xxx_timer4_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = { { .irq = 40, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { @@ -753,7 +754,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer4_slaves[] = { static struct omap_hwmod omap3xxx_timer4_hwmod = { .name = "timer4", .mpu_irqs = omap3xxx_timer4_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer4_mpu_irqs), .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -774,6 +774,7 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { static struct omap_hwmod omap3xxx_timer5_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = { { .irq = 41, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { @@ -803,7 +804,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer5_slaves[] = { static struct omap_hwmod omap3xxx_timer5_hwmod = { .name = "timer5", .mpu_irqs = omap3xxx_timer5_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer5_mpu_irqs), .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -824,6 +824,7 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { static struct omap_hwmod omap3xxx_timer6_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = { { .irq = 42, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { @@ -853,7 +854,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer6_slaves[] = { static struct omap_hwmod omap3xxx_timer6_hwmod = { .name = "timer6", .mpu_irqs = omap3xxx_timer6_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer6_mpu_irqs), .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -874,6 +874,7 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { static struct omap_hwmod omap3xxx_timer7_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = { { .irq = 43, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { @@ -903,7 +904,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer7_slaves[] = { static struct omap_hwmod omap3xxx_timer7_hwmod = { .name = "timer7", .mpu_irqs = omap3xxx_timer7_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer7_mpu_irqs), .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -924,6 +924,7 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { static struct omap_hwmod omap3xxx_timer8_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = { { .irq = 44, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { @@ -953,7 +954,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer8_slaves[] = { static struct omap_hwmod omap3xxx_timer8_hwmod = { .name = "timer8", .mpu_irqs = omap3xxx_timer8_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer8_mpu_irqs), .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -974,6 +974,7 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { static struct omap_hwmod omap3xxx_timer9_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = { { .irq = 45, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { @@ -1003,7 +1004,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer9_slaves[] = { static struct omap_hwmod omap3xxx_timer9_hwmod = { .name = "timer9", .mpu_irqs = omap3xxx_timer9_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer9_mpu_irqs), .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -1024,6 +1024,7 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { static struct omap_hwmod omap3xxx_timer10_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { { .irq = 46, }, + { .irq = -1 } }; /* l4_core -> timer10 */ @@ -1044,7 +1045,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer10_slaves[] = { static struct omap_hwmod omap3xxx_timer10_hwmod = { .name = "timer10", .mpu_irqs = omap3xxx_timer10_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer10_mpu_irqs), .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -1065,6 +1065,7 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { static struct omap_hwmod omap3xxx_timer11_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { { .irq = 47, }, + { .irq = -1 } }; /* l4_core -> timer11 */ @@ -1085,7 +1086,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer11_slaves[] = { static struct omap_hwmod omap3xxx_timer11_hwmod = { .name = "timer11", .mpu_irqs = omap3xxx_timer11_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer11_mpu_irqs), .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -1106,6 +1106,7 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = { static struct omap_hwmod omap3xxx_timer12_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer12_mpu_irqs[] = { { .irq = 95, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = { @@ -1135,7 +1136,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer12_slaves[] = { static struct omap_hwmod omap3xxx_timer12_hwmod = { .name = "timer12", .mpu_irqs = omap3xxx_timer12_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer12_mpu_irqs), .main_clk = "gpt12_fck", .prcm = { .omap2 = { @@ -1256,6 +1256,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { { .irq = INT_24XX_UART1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { @@ -1270,7 +1271,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { static struct omap_hwmod omap3xxx_uart1_hwmod = { .name = "uart1", .mpu_irqs = uart1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), .sdma_reqs = uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -1293,6 +1293,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { { .irq = INT_24XX_UART2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { @@ -1307,7 +1308,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { static struct omap_hwmod omap3xxx_uart2_hwmod = { .name = "uart2", .mpu_irqs = uart2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), .sdma_reqs = uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -1330,6 +1330,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { { .irq = INT_24XX_UART3_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { @@ -1344,7 +1345,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { static struct omap_hwmod omap3xxx_uart3_hwmod = { .name = "uart3", .mpu_irqs = uart3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), .sdma_reqs = uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -1367,6 +1367,7 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = { static struct omap_hwmod_irq_info uart4_mpu_irqs[] = { { .irq = INT_36XX_UART4_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart4_sdma_reqs[] = { @@ -1381,7 +1382,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = { static struct omap_hwmod omap3xxx_uart4_hwmod = { .name = "uart4", .mpu_irqs = uart4_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart4_mpu_irqs), .sdma_reqs = uart4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart4_sdma_reqs), .main_clk = "uart4_fck", @@ -1557,6 +1557,7 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { { .irq = 25 }, + { .irq = -1 } }; /* l4_core -> dss_dispc */ @@ -1584,7 +1585,6 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap3xxx_dispc_hwmod_class, .mpu_irqs = omap3xxx_dispc_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dispc_irqs), .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { @@ -1612,6 +1612,7 @@ static struct omap_hwmod_class omap3xxx_dsi_hwmod_class = { static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = { { .irq = 25 }, + { .irq = -1 } }; /* dss_dsi1 */ @@ -1648,7 +1649,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { .name = "dss_dsi1", .class = &omap3xxx_dsi_hwmod_class, .mpu_irqs = omap3xxx_dsi1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dsi1_irqs), .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { @@ -1783,6 +1783,7 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { { .irq = INT_24XX_I2C1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { @@ -1797,7 +1798,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { static struct omap_hwmod omap3xxx_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = i2c1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), .sdma_reqs = i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2c1_fck", @@ -1825,6 +1825,7 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { { .irq = INT_24XX_I2C2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { @@ -1839,7 +1840,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { static struct omap_hwmod omap3xxx_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = i2c2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), .sdma_reqs = i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2c2_fck", @@ -1867,6 +1867,7 @@ static struct omap_i2c_dev_attr i2c3_dev_attr = { static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { { .irq = INT_34XX_I2C3_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = { @@ -1881,7 +1882,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = { static struct omap_hwmod omap3xxx_i2c3_hwmod = { .name = "i2c3", .mpu_irqs = i2c3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c3_mpu_irqs), .sdma_reqs = i2c3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c3_sdma_reqs), .main_clk = "i2c3_fck", @@ -2034,6 +2034,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { /* gpio1 */ static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = { { .irq = 29 }, /* INT_34XX_GPIO_BANK1 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { @@ -2048,7 +2049,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio1_irqs), .main_clk = "gpio1_ick", .opt_clks = gpio1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), @@ -2071,6 +2071,7 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = { /* gpio2 */ static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = { { .irq = 30 }, /* INT_34XX_GPIO_BANK2 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { @@ -2085,7 +2086,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio2_irqs), .main_clk = "gpio2_ick", .opt_clks = gpio2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), @@ -2108,6 +2108,7 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = { /* gpio3 */ static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = { { .irq = 31 }, /* INT_34XX_GPIO_BANK3 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { @@ -2122,7 +2123,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio3_irqs), .main_clk = "gpio3_ick", .opt_clks = gpio3_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), @@ -2145,6 +2145,7 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = { /* gpio4 */ static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = { { .irq = 32 }, /* INT_34XX_GPIO_BANK4 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { @@ -2159,7 +2160,6 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio4_irqs), .main_clk = "gpio4_ick", .opt_clks = gpio4_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), @@ -2182,6 +2182,7 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = { /* gpio5 */ static struct omap_hwmod_irq_info omap3xxx_gpio5_irqs[] = { { .irq = 33 }, /* INT_34XX_GPIO_BANK5 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { @@ -2196,7 +2197,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = { .name = "gpio5", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio5_irqs), .main_clk = "gpio5_ick", .opt_clks = gpio5_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks), @@ -2219,6 +2219,7 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = { /* gpio6 */ static struct omap_hwmod_irq_info omap3xxx_gpio6_irqs[] = { { .irq = 34 }, /* INT_34XX_GPIO_BANK6 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio6_opt_clks[] = { @@ -2233,7 +2234,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = { .name = "gpio6", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio6_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio6_irqs), .main_clk = "gpio6_ick", .opt_clks = gpio6_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks), @@ -2292,6 +2292,7 @@ static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = { { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { @@ -2326,7 +2327,6 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = { .name = "dma", .class = &omap3xxx_dma_hwmod_class, .mpu_irqs = omap3xxx_dma_system_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dma_system_irqs), .main_clk = "core_l3_ick", .prcm = { .omap2 = { @@ -2371,6 +2371,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { { .name = "irq", .irq = 16 }, { .name = "tx", .irq = 59 }, { .name = "rx", .irq = 60 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { @@ -2406,7 +2407,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_irqs), .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", @@ -2429,6 +2429,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = { { .name = "irq", .irq = 17 }, { .name = "tx", .irq = 62 }, { .name = "rx", .irq = 63 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { @@ -2469,7 +2470,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_irqs), .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", @@ -2493,6 +2493,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = { { .name = "irq", .irq = 22 }, { .name = "tx", .irq = 89 }, { .name = "rx", .irq = 90 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { @@ -2532,7 +2533,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { .name = "mcbsp3", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_irqs), .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs), .main_clk = "mcbsp3_fck", @@ -2556,6 +2556,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = { { .name = "irq", .irq = 23 }, { .name = "tx", .irq = 54 }, { .name = "rx", .irq = 55 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = { @@ -2591,7 +2592,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { .name = "mcbsp4", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_irqs), .sdma_reqs = omap3xxx_mcbsp4_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs), .main_clk = "mcbsp4_fck", @@ -2614,6 +2614,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = { { .name = "irq", .irq = 27 }, { .name = "tx", .irq = 81 }, { .name = "rx", .irq = 82 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = { @@ -2649,7 +2650,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { .name = "mcbsp5", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_irqs), .sdma_reqs = omap3xxx_mcbsp5_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs), .main_clk = "mcbsp5_fck", @@ -2682,6 +2682,7 @@ static struct omap_hwmod_class omap3xxx_mcbsp_sidetone_hwmod_class = { /* mcbsp2_sidetone */ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_sidetone_irqs[] = { { .name = "irq", .irq = 4 }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = { @@ -2712,7 +2713,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = { .name = "mcbsp2_sidetone", .class = &omap3xxx_mcbsp_sidetone_hwmod_class, .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_irqs), .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { @@ -2731,6 +2731,7 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = { /* mcbsp3_sidetone */ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_sidetone_irqs[] = { { .name = "irq", .irq = 5 }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = { @@ -2761,7 +2762,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = { .name = "mcbsp3_sidetone", .class = &omap3xxx_mcbsp_sidetone_hwmod_class, .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_irqs), .main_clk = "mcbsp3_fck", .prcm = { .omap2 = { @@ -2931,6 +2931,7 @@ static struct omap_hwmod_class omap3xxx_mailbox_hwmod_class = { static struct omap_hwmod omap3xxx_mailbox_hwmod; static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = { { .irq = 26 }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = { @@ -2959,7 +2960,6 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = { .name = "mailbox", .class = &omap3xxx_mailbox_hwmod_class, .mpu_irqs = omap3xxx_mailbox_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mailbox_irqs), .main_clk = "mailboxes_ick", .prcm = { .omap2 = { @@ -3046,6 +3046,7 @@ static struct omap_hwmod_class omap34xx_mcspi_class = { /* mcspi1 */ static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = { { .name = "irq", .irq = 65 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { @@ -3070,7 +3071,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap34xx_mcspi1 = { .name = "mcspi1", .mpu_irqs = omap34xx_mcspi1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_mpu_irqs), .sdma_reqs = omap34xx_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -3093,6 +3093,7 @@ static struct omap_hwmod omap34xx_mcspi1 = { /* mcspi2 */ static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = { { .name = "irq", .irq = 66 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { @@ -3113,7 +3114,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap34xx_mcspi2 = { .name = "mcspi2", .mpu_irqs = omap34xx_mcspi2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_mpu_irqs), .sdma_reqs = omap34xx_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", @@ -3136,6 +3136,7 @@ static struct omap_hwmod omap34xx_mcspi2 = { /* mcspi3 */ static struct omap_hwmod_irq_info omap34xx_mcspi3_mpu_irqs[] = { { .name = "irq", .irq = 91 }, /* 91 */ + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = { @@ -3156,7 +3157,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { static struct omap_hwmod omap34xx_mcspi3 = { .name = "mcspi3", .mpu_irqs = omap34xx_mcspi3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_mpu_irqs), .sdma_reqs = omap34xx_mcspi3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", @@ -3179,6 +3179,7 @@ static struct omap_hwmod omap34xx_mcspi3 = { /* SPI4 */ static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = { { .name = "irq", .irq = INT_34XX_SPI4_IRQ }, /* 48 */ + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = { @@ -3197,7 +3198,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi4_dev_attr = { static struct omap_hwmod omap34xx_mcspi4 = { .name = "mcspi4", .mpu_irqs = omap34xx_mcspi4_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_mpu_irqs), .sdma_reqs = omap34xx_mcspi4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs), .main_clk = "mcspi4_fck", @@ -3241,12 +3241,12 @@ static struct omap_hwmod_irq_info omap3xxx_usbhsotg_mpu_irqs[] = { { .name = "mc", .irq = 92 }, { .name = "dma", .irq = 93 }, + { .irq = -1 } }; static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { .name = "usb_otg_hs", .mpu_irqs = omap3xxx_usbhsotg_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_mpu_irqs), .main_clk = "hsotgusb_ick", .prcm = { .omap2 = { @@ -3278,6 +3278,7 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { static struct omap_hwmod_irq_info am35xx_usbhsotg_mpu_irqs[] = { { .name = "mc", .irq = 71 }, + { .irq = -1 } }; static struct omap_hwmod_class am35xx_usbotg_class = { @@ -3288,7 +3289,6 @@ static struct omap_hwmod_class am35xx_usbotg_class = { static struct omap_hwmod am35xx_usbhsotg_hwmod = { .name = "am35x_otg_hs", .mpu_irqs = am35xx_usbhsotg_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(am35xx_usbhsotg_mpu_irqs), .main_clk = NULL, .prcm = { .omap2 = { @@ -3324,6 +3324,7 @@ static struct omap_hwmod_class omap34xx_mmc_class = { static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = { { .irq = 83, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = { @@ -3346,7 +3347,6 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = { static struct omap_hwmod omap3xxx_mmc1_hwmod = { .name = "mmc1", .mpu_irqs = omap34xx_mmc1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc1_mpu_irqs), .sdma_reqs = omap34xx_mmc1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs), .opt_clks = omap34xx_mmc1_opt_clks, @@ -3372,6 +3372,7 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = { static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = { { .irq = INT_24XX_MMC2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = { @@ -3390,7 +3391,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc2_slaves[] = { static struct omap_hwmod omap3xxx_mmc2_hwmod = { .name = "mmc2", .mpu_irqs = omap34xx_mmc2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc2_mpu_irqs), .sdma_reqs = omap34xx_mmc2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs), .opt_clks = omap34xx_mmc2_opt_clks, @@ -3415,6 +3415,7 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = { static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = { { .irq = 94, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = { @@ -3433,7 +3434,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc3_slaves[] = { static struct omap_hwmod omap3xxx_mmc3_hwmod = { .name = "mmc3", .mpu_irqs = omap34xx_mmc3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc3_mpu_irqs), .sdma_reqs = omap34xx_mmc3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs), .opt_clks = omap34xx_mmc3_opt_clks, diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 81fd313bb1ad..bbfc4db664b3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -115,6 +115,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = { static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { { .irq = 113 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod omap44xx_dmm_hwmod = { @@ -123,7 +124,6 @@ static struct omap_hwmod omap44xx_dmm_hwmod = { .slaves = omap44xx_dmm_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), .mpu_irqs = omap44xx_dmm_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmm_irqs), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -268,6 +268,7 @@ static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = { static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = { { .irq = 9 + OMAP44XX_IRQ_GIC_START }, { .irq = 10 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { @@ -303,7 +304,6 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = { .name = "l3_main_1", .class = &omap44xx_l3_hwmod_class, .mpu_irqs = omap44xx_l3_targ_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_l3_targ_irqs), .slaves = omap44xx_l3_main_1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -672,6 +672,7 @@ static struct omap_hwmod_class omap44xx_aess_hwmod_class = { /* aess */ static struct omap_hwmod_irq_info omap44xx_aess_irqs[] = { { .irq = 99 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = { @@ -736,7 +737,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = { .name = "aess", .class = &omap44xx_aess_hwmod_class, .mpu_irqs = omap44xx_aess_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_aess_irqs), .sdma_reqs = omap44xx_aess_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_aess_sdma_reqs), .main_clk = "aess_fck", @@ -875,6 +875,7 @@ static struct omap_hwmod_irq_info omap44xx_dma_system_irqs[] = { { .name = "1", .irq = 13 + OMAP44XX_IRQ_GIC_START }, { .name = "2", .irq = 14 + OMAP44XX_IRQ_GIC_START }, { .name = "3", .irq = 15 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; /* dma_system master ports */ @@ -909,7 +910,6 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = { .name = "dma_system", .class = &omap44xx_dma_hwmod_class, .mpu_irqs = omap44xx_dma_system_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dma_system_irqs), .main_clk = "l3_div_ck", .prcm = { .omap4 = { @@ -948,6 +948,7 @@ static struct omap_hwmod_class omap44xx_dmic_hwmod_class = { static struct omap_hwmod omap44xx_dmic_hwmod; static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = { { .irq = 114 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = { @@ -1000,7 +1001,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { .name = "dmic", .class = &omap44xx_dmic_hwmod_class, .mpu_irqs = omap44xx_dmic_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmic_irqs), .sdma_reqs = omap44xx_dmic_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dmic_sdma_reqs), .main_clk = "dmic_fck", @@ -1026,6 +1026,7 @@ static struct omap_hwmod_class omap44xx_dsp_hwmod_class = { /* dsp */ static struct omap_hwmod_irq_info omap44xx_dsp_irqs[] = { { .irq = 28 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_rst_info omap44xx_dsp_resets[] = { @@ -1082,7 +1083,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { .name = "dsp", .class = &omap44xx_dsp_hwmod_class, .mpu_irqs = omap44xx_dsp_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dsp_irqs), .rst_lines = omap44xx_dsp_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets), .main_clk = "dsp_fck", @@ -1215,6 +1215,7 @@ static struct omap_hwmod_class omap44xx_dispc_hwmod_class = { static struct omap_hwmod omap44xx_dss_dispc_hwmod; static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = { { .irq = 25 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = { @@ -1267,7 +1268,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap44xx_dispc_hwmod_class, .mpu_irqs = omap44xx_dss_dispc_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_irqs), .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs), .main_clk = "dss_fck", @@ -1306,6 +1306,7 @@ static struct omap_hwmod_class omap44xx_dsi_hwmod_class = { static struct omap_hwmod omap44xx_dss_dsi1_hwmod; static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = { { .irq = 53 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = { @@ -1358,7 +1359,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .name = "dss_dsi1", .class = &omap44xx_dsi_hwmod_class, .mpu_irqs = omap44xx_dss_dsi1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_irqs), .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs), .main_clk = "dss_fck", @@ -1376,6 +1376,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { static struct omap_hwmod omap44xx_dss_dsi2_hwmod; static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = { { .irq = 84 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = { @@ -1428,7 +1429,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .name = "dss_dsi2", .class = &omap44xx_dsi_hwmod_class, .mpu_irqs = omap44xx_dss_dsi2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_irqs), .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs), .main_clk = "dss_fck", @@ -1466,6 +1466,7 @@ static struct omap_hwmod_class omap44xx_hdmi_hwmod_class = { static struct omap_hwmod omap44xx_dss_hdmi_hwmod; static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = { { .irq = 101 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = { @@ -1518,7 +1519,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .name = "dss_hdmi", .class = &omap44xx_hdmi_hwmod_class, .mpu_irqs = omap44xx_dss_hdmi_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_irqs), .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs), .main_clk = "dss_fck", @@ -1716,6 +1716,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { static struct omap_hwmod omap44xx_gpio1_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio1_irqs[] = { { .irq = 29 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = { @@ -1749,7 +1750,6 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { .name = "gpio1", .class = &omap44xx_gpio_hwmod_class, .mpu_irqs = omap44xx_gpio1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio1_irqs), .main_clk = "gpio1_ick", .prcm = { .omap4 = { @@ -1768,6 +1768,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { static struct omap_hwmod omap44xx_gpio2_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio2_irqs[] = { { .irq = 30 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = { @@ -1802,7 +1803,6 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { .class = &omap44xx_gpio_hwmod_class, .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio2_irqs), .main_clk = "gpio2_ick", .prcm = { .omap4 = { @@ -1821,6 +1821,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { static struct omap_hwmod omap44xx_gpio3_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio3_irqs[] = { { .irq = 31 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = { @@ -1855,7 +1856,6 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { .class = &omap44xx_gpio_hwmod_class, .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio3_irqs), .main_clk = "gpio3_ick", .prcm = { .omap4 = { @@ -1874,6 +1874,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { static struct omap_hwmod omap44xx_gpio4_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio4_irqs[] = { { .irq = 32 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = { @@ -1908,7 +1909,6 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { .class = &omap44xx_gpio_hwmod_class, .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio4_irqs), .main_clk = "gpio4_ick", .prcm = { .omap4 = { @@ -1927,6 +1927,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { static struct omap_hwmod omap44xx_gpio5_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio5_irqs[] = { { .irq = 33 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = { @@ -1961,7 +1962,6 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { .class = &omap44xx_gpio_hwmod_class, .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio5_irqs), .main_clk = "gpio5_ick", .prcm = { .omap4 = { @@ -1980,6 +1980,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { static struct omap_hwmod omap44xx_gpio6_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio6_irqs[] = { { .irq = 34 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = { @@ -2014,7 +2015,6 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { .class = &omap44xx_gpio_hwmod_class, .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio6_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio6_irqs), .main_clk = "gpio6_ick", .prcm = { .omap4 = { @@ -2058,6 +2058,7 @@ static struct omap_hwmod_irq_info omap44xx_hsi_irqs[] = { { .name = "mpu_p1", .irq = 67 + OMAP44XX_IRQ_GIC_START }, { .name = "mpu_p2", .irq = 68 + OMAP44XX_IRQ_GIC_START }, { .name = "mpu_dma", .irq = 71 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; /* hsi master ports */ @@ -2092,7 +2093,6 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { .name = "hsi", .class = &omap44xx_hsi_hwmod_class, .mpu_irqs = omap44xx_hsi_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_hsi_irqs), .main_clk = "hsi_fck", .prcm = { .omap4 = { @@ -2131,6 +2131,7 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { static struct omap_hwmod omap44xx_i2c1_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { { .irq = 56 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = { @@ -2166,7 +2167,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { .class = &omap44xx_i2c_hwmod_class, .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c1_irqs), .sdma_reqs = omap44xx_i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs), .main_clk = "i2c1_fck", @@ -2184,6 +2184,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { static struct omap_hwmod omap44xx_i2c2_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = { { .irq = 57 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = { @@ -2219,7 +2220,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { .class = &omap44xx_i2c_hwmod_class, .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c2_irqs), .sdma_reqs = omap44xx_i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs), .main_clk = "i2c2_fck", @@ -2237,6 +2237,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { static struct omap_hwmod omap44xx_i2c3_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = { { .irq = 61 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = { @@ -2272,7 +2273,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { .class = &omap44xx_i2c_hwmod_class, .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c3_irqs), .sdma_reqs = omap44xx_i2c3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs), .main_clk = "i2c3_fck", @@ -2290,6 +2290,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { static struct omap_hwmod omap44xx_i2c4_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = { { .irq = 62 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = { @@ -2325,7 +2326,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { .class = &omap44xx_i2c_hwmod_class, .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c4_irqs), .sdma_reqs = omap44xx_i2c4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs), .main_clk = "i2c4_fck", @@ -2351,6 +2351,7 @@ static struct omap_hwmod_class omap44xx_ipu_hwmod_class = { /* ipu */ static struct omap_hwmod_irq_info omap44xx_ipu_irqs[] = { { .irq = 100 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_rst_info omap44xx_ipu_c0_resets[] = { @@ -2417,7 +2418,6 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { .name = "ipu", .class = &omap44xx_ipu_hwmod_class, .mpu_irqs = omap44xx_ipu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_ipu_irqs), .rst_lines = omap44xx_ipu_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), .main_clk = "ipu_fck", @@ -2458,6 +2458,7 @@ static struct omap_hwmod_class omap44xx_iss_hwmod_class = { /* iss */ static struct omap_hwmod_irq_info omap44xx_iss_irqs[] = { { .irq = 24 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = { @@ -2503,7 +2504,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = { .name = "iss", .class = &omap44xx_iss_hwmod_class, .mpu_irqs = omap44xx_iss_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iss_irqs), .sdma_reqs = omap44xx_iss_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_iss_sdma_reqs), .main_clk = "iss_fck", @@ -2535,6 +2535,7 @@ static struct omap_hwmod_irq_info omap44xx_iva_irqs[] = { { .name = "sync_1", .irq = 103 + OMAP44XX_IRQ_GIC_START }, { .name = "sync_0", .irq = 104 + OMAP44XX_IRQ_GIC_START }, { .name = "mailbox_0", .irq = 107 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_rst_info omap44xx_iva_resets[] = { @@ -2613,7 +2614,6 @@ static struct omap_hwmod omap44xx_iva_hwmod = { .name = "iva", .class = &omap44xx_iva_hwmod_class, .mpu_irqs = omap44xx_iva_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iva_irqs), .rst_lines = omap44xx_iva_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets), .main_clk = "iva_fck", @@ -2656,6 +2656,7 @@ static struct omap_hwmod_class omap44xx_kbd_hwmod_class = { static struct omap_hwmod omap44xx_kbd_hwmod; static struct omap_hwmod_irq_info omap44xx_kbd_irqs[] = { { .irq = 120 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = { @@ -2685,7 +2686,6 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { .name = "kbd", .class = &omap44xx_kbd_hwmod_class, .mpu_irqs = omap44xx_kbd_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_kbd_irqs), .main_clk = "kbd_fck", .prcm = { .omap4 = { @@ -2721,6 +2721,7 @@ static struct omap_hwmod_class omap44xx_mailbox_hwmod_class = { static struct omap_hwmod omap44xx_mailbox_hwmod; static struct omap_hwmod_irq_info omap44xx_mailbox_irqs[] = { { .irq = 26 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = { @@ -2750,7 +2751,6 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { .name = "mailbox", .class = &omap44xx_mailbox_hwmod_class, .mpu_irqs = omap44xx_mailbox_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mailbox_irqs), .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, @@ -2784,6 +2784,7 @@ static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = { static struct omap_hwmod omap44xx_mcbsp1_hwmod; static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = { { .irq = 17 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { @@ -2839,7 +2840,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_irqs), .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs), .main_clk = "mcbsp1_fck", @@ -2857,6 +2857,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { static struct omap_hwmod omap44xx_mcbsp2_hwmod; static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = { { .irq = 22 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { @@ -2912,7 +2913,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_irqs), .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs), .main_clk = "mcbsp2_fck", @@ -2930,6 +2930,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { static struct omap_hwmod omap44xx_mcbsp3_hwmod; static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = { { .irq = 23 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { @@ -2985,7 +2986,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { .name = "mcbsp3", .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_irqs), .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs), .main_clk = "mcbsp3_fck", @@ -3003,6 +3003,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { static struct omap_hwmod omap44xx_mcbsp4_hwmod; static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = { { .irq = 16 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { @@ -3037,7 +3038,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { .name = "mcbsp4", .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_irqs), .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs), .main_clk = "mcbsp4_fck", @@ -3076,6 +3076,7 @@ static struct omap_hwmod_class omap44xx_mcpdm_hwmod_class = { static struct omap_hwmod omap44xx_mcpdm_hwmod; static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = { { .irq = 112 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = { @@ -3129,7 +3130,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { .name = "mcpdm", .class = &omap44xx_mcpdm_hwmod_class, .mpu_irqs = omap44xx_mcpdm_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_irqs), .sdma_reqs = omap44xx_mcpdm_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs), .main_clk = "mcpdm_fck", @@ -3169,6 +3169,7 @@ static struct omap_hwmod_class omap44xx_mcspi_hwmod_class = { static struct omap_hwmod omap44xx_mcspi1_hwmod; static struct omap_hwmod_irq_info omap44xx_mcspi1_irqs[] = { { .irq = 65 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = { @@ -3214,7 +3215,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { .name = "mcspi1", .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_irqs), .sdma_reqs = omap44xx_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -3233,6 +3233,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { static struct omap_hwmod omap44xx_mcspi2_hwmod; static struct omap_hwmod_irq_info omap44xx_mcspi2_irqs[] = { { .irq = 66 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = { @@ -3274,7 +3275,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { .name = "mcspi2", .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_irqs), .sdma_reqs = omap44xx_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", @@ -3293,6 +3293,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { static struct omap_hwmod omap44xx_mcspi3_hwmod; static struct omap_hwmod_irq_info omap44xx_mcspi3_irqs[] = { { .irq = 91 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = { @@ -3334,7 +3335,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { .name = "mcspi3", .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_irqs), .sdma_reqs = omap44xx_mcspi3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", @@ -3353,6 +3353,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { static struct omap_hwmod omap44xx_mcspi4_hwmod; static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = { { .irq = 48 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = { @@ -3392,7 +3393,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { .name = "mcspi4", .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_irqs), .sdma_reqs = omap44xx_mcspi4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs), .main_clk = "mcspi4_fck", @@ -3433,6 +3433,7 @@ static struct omap_hwmod_class omap44xx_mmc_hwmod_class = { static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { { .irq = 83 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = { @@ -3477,7 +3478,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { .name = "mmc1", .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc1_irqs), .sdma_reqs = omap44xx_mmc1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs), .main_clk = "mmc1_fck", @@ -3497,6 +3497,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { /* mmc2 */ static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = { { .irq = 86 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = { @@ -3536,7 +3537,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { .name = "mmc2", .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc2_irqs), .sdma_reqs = omap44xx_mmc2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs), .main_clk = "mmc2_fck", @@ -3556,6 +3556,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { static struct omap_hwmod omap44xx_mmc3_hwmod; static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = { { .irq = 94 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = { @@ -3590,7 +3591,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { .name = "mmc3", .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc3_irqs), .sdma_reqs = omap44xx_mmc3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs), .main_clk = "mmc3_fck", @@ -3608,6 +3608,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { static struct omap_hwmod omap44xx_mmc4_hwmod; static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = { { .irq = 96 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = { @@ -3642,7 +3643,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { .name = "mmc4", .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc4_irqs), + .sdma_reqs = omap44xx_mmc4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs), .main_clk = "mmc4_fck", @@ -3660,6 +3661,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { static struct omap_hwmod omap44xx_mmc5_hwmod; static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = { { .irq = 59 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = { @@ -3694,7 +3696,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { .name = "mmc5", .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc5_irqs), .sdma_reqs = omap44xx_mmc5_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs), .main_clk = "mmc5_fck", @@ -3722,6 +3723,7 @@ static struct omap_hwmod_irq_info omap44xx_mpu_irqs[] = { { .name = "pl310", .irq = 0 + OMAP44XX_IRQ_GIC_START }, { .name = "cti0", .irq = 1 + OMAP44XX_IRQ_GIC_START }, { .name = "cti1", .irq = 2 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; /* mpu master ports */ @@ -3736,7 +3738,6 @@ static struct omap_hwmod omap44xx_mpu_hwmod = { .class = &omap44xx_mpu_hwmod_class, .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), .mpu_irqs = omap44xx_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mpu_irqs), .main_clk = "dpll_mpu_m2_ck", .prcm = { .omap4 = { @@ -3778,6 +3779,7 @@ static struct omap_hwmod_class omap44xx_smartreflex_hwmod_class = { static struct omap_hwmod omap44xx_smartreflex_core_hwmod; static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = { { .irq = 19 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = { @@ -3807,7 +3809,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { .name = "smartreflex_core", .class = &omap44xx_smartreflex_hwmod_class, .mpu_irqs = omap44xx_smartreflex_core_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_irqs), + .main_clk = "smartreflex_core_fck", .vdd_name = "core", .prcm = { @@ -3824,6 +3826,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { static struct omap_hwmod omap44xx_smartreflex_iva_hwmod; static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = { { .irq = 102 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = { @@ -3853,7 +3856,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { .name = "smartreflex_iva", .class = &omap44xx_smartreflex_hwmod_class, .mpu_irqs = omap44xx_smartreflex_iva_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_irqs), .main_clk = "smartreflex_iva_fck", .vdd_name = "iva", .prcm = { @@ -3870,6 +3872,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod; static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = { { .irq = 18 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = { @@ -3899,7 +3902,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { .name = "smartreflex_mpu", .class = &omap44xx_smartreflex_hwmod_class, .mpu_irqs = omap44xx_smartreflex_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_irqs), .main_clk = "smartreflex_mpu_fck", .vdd_name = "mpu", .prcm = { @@ -4015,6 +4017,7 @@ static struct omap_hwmod_class omap44xx_timer_hwmod_class = { static struct omap_hwmod omap44xx_timer1_hwmod; static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = { { .irq = 37 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = { @@ -4044,7 +4047,6 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { .name = "timer1", .class = &omap44xx_timer_1ms_hwmod_class, .mpu_irqs = omap44xx_timer1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer1_irqs), .main_clk = "timer1_fck", .prcm = { .omap4 = { @@ -4060,6 +4062,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { static struct omap_hwmod omap44xx_timer2_hwmod; static struct omap_hwmod_irq_info omap44xx_timer2_irqs[] = { { .irq = 38 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = { @@ -4089,7 +4092,6 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { .name = "timer2", .class = &omap44xx_timer_1ms_hwmod_class, .mpu_irqs = omap44xx_timer2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer2_irqs), .main_clk = "timer2_fck", .prcm = { .omap4 = { @@ -4105,6 +4107,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { static struct omap_hwmod omap44xx_timer3_hwmod; static struct omap_hwmod_irq_info omap44xx_timer3_irqs[] = { { .irq = 39 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = { @@ -4134,7 +4137,6 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { .name = "timer3", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer3_irqs), .main_clk = "timer3_fck", .prcm = { .omap4 = { @@ -4150,6 +4152,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { static struct omap_hwmod omap44xx_timer4_hwmod; static struct omap_hwmod_irq_info omap44xx_timer4_irqs[] = { { .irq = 40 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = { @@ -4179,7 +4182,6 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { .name = "timer4", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer4_irqs), .main_clk = "timer4_fck", .prcm = { .omap4 = { @@ -4195,6 +4197,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { static struct omap_hwmod omap44xx_timer5_hwmod; static struct omap_hwmod_irq_info omap44xx_timer5_irqs[] = { { .irq = 41 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = { @@ -4243,7 +4246,6 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { .name = "timer5", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer5_irqs), .main_clk = "timer5_fck", .prcm = { .omap4 = { @@ -4259,6 +4261,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { static struct omap_hwmod omap44xx_timer6_hwmod; static struct omap_hwmod_irq_info omap44xx_timer6_irqs[] = { { .irq = 42 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = { @@ -4307,7 +4310,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { .name = "timer6", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer6_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer6_irqs), + .main_clk = "timer6_fck", .prcm = { .omap4 = { @@ -4323,6 +4326,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { static struct omap_hwmod omap44xx_timer7_hwmod; static struct omap_hwmod_irq_info omap44xx_timer7_irqs[] = { { .irq = 43 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = { @@ -4371,7 +4375,6 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { .name = "timer7", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer7_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer7_irqs), .main_clk = "timer7_fck", .prcm = { .omap4 = { @@ -4387,6 +4390,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { static struct omap_hwmod omap44xx_timer8_hwmod; static struct omap_hwmod_irq_info omap44xx_timer8_irqs[] = { { .irq = 44 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = { @@ -4435,7 +4439,6 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { .name = "timer8", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer8_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer8_irqs), .main_clk = "timer8_fck", .prcm = { .omap4 = { @@ -4451,6 +4454,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { static struct omap_hwmod omap44xx_timer9_hwmod; static struct omap_hwmod_irq_info omap44xx_timer9_irqs[] = { { .irq = 45 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = { @@ -4480,7 +4484,6 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { .name = "timer9", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer9_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer9_irqs), .main_clk = "timer9_fck", .prcm = { .omap4 = { @@ -4496,6 +4499,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { static struct omap_hwmod omap44xx_timer10_hwmod; static struct omap_hwmod_irq_info omap44xx_timer10_irqs[] = { { .irq = 46 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = { @@ -4525,7 +4529,6 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { .name = "timer10", .class = &omap44xx_timer_1ms_hwmod_class, .mpu_irqs = omap44xx_timer10_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer10_irqs), .main_clk = "timer10_fck", .prcm = { .omap4 = { @@ -4541,6 +4544,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { static struct omap_hwmod omap44xx_timer11_hwmod; static struct omap_hwmod_irq_info omap44xx_timer11_irqs[] = { { .irq = 47 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = { @@ -4570,7 +4574,6 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { .name = "timer11", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer11_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer11_irqs), .main_clk = "timer11_fck", .prcm = { .omap4 = { @@ -4608,6 +4611,7 @@ static struct omap_hwmod_class omap44xx_uart_hwmod_class = { static struct omap_hwmod omap44xx_uart1_hwmod; static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = { { .irq = 72 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = { @@ -4642,7 +4646,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { .name = "uart1", .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart1_irqs), .sdma_reqs = omap44xx_uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -4660,6 +4663,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { static struct omap_hwmod omap44xx_uart2_hwmod; static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = { { .irq = 73 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = { @@ -4694,7 +4698,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { .name = "uart2", .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart2_irqs), .sdma_reqs = omap44xx_uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -4712,6 +4715,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { static struct omap_hwmod omap44xx_uart3_hwmod; static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = { { .irq = 74 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = { @@ -4747,7 +4751,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { .class = &omap44xx_uart_hwmod_class, .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), .mpu_irqs = omap44xx_uart3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart3_irqs), .sdma_reqs = omap44xx_uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -4765,6 +4768,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { static struct omap_hwmod omap44xx_uart4_hwmod; static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = { { .irq = 70 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = { @@ -4799,7 +4803,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { .name = "uart4", .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart4_irqs), .sdma_reqs = omap44xx_uart4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs), .main_clk = "uart4_fck", @@ -4840,6 +4843,7 @@ static struct omap_hwmod_class omap44xx_usb_otg_hs_hwmod_class = { static struct omap_hwmod_irq_info omap44xx_usb_otg_hs_irqs[] = { { .name = "mc", .irq = 92 + OMAP44XX_IRQ_GIC_START }, { .name = "dma", .irq = 93 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; /* usb_otg_hs master ports */ @@ -4879,7 +4883,6 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { .class = &omap44xx_usb_otg_hs_hwmod_class, .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, .mpu_irqs = omap44xx_usb_otg_hs_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_irqs), .main_clk = "usb_otg_hs_ick", .prcm = { .omap4 = { @@ -4922,6 +4925,7 @@ static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = { static struct omap_hwmod omap44xx_wd_timer2_hwmod; static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = { { .irq = 80 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = { @@ -4951,7 +4955,6 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { .name = "wd_timer2", .class = &omap44xx_wd_timer_hwmod_class, .mpu_irqs = omap44xx_wd_timer2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer2_irqs), .main_clk = "wd_timer2_fck", .prcm = { .omap4 = { @@ -4967,6 +4970,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { static struct omap_hwmod omap44xx_wd_timer3_hwmod; static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = { { .irq = 36 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = { @@ -5015,7 +5019,6 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { .name = "wd_timer3", .class = &omap44xx_wd_timer_hwmod_class, .mpu_irqs = omap44xx_wd_timer3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer3_irqs), .main_clk = "wd_timer3_fck", .prcm = { .omap4 = { diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 523e0b585b6c..3bd6d1d9c0da 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -98,7 +98,7 @@ struct omap_hwmod_mux_info { /** * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod * @name: name of the IRQ channel (module local name) - * @irq_ch: IRQ channel ID + * @irq: IRQ channel ID (should be non-negative except -1 = terminator) * * @name should be something short, e.g., "tx" or "rx". It is for use * by platform_get_resource_byname(). It is defined locally to the @@ -106,7 +106,7 @@ struct omap_hwmod_mux_info { */ struct omap_hwmod_irq_info { const char *name; - u16 irq; + s16 irq; }; /** @@ -466,7 +466,7 @@ struct omap_hwmod_class { * @name: name of the hwmod * @class: struct omap_hwmod_class * to the class of this hwmod * @od: struct omap_device currently associated with this hwmod (internal use) - * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt) + * @mpu_irqs: ptr to an array of MPU IRQs * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt) * @prcm: PRCM data pertaining to this hwmod * @main_clk: main clock: OMAP clock name @@ -480,7 +480,6 @@ struct omap_hwmod_class { * @_sysc_cache: internal-use hwmod flags * @_mpu_rt_va: cached register target start address (internal use) * @_mpu_port_index: cached MPU register target slave ID (internal use) - * @mpu_irqs_cnt: number of @mpu_irqs * @sdma_reqs_cnt: number of @sdma_reqs * @opt_clks_cnt: number of @opt_clks * @master_cnt: number of @master entries @@ -529,7 +528,6 @@ struct omap_hwmod { u16 flags; u8 _mpu_port_index; u8 response_lat; - u8 mpu_irqs_cnt; u8 sdma_reqs_cnt; u8 rst_lines_cnt; u8 opt_clks_cnt; From 0d619a89998d308c48d06b033eccb7374c456f12 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:07 -0600 Subject: [PATCH 20/56] omap_hwmod: share identical omap_hwmod_mpu_irqs arrays To reduce kernel source file data duplication, share struct omap_hwmod_mpu_irqs arrays across OMAP2xxx and 3xxx hwmod data files. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/Makefile | 11 +- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 167 +++--------------- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 166 +++-------------- .../omap_hwmod_2xxx_3xxx_ipblock_data.c | 142 +++++++++++++++ .../mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 21 +++ arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 162 +++-------------- arch/arm/mach-omap2/omap_hwmod_common_data.h | 29 +++ 7 files changed, 275 insertions(+), 423 deletions(-) create mode 100644 arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c create mode 100644 arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 8a75d176ec6c..f34336560437 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -145,13 +145,18 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o # hwmod data -obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o \ +obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_ipblock_data.o \ + omap_hwmod_2xxx_3xxx_ipblock_data.o \ + omap_hwmod_2xxx_interconnect_data.o \ omap_hwmod_2xxx_3xxx_interconnect_data.o \ omap_hwmod_2420_data.o -obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_interconnect_data.o \ +obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_ipblock_data.o \ + omap_hwmod_2xxx_3xxx_ipblock_data.o \ + omap_hwmod_2xxx_interconnect_data.o \ omap_hwmod_2xxx_3xxx_interconnect_data.o \ omap_hwmod_2430_data.o -obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o \ +obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_ipblock_data.o \ + omap_hwmod_2xxx_3xxx_interconnect_data.o \ omap_hwmod_3xxx_data.o obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 04730d33ba5c..73157eef2590 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -294,10 +294,6 @@ static struct omap_hwmod_class omap2420_timer_hwmod_class = { /* timer1 */ static struct omap_hwmod omap2420_timer1_hwmod; -static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = { - { .irq = 37, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { { @@ -325,7 +321,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = { /* timer1 hwmod */ static struct omap_hwmod omap2420_timer1_hwmod = { .name = "timer1", - .mpu_irqs = omap2420_timer1_mpu_irqs, + .mpu_irqs = omap2_timer1_mpu_irqs, .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -344,11 +340,6 @@ static struct omap_hwmod omap2420_timer1_hwmod = { /* timer2 */ static struct omap_hwmod omap2420_timer2_hwmod; -static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { - { .irq = 38, }, - { .irq = -1 } -}; - /* l4_core -> timer2 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { @@ -367,7 +358,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = { /* timer2 hwmod */ static struct omap_hwmod omap2420_timer2_hwmod = { .name = "timer2", - .mpu_irqs = omap2420_timer2_mpu_irqs, + .mpu_irqs = omap2_timer2_mpu_irqs, .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -386,10 +377,6 @@ static struct omap_hwmod omap2420_timer2_hwmod = { /* timer3 */ static struct omap_hwmod omap2420_timer3_hwmod; -static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { - { .irq = 39, }, - { .irq = -1 } -}; /* l4_core -> timer3 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { @@ -408,7 +395,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = { /* timer3 hwmod */ static struct omap_hwmod omap2420_timer3_hwmod = { .name = "timer3", - .mpu_irqs = omap2420_timer3_mpu_irqs, + .mpu_irqs = omap2_timer3_mpu_irqs, .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -427,10 +414,6 @@ static struct omap_hwmod omap2420_timer3_hwmod = { /* timer4 */ static struct omap_hwmod omap2420_timer4_hwmod; -static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { - { .irq = 40, }, - { .irq = -1 } -}; /* l4_core -> timer4 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { @@ -449,7 +432,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = { /* timer4 hwmod */ static struct omap_hwmod omap2420_timer4_hwmod = { .name = "timer4", - .mpu_irqs = omap2420_timer4_mpu_irqs, + .mpu_irqs = omap2_timer4_mpu_irqs, .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -468,10 +451,6 @@ static struct omap_hwmod omap2420_timer4_hwmod = { /* timer5 */ static struct omap_hwmod omap2420_timer5_hwmod; -static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { - { .irq = 41, }, - { .irq = -1 } -}; /* l4_core -> timer5 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { @@ -490,7 +469,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = { /* timer5 hwmod */ static struct omap_hwmod omap2420_timer5_hwmod = { .name = "timer5", - .mpu_irqs = omap2420_timer5_mpu_irqs, + .mpu_irqs = omap2_timer5_mpu_irqs, .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -510,10 +489,6 @@ static struct omap_hwmod omap2420_timer5_hwmod = { /* timer6 */ static struct omap_hwmod omap2420_timer6_hwmod; -static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { - { .irq = 42, }, - { .irq = -1 } -}; /* l4_core -> timer6 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { @@ -532,7 +507,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = { /* timer6 hwmod */ static struct omap_hwmod omap2420_timer6_hwmod = { .name = "timer6", - .mpu_irqs = omap2420_timer6_mpu_irqs, + .mpu_irqs = omap2_timer6_mpu_irqs, .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -551,10 +526,6 @@ static struct omap_hwmod omap2420_timer6_hwmod = { /* timer7 */ static struct omap_hwmod omap2420_timer7_hwmod; -static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { - { .irq = 43, }, - { .irq = -1 } -}; /* l4_core -> timer7 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { @@ -573,7 +544,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = { /* timer7 hwmod */ static struct omap_hwmod omap2420_timer7_hwmod = { .name = "timer7", - .mpu_irqs = omap2420_timer7_mpu_irqs, + .mpu_irqs = omap2_timer7_mpu_irqs, .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -592,10 +563,6 @@ static struct omap_hwmod omap2420_timer7_hwmod = { /* timer8 */ static struct omap_hwmod omap2420_timer8_hwmod; -static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { - { .irq = 44, }, - { .irq = -1 } -}; /* l4_core -> timer8 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { @@ -614,7 +581,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = { /* timer8 hwmod */ static struct omap_hwmod omap2420_timer8_hwmod = { .name = "timer8", - .mpu_irqs = omap2420_timer8_mpu_irqs, + .mpu_irqs = omap2_timer8_mpu_irqs, .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -633,10 +600,6 @@ static struct omap_hwmod omap2420_timer8_hwmod = { /* timer9 */ static struct omap_hwmod omap2420_timer9_hwmod; -static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { - { .irq = 45, }, - { .irq = -1 } -}; /* l4_core -> timer9 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { @@ -655,7 +618,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = { /* timer9 hwmod */ static struct omap_hwmod omap2420_timer9_hwmod = { .name = "timer9", - .mpu_irqs = omap2420_timer9_mpu_irqs, + .mpu_irqs = omap2_timer9_mpu_irqs, .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -674,10 +637,6 @@ static struct omap_hwmod omap2420_timer9_hwmod = { /* timer10 */ static struct omap_hwmod omap2420_timer10_hwmod; -static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { - { .irq = 46, }, - { .irq = -1 } -}; /* l4_core -> timer10 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { @@ -696,7 +655,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = { /* timer10 hwmod */ static struct omap_hwmod omap2420_timer10_hwmod = { .name = "timer10", - .mpu_irqs = omap2420_timer10_mpu_irqs, + .mpu_irqs = omap2_timer10_mpu_irqs, .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -715,10 +674,6 @@ static struct omap_hwmod omap2420_timer10_hwmod = { /* timer11 */ static struct omap_hwmod omap2420_timer11_hwmod; -static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { - { .irq = 47, }, - { .irq = -1 } -}; /* l4_core -> timer11 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { @@ -737,7 +692,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = { /* timer11 hwmod */ static struct omap_hwmod omap2420_timer11_hwmod = { .name = "timer11", - .mpu_irqs = omap2420_timer11_mpu_irqs, + .mpu_irqs = omap2_timer11_mpu_irqs, .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -756,10 +711,6 @@ static struct omap_hwmod omap2420_timer11_hwmod = { /* timer12 */ static struct omap_hwmod omap2420_timer12_hwmod; -static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { - { .irq = 48, }, - { .irq = -1 } -}; /* l4_core -> timer12 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { @@ -778,7 +729,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = { /* timer12 hwmod */ static struct omap_hwmod omap2420_timer12_hwmod = { .name = "timer12", - .mpu_irqs = omap2420_timer12_mpu_irqs, + .mpu_irqs = omap2xxx_timer12_mpu_irqs, .main_clk = "gpt12_fck", .prcm = { .omap2 = { @@ -877,11 +828,6 @@ static struct omap_hwmod_class uart_class = { /* UART1 */ -static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { - { .irq = INT_24XX_UART1_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, @@ -893,7 +839,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { static struct omap_hwmod omap2420_uart1_hwmod = { .name = "uart1", - .mpu_irqs = uart1_mpu_irqs, + .mpu_irqs = omap2_uart1_mpu_irqs, .sdma_reqs = uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -914,11 +860,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = { /* UART2 */ -static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { - { .irq = INT_24XX_UART2_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, @@ -930,7 +871,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { static struct omap_hwmod omap2420_uart2_hwmod = { .name = "uart2", - .mpu_irqs = uart2_mpu_irqs, + .mpu_irqs = omap2_uart2_mpu_irqs, .sdma_reqs = uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -951,11 +892,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = { /* UART3 */ -static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { - { .irq = INT_24XX_UART3_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, @@ -967,7 +903,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { static struct omap_hwmod omap2420_uart3_hwmod = { .name = "uart3", - .mpu_irqs = uart3_mpu_irqs, + .mpu_irqs = omap2_uart3_mpu_irqs, .sdma_reqs = uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -1085,11 +1021,6 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = { .sysc = &omap2420_dispc_sysc, }; -static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { - { .irq = 25 }, - { .irq = -1 } -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { .master = &omap2420_l4_core_hwmod, @@ -1113,7 +1044,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = { static struct omap_hwmod omap2420_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap2420_dispc_hwmod_class, - .mpu_irqs = omap2420_dispc_irqs, + .mpu_irqs = omap2_dispc_irqs, .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1252,11 +1183,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr; /* I2C1 */ -static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { - { .irq = INT_24XX_I2C1_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, @@ -1268,7 +1194,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { static struct omap_hwmod omap2420_i2c1_hwmod = { .name = "i2c1", - .mpu_irqs = i2c1_mpu_irqs, + .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2c1_fck", @@ -1291,11 +1217,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { /* I2C2 */ -static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { - { .irq = INT_24XX_I2C2_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, @@ -1307,7 +1228,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { static struct omap_hwmod omap2420_i2c2_hwmod = { .name = "i2c2", - .mpu_irqs = i2c2_mpu_irqs, + .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2c2_fck", @@ -1428,11 +1349,6 @@ static struct omap_hwmod_class omap242x_gpio_hwmod_class = { }; /* gpio1 */ -static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = { - { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ - { .irq = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { &omap2420_l4_wkup__gpio1, }; @@ -1440,7 +1356,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { static struct omap_hwmod omap2420_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap242x_gpio1_irqs, + .mpu_irqs = omap2_gpio1_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1459,11 +1375,6 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { }; /* gpio2 */ -static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = { - { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ - { .irq = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { &omap2420_l4_wkup__gpio2, }; @@ -1471,7 +1382,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { static struct omap_hwmod omap2420_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap242x_gpio2_irqs, + .mpu_irqs = omap2_gpio2_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1490,11 +1401,6 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { }; /* gpio3 */ -static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = { - { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ - { .irq = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { &omap2420_l4_wkup__gpio3, }; @@ -1502,7 +1408,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { static struct omap_hwmod omap2420_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap242x_gpio3_irqs, + .mpu_irqs = omap2_gpio3_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1521,11 +1427,6 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { }; /* gpio4 */ -static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = { - { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ - { .irq = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { &omap2420_l4_wkup__gpio4, }; @@ -1533,7 +1434,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { static struct omap_hwmod omap2420_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap242x_gpio4_irqs, + .mpu_irqs = omap2_gpio4_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1575,14 +1476,6 @@ static struct omap_dma_dev_attr dma_dev_attr = { .lch_count = 32, }; -static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { - { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ - { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ - { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ - { .irq = -1 } -}; - /* dma_system -> L3 */ static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { .master = &omap2420_dma_system_hwmod, @@ -1613,7 +1506,7 @@ static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = { static struct omap_hwmod omap2420_dma_system_hwmod = { .name = "dma", .class = &omap2420_dma_hwmod_class, - .mpu_irqs = omap2420_dma_system_irqs, + .mpu_irqs = omap2_dma_system_irqs, .main_clk = "core_l3_ck", .slaves = omap2420_dma_system_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves), @@ -1709,11 +1602,6 @@ static struct omap_hwmod_class omap2420_mcspi_class = { }; /* mcspi1 */ -static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = { - { .irq = 65 }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ @@ -1735,7 +1623,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap2420_mcspi1_hwmod = { .name = "mcspi1_hwmod", - .mpu_irqs = omap2420_mcspi1_mpu_irqs, + .mpu_irqs = omap2_mcspi1_mpu_irqs, .sdma_reqs = omap2420_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -1756,11 +1644,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { }; /* mcspi2 */ -static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = { - { .irq = 66 }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ @@ -1778,7 +1661,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap2420_mcspi2_hwmod = { .name = "mcspi2_hwmod", - .mpu_irqs = omap2420_mcspi2_mpu_irqs, + .mpu_irqs = omap2_mcspi2_mpu_irqs, .sdma_reqs = omap2420_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 2c28468a37f8..62ecc685f1a2 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -367,10 +367,6 @@ static struct omap_hwmod_class omap2430_timer_hwmod_class = { /* timer1 */ static struct omap_hwmod omap2430_timer1_hwmod; -static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = { - { .irq = 37, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { { @@ -398,7 +394,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = { /* timer1 hwmod */ static struct omap_hwmod omap2430_timer1_hwmod = { .name = "timer1", - .mpu_irqs = omap2430_timer1_mpu_irqs, + .mpu_irqs = omap2_timer1_mpu_irqs, .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -417,10 +413,6 @@ static struct omap_hwmod omap2430_timer1_hwmod = { /* timer2 */ static struct omap_hwmod omap2430_timer2_hwmod; -static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { - { .irq = 38, }, - { .irq = -1 } -}; /* l4_core -> timer2 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { @@ -439,7 +431,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = { /* timer2 hwmod */ static struct omap_hwmod omap2430_timer2_hwmod = { .name = "timer2", - .mpu_irqs = omap2430_timer2_mpu_irqs, + .mpu_irqs = omap2_timer2_mpu_irqs, .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -458,10 +450,6 @@ static struct omap_hwmod omap2430_timer2_hwmod = { /* timer3 */ static struct omap_hwmod omap2430_timer3_hwmod; -static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { - { .irq = 39, }, - { .irq = -1 } -}; /* l4_core -> timer3 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { @@ -480,7 +468,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = { /* timer3 hwmod */ static struct omap_hwmod omap2430_timer3_hwmod = { .name = "timer3", - .mpu_irqs = omap2430_timer3_mpu_irqs, + .mpu_irqs = omap2_timer3_mpu_irqs, .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -499,10 +487,6 @@ static struct omap_hwmod omap2430_timer3_hwmod = { /* timer4 */ static struct omap_hwmod omap2430_timer4_hwmod; -static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { - { .irq = 40, }, - { .irq = -1 } -}; /* l4_core -> timer4 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { @@ -521,7 +505,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = { /* timer4 hwmod */ static struct omap_hwmod omap2430_timer4_hwmod = { .name = "timer4", - .mpu_irqs = omap2430_timer4_mpu_irqs, + .mpu_irqs = omap2_timer4_mpu_irqs, .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -540,10 +524,6 @@ static struct omap_hwmod omap2430_timer4_hwmod = { /* timer5 */ static struct omap_hwmod omap2430_timer5_hwmod; -static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { - { .irq = 41, }, - { .irq = -1 } -}; /* l4_core -> timer5 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { @@ -562,7 +542,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = { /* timer5 hwmod */ static struct omap_hwmod omap2430_timer5_hwmod = { .name = "timer5", - .mpu_irqs = omap2430_timer5_mpu_irqs, + .mpu_irqs = omap2_timer5_mpu_irqs, .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -581,10 +561,6 @@ static struct omap_hwmod omap2430_timer5_hwmod = { /* timer6 */ static struct omap_hwmod omap2430_timer6_hwmod; -static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { - { .irq = 42, }, - { .irq = -1 } -}; /* l4_core -> timer6 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { @@ -603,7 +579,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = { /* timer6 hwmod */ static struct omap_hwmod omap2430_timer6_hwmod = { .name = "timer6", - .mpu_irqs = omap2430_timer6_mpu_irqs, + .mpu_irqs = omap2_timer6_mpu_irqs, .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -622,10 +598,6 @@ static struct omap_hwmod omap2430_timer6_hwmod = { /* timer7 */ static struct omap_hwmod omap2430_timer7_hwmod; -static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { - { .irq = 43, }, - { .irq = -1 } -}; /* l4_core -> timer7 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { @@ -644,7 +616,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = { /* timer7 hwmod */ static struct omap_hwmod omap2430_timer7_hwmod = { .name = "timer7", - .mpu_irqs = omap2430_timer7_mpu_irqs, + .mpu_irqs = omap2_timer7_mpu_irqs, .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -663,10 +635,6 @@ static struct omap_hwmod omap2430_timer7_hwmod = { /* timer8 */ static struct omap_hwmod omap2430_timer8_hwmod; -static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { - { .irq = 44, }, - { .irq = -1 } -}; /* l4_core -> timer8 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { @@ -685,7 +653,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = { /* timer8 hwmod */ static struct omap_hwmod omap2430_timer8_hwmod = { .name = "timer8", - .mpu_irqs = omap2430_timer8_mpu_irqs, + .mpu_irqs = omap2_timer8_mpu_irqs, .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -704,10 +672,6 @@ static struct omap_hwmod omap2430_timer8_hwmod = { /* timer9 */ static struct omap_hwmod omap2430_timer9_hwmod; -static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { - { .irq = 45, }, - { .irq = -1 } -}; /* l4_core -> timer9 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { @@ -726,7 +690,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = { /* timer9 hwmod */ static struct omap_hwmod omap2430_timer9_hwmod = { .name = "timer9", - .mpu_irqs = omap2430_timer9_mpu_irqs, + .mpu_irqs = omap2_timer9_mpu_irqs, .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -745,10 +709,6 @@ static struct omap_hwmod omap2430_timer9_hwmod = { /* timer10 */ static struct omap_hwmod omap2430_timer10_hwmod; -static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { - { .irq = 46, }, - { .irq = -1 } -}; /* l4_core -> timer10 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { @@ -767,7 +727,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = { /* timer10 hwmod */ static struct omap_hwmod omap2430_timer10_hwmod = { .name = "timer10", - .mpu_irqs = omap2430_timer10_mpu_irqs, + .mpu_irqs = omap2_timer10_mpu_irqs, .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -786,10 +746,6 @@ static struct omap_hwmod omap2430_timer10_hwmod = { /* timer11 */ static struct omap_hwmod omap2430_timer11_hwmod; -static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { - { .irq = 47, }, - { .irq = -1 } -}; /* l4_core -> timer11 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { @@ -808,7 +764,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = { /* timer11 hwmod */ static struct omap_hwmod omap2430_timer11_hwmod = { .name = "timer11", - .mpu_irqs = omap2430_timer11_mpu_irqs, + .mpu_irqs = omap2_timer11_mpu_irqs, .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -827,10 +783,6 @@ static struct omap_hwmod omap2430_timer11_hwmod = { /* timer12 */ static struct omap_hwmod omap2430_timer12_hwmod; -static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { - { .irq = 48, }, - { .irq = -1 } -}; /* l4_core -> timer12 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { @@ -849,7 +801,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = { /* timer12 hwmod */ static struct omap_hwmod omap2430_timer12_hwmod = { .name = "timer12", - .mpu_irqs = omap2430_timer12_mpu_irqs, + .mpu_irqs = omap2xxx_timer12_mpu_irqs, .main_clk = "gpt12_fck", .prcm = { .omap2 = { @@ -948,11 +900,6 @@ static struct omap_hwmod_class uart_class = { /* UART1 */ -static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { - { .irq = INT_24XX_UART1_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, @@ -964,7 +911,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { static struct omap_hwmod omap2430_uart1_hwmod = { .name = "uart1", - .mpu_irqs = uart1_mpu_irqs, + .mpu_irqs = omap2_uart1_mpu_irqs, .sdma_reqs = uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -985,11 +932,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { /* UART2 */ -static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { - { .irq = INT_24XX_UART2_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, @@ -1001,7 +943,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { static struct omap_hwmod omap2430_uart2_hwmod = { .name = "uart2", - .mpu_irqs = uart2_mpu_irqs, + .mpu_irqs = omap2_uart2_mpu_irqs, .sdma_reqs = uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -1022,11 +964,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { /* UART3 */ -static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { - { .irq = INT_24XX_UART3_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, @@ -1038,7 +975,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { static struct omap_hwmod omap2430_uart3_hwmod = { .name = "uart3", - .mpu_irqs = uart3_mpu_irqs, + .mpu_irqs = omap2_uart3_mpu_irqs, .sdma_reqs = uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -1150,11 +1087,6 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = { .sysc = &omap2430_dispc_sysc, }; -static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { - { .irq = 25 }, - { .irq = -1 } -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { .master = &omap2430_l4_core_hwmod, @@ -1172,7 +1104,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = { static struct omap_hwmod omap2430_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap2430_dispc_hwmod_class, - .mpu_irqs = omap2430_dispc_irqs, + .mpu_irqs = omap2_dispc_irqs, .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1302,11 +1234,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { /* I2C1 */ -static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { - { .irq = INT_24XX_I2C1_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, @@ -1318,7 +1245,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { static struct omap_hwmod omap2430_i2c1_hwmod = { .name = "i2c1", - .mpu_irqs = i2c1_mpu_irqs, + .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2chs1_fck", @@ -1348,11 +1275,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { /* I2C2 */ -static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { - { .irq = INT_24XX_I2C2_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, @@ -1364,7 +1286,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { static struct omap_hwmod omap2430_i2c2_hwmod = { .name = "i2c2", - .mpu_irqs = i2c2_mpu_irqs, + .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2chs2_fck", @@ -1502,11 +1424,6 @@ static struct omap_hwmod_class omap243x_gpio_hwmod_class = { }; /* gpio1 */ -static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { - { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ - { .irq = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { &omap2430_l4_wkup__gpio1, }; @@ -1514,7 +1431,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { static struct omap_hwmod omap2430_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap243x_gpio1_irqs, + .mpu_irqs = omap2_gpio1_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1533,11 +1450,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { }; /* gpio2 */ -static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { - { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ - { .irq = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { &omap2430_l4_wkup__gpio2, }; @@ -1545,7 +1457,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { static struct omap_hwmod omap2430_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap243x_gpio2_irqs, + .mpu_irqs = omap2_gpio2_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1564,11 +1476,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { }; /* gpio3 */ -static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { - { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ - { .irq = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { &omap2430_l4_wkup__gpio3, }; @@ -1576,7 +1483,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { static struct omap_hwmod omap2430_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap243x_gpio3_irqs, + .mpu_irqs = omap2_gpio3_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1595,11 +1502,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { }; /* gpio4 */ -static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { - { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ - { .irq = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { &omap2430_l4_wkup__gpio4, }; @@ -1607,7 +1509,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { static struct omap_hwmod omap2430_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap243x_gpio4_irqs, + .mpu_irqs = omap2_gpio4_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1680,14 +1582,6 @@ static struct omap_dma_dev_attr dma_dev_attr = { .lch_count = 32, }; -static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { - { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ - { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ - { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ - { .irq = -1 } -}; - /* dma_system -> L3 */ static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { .master = &omap2430_dma_system_hwmod, @@ -1718,7 +1612,7 @@ static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = { static struct omap_hwmod omap2430_dma_system_hwmod = { .name = "dma", .class = &omap2430_dma_hwmod_class, - .mpu_irqs = omap2430_dma_system_irqs, + .mpu_irqs = omap2_dma_system_irqs, .main_clk = "core_l3_ck", .slaves = omap2430_dma_system_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), @@ -1813,11 +1707,6 @@ static struct omap_hwmod_class omap2430_mcspi_class = { }; /* mcspi1 */ -static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { - { .irq = 65 }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ @@ -1839,7 +1728,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap2430_mcspi1_hwmod = { .name = "mcspi1_hwmod", - .mpu_irqs = omap2430_mcspi1_mpu_irqs, + .mpu_irqs = omap2_mcspi1_mpu_irqs, .sdma_reqs = omap2430_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -1860,11 +1749,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { }; /* mcspi2 */ -static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { - { .irq = 66 }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ @@ -1882,7 +1766,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap2430_mcspi2_hwmod = { .name = "mcspi2_hwmod", - .mpu_irqs = omap2430_mcspi2_mpu_irqs, + .mpu_irqs = omap2_mcspi2_mpu_irqs, .sdma_reqs = omap2430_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c new file mode 100644 index 000000000000..245294b97f6e --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c @@ -0,0 +1,142 @@ +/* + * omap_hwmod_2xxx_3xxx_ipblock_data.c - common IP block data for OMAP2/3 + * + * Copyright (C) 2011 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include + +#include + +#include "omap_hwmod_common_data.h" + +struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = { + { .irq = 37, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[] = { + { .irq = 38, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[] = { + { .irq = 39, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[] = { + { .irq = 40, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[] = { + { .irq = 41, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[] = { + { .irq = 42, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[] = { + { .irq = 43, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[] = { + { .irq = 44, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[] = { + { .irq = 45, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[] = { + { .irq = 46, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[] = { + { .irq = 47, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[] = { + { .irq = INT_24XX_UART1_IRQ, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[] = { + { .irq = INT_24XX_UART2_IRQ, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[] = { + { .irq = INT_24XX_UART3_IRQ, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_dispc_irqs[] = { + { .irq = 25 }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[] = { + { .irq = INT_24XX_I2C1_IRQ, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[] = { + { .irq = INT_24XX_I2C2_IRQ, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_gpio1_irqs[] = { + { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_gpio2_irqs[] = { + { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_gpio3_irqs[] = { + { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_gpio4_irqs[] = { + { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_dma_system_irqs[] = { + { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ + { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ + { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ + { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[] = { + { .irq = 65 }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = { + { .irq = 66 }, + { .irq = -1 } +}; + + + diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c new file mode 100644 index 000000000000..5a078a652c33 --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c @@ -0,0 +1,21 @@ +/* + * omap_hwmod_2xxx_ipblock_data.c - common IP block data for OMAP2xxx + * + * Copyright (C) 2011 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include + +#include + +#include "omap_hwmod_common_data.h" + +struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = { + { .irq = 48, }, + { .irq = -1 } +}; diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index cc178b573fe2..6bac4bb14df3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -151,7 +151,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_l3_main_masters[] = { static struct omap_hwmod omap3xxx_l3_main_hwmod = { .name = "l3_main", .class = &l3_hwmod_class, - .mpu_irqs = omap3xxx_l3_main_irqs, + .mpu_irqs = omap3xxx_l3_main_irqs, .masters = omap3xxx_l3_main_masters, .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), .slaves = omap3xxx_l3_main_slaves, @@ -572,10 +572,6 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { /* timer1 */ static struct omap_hwmod omap3xxx_timer1_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = { - { .irq = 37, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { { @@ -603,7 +599,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = { /* timer1 hwmod */ static struct omap_hwmod omap3xxx_timer1_hwmod = { .name = "timer1", - .mpu_irqs = omap3xxx_timer1_mpu_irqs, + .mpu_irqs = omap2_timer1_mpu_irqs, .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -622,10 +618,6 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { /* timer2 */ static struct omap_hwmod omap3xxx_timer2_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = { - { .irq = 38, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { { @@ -653,7 +645,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer2_slaves[] = { /* timer2 hwmod */ static struct omap_hwmod omap3xxx_timer2_hwmod = { .name = "timer2", - .mpu_irqs = omap3xxx_timer2_mpu_irqs, + .mpu_irqs = omap2_timer2_mpu_irqs, .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -672,10 +664,6 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { /* timer3 */ static struct omap_hwmod omap3xxx_timer3_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = { - { .irq = 39, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { { @@ -703,7 +691,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer3_slaves[] = { /* timer3 hwmod */ static struct omap_hwmod omap3xxx_timer3_hwmod = { .name = "timer3", - .mpu_irqs = omap3xxx_timer3_mpu_irqs, + .mpu_irqs = omap2_timer3_mpu_irqs, .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -722,10 +710,6 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { /* timer4 */ static struct omap_hwmod omap3xxx_timer4_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = { - { .irq = 40, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { { @@ -753,7 +737,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer4_slaves[] = { /* timer4 hwmod */ static struct omap_hwmod omap3xxx_timer4_hwmod = { .name = "timer4", - .mpu_irqs = omap3xxx_timer4_mpu_irqs, + .mpu_irqs = omap2_timer4_mpu_irqs, .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -772,10 +756,6 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { /* timer5 */ static struct omap_hwmod omap3xxx_timer5_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = { - { .irq = 41, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { { @@ -803,7 +783,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer5_slaves[] = { /* timer5 hwmod */ static struct omap_hwmod omap3xxx_timer5_hwmod = { .name = "timer5", - .mpu_irqs = omap3xxx_timer5_mpu_irqs, + .mpu_irqs = omap2_timer5_mpu_irqs, .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -822,10 +802,6 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { /* timer6 */ static struct omap_hwmod omap3xxx_timer6_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = { - { .irq = 42, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { { @@ -853,7 +829,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer6_slaves[] = { /* timer6 hwmod */ static struct omap_hwmod omap3xxx_timer6_hwmod = { .name = "timer6", - .mpu_irqs = omap3xxx_timer6_mpu_irqs, + .mpu_irqs = omap2_timer6_mpu_irqs, .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -872,10 +848,6 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { /* timer7 */ static struct omap_hwmod omap3xxx_timer7_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = { - { .irq = 43, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { { @@ -903,7 +875,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer7_slaves[] = { /* timer7 hwmod */ static struct omap_hwmod omap3xxx_timer7_hwmod = { .name = "timer7", - .mpu_irqs = omap3xxx_timer7_mpu_irqs, + .mpu_irqs = omap2_timer7_mpu_irqs, .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -922,10 +894,6 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { /* timer8 */ static struct omap_hwmod omap3xxx_timer8_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = { - { .irq = 44, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { { @@ -953,7 +921,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer8_slaves[] = { /* timer8 hwmod */ static struct omap_hwmod omap3xxx_timer8_hwmod = { .name = "timer8", - .mpu_irqs = omap3xxx_timer8_mpu_irqs, + .mpu_irqs = omap2_timer8_mpu_irqs, .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -972,10 +940,6 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { /* timer9 */ static struct omap_hwmod omap3xxx_timer9_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = { - { .irq = 45, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { { @@ -1003,7 +967,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer9_slaves[] = { /* timer9 hwmod */ static struct omap_hwmod omap3xxx_timer9_hwmod = { .name = "timer9", - .mpu_irqs = omap3xxx_timer9_mpu_irqs, + .mpu_irqs = omap2_timer9_mpu_irqs, .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -1022,10 +986,6 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { /* timer10 */ static struct omap_hwmod omap3xxx_timer10_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { - { .irq = 46, }, - { .irq = -1 } -}; /* l4_core -> timer10 */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { @@ -1044,7 +1004,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer10_slaves[] = { /* timer10 hwmod */ static struct omap_hwmod omap3xxx_timer10_hwmod = { .name = "timer10", - .mpu_irqs = omap3xxx_timer10_mpu_irqs, + .mpu_irqs = omap2_timer10_mpu_irqs, .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -1063,10 +1023,6 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { /* timer11 */ static struct omap_hwmod omap3xxx_timer11_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { - { .irq = 47, }, - { .irq = -1 } -}; /* l4_core -> timer11 */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { @@ -1085,7 +1041,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer11_slaves[] = { /* timer11 hwmod */ static struct omap_hwmod omap3xxx_timer11_hwmod = { .name = "timer11", - .mpu_irqs = omap3xxx_timer11_mpu_irqs, + .mpu_irqs = omap2_timer11_mpu_irqs, .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -1254,11 +1210,6 @@ static struct omap_hwmod_class uart_class = { /* UART1 */ -static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { - { .irq = INT_24XX_UART1_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, @@ -1270,7 +1221,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { static struct omap_hwmod omap3xxx_uart1_hwmod = { .name = "uart1", - .mpu_irqs = uart1_mpu_irqs, + .mpu_irqs = omap2_uart1_mpu_irqs, .sdma_reqs = uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -1291,11 +1242,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { /* UART2 */ -static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { - { .irq = INT_24XX_UART2_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, @@ -1307,7 +1253,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { static struct omap_hwmod omap3xxx_uart2_hwmod = { .name = "uart2", - .mpu_irqs = uart2_mpu_irqs, + .mpu_irqs = omap2_uart2_mpu_irqs, .sdma_reqs = uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -1328,11 +1274,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { /* UART3 */ -static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { - { .irq = INT_24XX_UART3_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, @@ -1344,7 +1285,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { static struct omap_hwmod omap3xxx_uart3_hwmod = { .name = "uart3", - .mpu_irqs = uart3_mpu_irqs, + .mpu_irqs = omap2_uart3_mpu_irqs, .sdma_reqs = uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -1555,11 +1496,6 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { .sysc = &omap3xxx_dispc_sysc, }; -static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { - { .irq = 25 }, - { .irq = -1 } -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { .master = &omap3xxx_l4_core_hwmod, @@ -1584,7 +1520,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = { static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap3xxx_dispc_hwmod_class, - .mpu_irqs = omap3xxx_dispc_irqs, + .mpu_irqs = omap2_dispc_irqs, .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { @@ -1781,11 +1717,6 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { .fifo_depth = 8, /* bytes */ }; -static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { - { .irq = INT_24XX_I2C1_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, @@ -1797,7 +1728,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { static struct omap_hwmod omap3xxx_i2c1_hwmod = { .name = "i2c1", - .mpu_irqs = i2c1_mpu_irqs, + .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2c1_fck", @@ -1823,11 +1754,6 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { .fifo_depth = 8, /* bytes */ }; -static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { - { .irq = INT_24XX_I2C2_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, @@ -1839,7 +1765,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { static struct omap_hwmod omap3xxx_i2c2_hwmod = { .name = "i2c2", - .mpu_irqs = i2c2_mpu_irqs, + .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2c2_fck", @@ -2032,11 +1958,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { }; /* gpio1 */ -static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = { - { .irq = 29 }, /* INT_34XX_GPIO_BANK1 */ - { .irq = -1 } -}; - static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { { .role = "dbclk", .clk = "gpio1_dbck", }, }; @@ -2048,7 +1969,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio1_slaves[] = { static struct omap_hwmod omap3xxx_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap3xxx_gpio1_irqs, + .mpu_irqs = omap2_gpio1_irqs, .main_clk = "gpio1_ick", .opt_clks = gpio1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), @@ -2069,11 +1990,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = { }; /* gpio2 */ -static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = { - { .irq = 30 }, /* INT_34XX_GPIO_BANK2 */ - { .irq = -1 } -}; - static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { { .role = "dbclk", .clk = "gpio2_dbck", }, }; @@ -2085,7 +2001,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio2_slaves[] = { static struct omap_hwmod omap3xxx_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap3xxx_gpio2_irqs, + .mpu_irqs = omap2_gpio2_irqs, .main_clk = "gpio2_ick", .opt_clks = gpio2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), @@ -2106,11 +2022,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = { }; /* gpio3 */ -static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = { - { .irq = 31 }, /* INT_34XX_GPIO_BANK3 */ - { .irq = -1 } -}; - static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { { .role = "dbclk", .clk = "gpio3_dbck", }, }; @@ -2122,7 +2033,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio3_slaves[] = { static struct omap_hwmod omap3xxx_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap3xxx_gpio3_irqs, + .mpu_irqs = omap2_gpio3_irqs, .main_clk = "gpio3_ick", .opt_clks = gpio3_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), @@ -2143,11 +2054,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = { }; /* gpio4 */ -static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = { - { .irq = 32 }, /* INT_34XX_GPIO_BANK4 */ - { .irq = -1 } -}; - static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { { .role = "dbclk", .clk = "gpio4_dbck", }, }; @@ -2159,7 +2065,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio4_slaves[] = { static struct omap_hwmod omap3xxx_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap3xxx_gpio4_irqs, + .mpu_irqs = omap2_gpio4_irqs, .main_clk = "gpio4_ick", .opt_clks = gpio4_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), @@ -2287,14 +2193,6 @@ static struct omap_hwmod_class omap3xxx_dma_hwmod_class = { }; /* dma_system */ -static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = { - { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ - { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ - { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ - { .irq = -1 } -}; - static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { { .pa_start = 0x48056000, @@ -2326,7 +2224,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dma_system_slaves[] = { static struct omap_hwmod omap3xxx_dma_system_hwmod = { .name = "dma", .class = &omap3xxx_dma_hwmod_class, - .mpu_irqs = omap3xxx_dma_system_irqs, + .mpu_irqs = omap2_dma_system_irqs, .main_clk = "core_l3_ick", .prcm = { .omap2 = { @@ -3044,11 +2942,6 @@ static struct omap_hwmod_class omap34xx_mcspi_class = { }; /* mcspi1 */ -static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = { - { .name = "irq", .irq = 65 }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { { .name = "tx0", .dma_req = 35 }, { .name = "rx0", .dma_req = 36 }, @@ -3070,7 +2963,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap34xx_mcspi1 = { .name = "mcspi1", - .mpu_irqs = omap34xx_mcspi1_mpu_irqs, + .mpu_irqs = omap2_mcspi1_mpu_irqs, .sdma_reqs = omap34xx_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -3091,11 +2984,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { }; /* mcspi2 */ -static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = { - { .name = "irq", .irq = 66 }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { { .name = "tx0", .dma_req = 43 }, { .name = "rx0", .dma_req = 44 }, @@ -3113,7 +3001,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap34xx_mcspi2 = { .name = "mcspi2", - .mpu_irqs = omap34xx_mcspi2_mpu_irqs, + .mpu_irqs = omap2_mcspi2_mpu_irqs, .sdma_reqs = omap34xx_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index 76a2f11e5f4e..1ac878c46af3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h @@ -49,6 +49,35 @@ extern struct omap_hwmod_addr_space omap2_dma_system_addrs[]; extern struct omap_hwmod_addr_space omap2_mailbox_addrs[]; extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; +/* Common IP block data across OMAP2xxx */ +extern struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[]; + +/* Common IP block data across OMAP2/3 */ +extern struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_dispc_irqs[]; +extern struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_gpio1_irqs[]; +extern struct omap_hwmod_irq_info omap2_gpio2_irqs[]; +extern struct omap_hwmod_irq_info omap2_gpio3_irqs[]; +extern struct omap_hwmod_irq_info omap2_gpio4_irqs[]; +extern struct omap_hwmod_irq_info omap2_dma_system_irqs[]; +extern struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[]; + /* OMAP hwmod classes - forward declarations */ extern struct omap_hwmod_class l3_hwmod_class; extern struct omap_hwmod_class l4_hwmod_class; From bc6149587b309e3231e5ac7138b84197813e17ec Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:07 -0600 Subject: [PATCH 21/56] omap_hwmod: use a terminator record with omap_hwmod_dma_info arrays Previously, struct omap_hwmod_dma_info arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_dma_info arrays and uses a sentinel value (irq == -1) as the array terminator instead. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 30 +++++++++- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 20 +++---- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 32 +++++------ arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 43 +++++++------- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 60 ++++++++++---------- arch/arm/plat-omap/include/plat/omap_hwmod.h | 8 +-- 6 files changed, 106 insertions(+), 87 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 21e3eb8e83c1..d1a8bdefea3f 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -701,6 +701,29 @@ static int _count_mpu_irqs(struct omap_hwmod *oh) return i; } +/** + * _count_sdma_reqs - count the number of SDMA request lines associated with @oh + * @oh: struct omap_hwmod *oh + * + * Count and return the number of SDMA request lines associated with + * the hwmod @oh. Used to allocate struct resource data. Returns 0 + * if @oh is NULL. + */ +static int _count_sdma_reqs(struct omap_hwmod *oh) +{ + struct omap_hwmod_dma_info *ohdi; + int i = 0; + + if (!oh || !oh->sdma_reqs) + return 0; + + do { + ohdi = &oh->sdma_reqs[i++]; + } while (ohdi->dma_req != -1); + + return i; +} + /** * _count_ocp_if_addr_spaces - count the number of address space entries for @oh * @oh: struct omap_hwmod *oh @@ -1987,7 +2010,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) { int ret, i; - ret = _count_mpu_irqs(oh) + oh->sdma_reqs_cnt; + ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh); for (i = 0; i < oh->slaves_cnt; i++) ret += _count_ocp_if_addr_spaces(oh->slaves[i]); @@ -2007,7 +2030,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) */ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) { - int i, j, mpu_irqs_cnt; + int i, j, mpu_irqs_cnt, sdma_reqs_cnt; int r = 0; /* For each IRQ, DMA, memory area, fill in array.*/ @@ -2021,7 +2044,8 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) r++; } - for (i = 0; i < oh->sdma_reqs_cnt; i++) { + sdma_reqs_cnt = _count_sdma_reqs(oh); + for (i = 0; i < sdma_reqs_cnt; i++) { (res + r)->name = (oh->sdma_reqs + i)->name; (res + r)->start = (oh->sdma_reqs + i)->dma_req; (res + r)->end = (oh->sdma_reqs + i)->dma_req; diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 73157eef2590..60c817e63c3b 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -831,6 +831,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { @@ -841,7 +842,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = { .name = "uart1", .mpu_irqs = omap2_uart1_mpu_irqs, .sdma_reqs = uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", .prcm = { .omap2 = { @@ -863,6 +863,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = { static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { @@ -873,7 +874,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = { .name = "uart2", .mpu_irqs = omap2_uart2_mpu_irqs, .sdma_reqs = uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", .prcm = { .omap2 = { @@ -895,6 +895,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = { static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { @@ -905,7 +906,6 @@ static struct omap_hwmod omap2420_uart3_hwmod = { .name = "uart3", .mpu_irqs = omap2_uart3_mpu_irqs, .sdma_reqs = uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", .prcm = { .omap2 = { @@ -942,6 +942,7 @@ static struct omap_hwmod_class omap2420_dss_hwmod_class = { static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, + { .dma_req = -1 } }; /* dss */ @@ -980,7 +981,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { .class = &omap2420_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ .sdma_reqs = omap2420_dss_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_dss_sdma_chs), .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1186,6 +1186,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr; static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { @@ -1196,7 +1197,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2c1_fck", .prcm = { .omap2 = { @@ -1220,6 +1220,7 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { @@ -1230,7 +1231,6 @@ static struct omap_hwmod omap2420_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2c2_fck", .prcm = { .omap2 = { @@ -1611,6 +1611,7 @@ static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { @@ -1625,7 +1626,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2_mcspi1_mpu_irqs, .sdma_reqs = omap2420_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -1649,6 +1649,7 @@ static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { @@ -1663,7 +1664,6 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2_mcspi2_mpu_irqs, .sdma_reqs = omap2420_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", .prcm = { .omap2 = { @@ -1700,6 +1700,7 @@ static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { { .name = "rx", .dma_req = 32 }, { .name = "tx", .dma_req = 31 }, + { .dma_req = -1 } }; /* l4_core -> mcbsp1 */ @@ -1721,7 +1722,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp1_irqs, .sdma_reqs = omap2420_mcbsp1_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -1747,6 +1747,7 @@ static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { { .name = "rx", .dma_req = 34 }, { .name = "tx", .dma_req = 33 }, + { .dma_req = -1 } }; /* l4_core -> mcbsp2 */ @@ -1768,7 +1769,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp2_irqs, .sdma_reqs = omap2420_mcbsp2_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 62ecc685f1a2..af758b3e723c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -903,6 +903,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { @@ -913,7 +914,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { .name = "uart1", .mpu_irqs = omap2_uart1_mpu_irqs, .sdma_reqs = uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", .prcm = { .omap2 = { @@ -935,6 +935,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = { static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { @@ -945,7 +946,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { .name = "uart2", .mpu_irqs = omap2_uart2_mpu_irqs, .sdma_reqs = uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", .prcm = { .omap2 = { @@ -967,6 +967,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = { static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { @@ -977,7 +978,6 @@ static struct omap_hwmod omap2430_uart3_hwmod = { .name = "uart3", .mpu_irqs = omap2_uart3_mpu_irqs, .sdma_reqs = uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", .prcm = { .omap2 = { @@ -1014,6 +1014,7 @@ static struct omap_hwmod_class omap2430_dss_hwmod_class = { static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, + { .dma_req = -1 } }; /* dss */ @@ -1046,7 +1047,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { .class = &omap2430_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ .sdma_reqs = omap2430_dss_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_dss_sdma_chs), .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1237,6 +1237,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { @@ -1247,7 +1248,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2chs1_fck", .prcm = { .omap2 = { @@ -1278,6 +1278,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { @@ -1288,7 +1289,6 @@ static struct omap_hwmod omap2430_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2chs2_fck", .prcm = { .omap2 = { @@ -1716,6 +1716,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { @@ -1730,7 +1731,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2_mcspi1_mpu_irqs, .sdma_reqs = omap2430_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -1754,6 +1754,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { @@ -1768,7 +1769,6 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2_mcspi2_mpu_irqs, .sdma_reqs = omap2430_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", .prcm = { .omap2 = { @@ -1797,6 +1797,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */ { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */ { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = { @@ -1811,7 +1812,6 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = { .name = "mcspi3_hwmod", .mpu_irqs = omap2430_mcspi3_mpu_irqs, .sdma_reqs = omap2430_mcspi3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", .prcm = { .omap2 = { @@ -1915,6 +1915,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { { .name = "rx", .dma_req = 32 }, { .name = "tx", .dma_req = 31 }, + { .dma_req = -1 } }; /* l4_core -> mcbsp1 */ @@ -1936,7 +1937,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp1_irqs, .sdma_reqs = omap2430_mcbsp1_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -1963,6 +1963,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { { .name = "rx", .dma_req = 34 }, { .name = "tx", .dma_req = 33 }, + { .dma_req = -1 } }; /* l4_core -> mcbsp2 */ @@ -1984,7 +1985,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp2_irqs, .sdma_reqs = omap2430_mcbsp2_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { @@ -2011,6 +2011,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { { .name = "rx", .dma_req = 18 }, { .name = "tx", .dma_req = 17 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { @@ -2042,7 +2043,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp3_irqs, .sdma_reqs = omap2430_mcbsp3_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs), .main_clk = "mcbsp3_fck", .prcm = { .omap2 = { @@ -2069,6 +2069,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = { static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { { .name = "rx", .dma_req = 20 }, { .name = "tx", .dma_req = 19 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { @@ -2100,7 +2101,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = { .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp4_irqs, .sdma_reqs = omap2430_mcbsp4_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs), .main_clk = "mcbsp4_fck", .prcm = { .omap2 = { @@ -2127,6 +2127,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = { static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { { .name = "rx", .dma_req = 22 }, { .name = "tx", .dma_req = 21 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { @@ -2158,7 +2159,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = { .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp5_irqs, .sdma_reqs = omap2430_mcbsp5_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs), .main_clk = "mcbsp5_fck", .prcm = { .omap2 = { @@ -2202,6 +2202,7 @@ static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = { static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */ { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */ + { .dma_req = -1 } }; static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = { @@ -2221,7 +2222,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap2430_mmc1_mpu_irqs, .sdma_reqs = omap2430_mmc1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs), .opt_clks = omap2430_mmc1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks), .main_clk = "mmchs1_fck", @@ -2251,6 +2251,7 @@ static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = { static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */ { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */ + { .dma_req = -1 } }; static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = { @@ -2266,7 +2267,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = { .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap2430_mmc2_mpu_irqs, .sdma_reqs = omap2430_mmc2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs), .opt_clks = omap2430_mmc2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks), .main_clk = "mmchs2_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 6bac4bb14df3..265f0b10e5ca 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1213,6 +1213,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { @@ -1223,7 +1224,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { .name = "uart1", .mpu_irqs = omap2_uart1_mpu_irqs, .sdma_reqs = uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", .prcm = { .omap2 = { @@ -1245,6 +1245,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { @@ -1255,7 +1256,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { .name = "uart2", .mpu_irqs = omap2_uart2_mpu_irqs, .sdma_reqs = uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", .prcm = { .omap2 = { @@ -1277,6 +1277,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { @@ -1287,7 +1288,6 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = { .name = "uart3", .mpu_irqs = omap2_uart3_mpu_irqs, .sdma_reqs = uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", .prcm = { .omap2 = { @@ -1314,6 +1314,7 @@ static struct omap_hwmod_irq_info uart4_mpu_irqs[] = { static struct omap_hwmod_dma_info uart4_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP36XX_DMA_UART4_RX, }, { .name = "tx", .dma_req = OMAP36XX_DMA_UART4_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = { @@ -1324,7 +1325,6 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { .name = "uart4", .mpu_irqs = uart4_mpu_irqs, .sdma_reqs = uart4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart4_sdma_reqs), .main_clk = "uart4_fck", .prcm = { .omap2 = { @@ -1367,6 +1367,7 @@ static struct omap_hwmod_class omap3xxx_dss_hwmod_class = { static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, { .name = "dsi1", .dma_req = 74 }, + { .dma_req = -1 } }; /* dss */ @@ -1426,8 +1427,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = { .class = &omap3xxx_dss_hwmod_class, .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ .sdma_reqs = omap3xxx_dss_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), - .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1452,8 +1451,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = { .class = &omap3xxx_dss_hwmod_class, .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ .sdma_reqs = omap3xxx_dss_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), - .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1720,6 +1717,7 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { @@ -1730,7 +1728,6 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2c1_fck", .prcm = { .omap2 = { @@ -1757,6 +1754,7 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { @@ -1767,7 +1765,6 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2c2_fck", .prcm = { .omap2 = { @@ -1799,6 +1796,7 @@ static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP34XX_DMA_I2C3_TX }, { .name = "rx", .dma_req = OMAP34XX_DMA_I2C3_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = { @@ -1809,7 +1807,6 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = { .name = "i2c3", .mpu_irqs = i2c3_mpu_irqs, .sdma_reqs = i2c3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c3_sdma_reqs), .main_clk = "i2c3_fck", .prcm = { .omap2 = { @@ -2275,6 +2272,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { { .name = "rx", .dma_req = 32 }, { .name = "tx", .dma_req = 31 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { @@ -2306,7 +2304,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp1_irqs, .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -2333,6 +2330,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = { static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { { .name = "rx", .dma_req = 34 }, { .name = "tx", .dma_req = 33 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { @@ -2369,7 +2367,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp2_irqs, .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { @@ -2397,6 +2394,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = { static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { { .name = "rx", .dma_req = 18 }, { .name = "tx", .dma_req = 17 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { @@ -2432,7 +2430,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp3_irqs, .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs), .main_clk = "mcbsp3_fck", .prcm = { .omap2 = { @@ -2460,6 +2457,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = { static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = { { .name = "rx", .dma_req = 20 }, { .name = "tx", .dma_req = 19 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = { @@ -2491,7 +2489,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp4_irqs, .sdma_reqs = omap3xxx_mcbsp4_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs), .main_clk = "mcbsp4_fck", .prcm = { .omap2 = { @@ -2518,6 +2515,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = { static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = { { .name = "rx", .dma_req = 22 }, { .name = "tx", .dma_req = 21 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = { @@ -2549,7 +2547,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp5_irqs, .sdma_reqs = omap3xxx_mcbsp5_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs), .main_clk = "mcbsp5_fck", .prcm = { .omap2 = { @@ -2951,6 +2948,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { { .name = "rx2", .dma_req = 40 }, { .name = "tx3", .dma_req = 41 }, { .name = "rx3", .dma_req = 42 }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = { @@ -2965,7 +2963,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { .name = "mcspi1", .mpu_irqs = omap2_mcspi1_mpu_irqs, .sdma_reqs = omap34xx_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -2989,6 +2986,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { { .name = "rx0", .dma_req = 44 }, { .name = "tx1", .dma_req = 45 }, { .name = "rx1", .dma_req = 46 }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = { @@ -3003,7 +3001,6 @@ static struct omap_hwmod omap34xx_mcspi2 = { .name = "mcspi2", .mpu_irqs = omap2_mcspi2_mpu_irqs, .sdma_reqs = omap34xx_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", .prcm = { .omap2 = { @@ -3032,6 +3029,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = { { .name = "rx0", .dma_req = 16 }, { .name = "tx1", .dma_req = 23 }, { .name = "rx1", .dma_req = 24 }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap34xx_mcspi3_slaves[] = { @@ -3046,7 +3044,6 @@ static struct omap_hwmod omap34xx_mcspi3 = { .name = "mcspi3", .mpu_irqs = omap34xx_mcspi3_mpu_irqs, .sdma_reqs = omap34xx_mcspi3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", .prcm = { .omap2 = { @@ -3073,6 +3070,7 @@ static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = { static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = { { .name = "tx0", .dma_req = 70 }, /* DMA_SPI4_TX0 */ { .name = "rx0", .dma_req = 71 }, /* DMA_SPI4_RX0 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap34xx_mcspi4_slaves[] = { @@ -3087,7 +3085,6 @@ static struct omap_hwmod omap34xx_mcspi4 = { .name = "mcspi4", .mpu_irqs = omap34xx_mcspi4_mpu_irqs, .sdma_reqs = omap34xx_mcspi4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs), .main_clk = "mcspi4_fck", .prcm = { .omap2 = { @@ -3218,6 +3215,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = { static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = { { .name = "tx", .dma_req = 61, }, { .name = "rx", .dma_req = 62, }, + { .dma_req = -1 } }; static struct omap_hwmod_opt_clk omap34xx_mmc1_opt_clks[] = { @@ -3236,7 +3234,6 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = { .name = "mmc1", .mpu_irqs = omap34xx_mmc1_mpu_irqs, .sdma_reqs = omap34xx_mmc1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs), .opt_clks = omap34xx_mmc1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc1_opt_clks), .main_clk = "mmchs1_fck", @@ -3266,6 +3263,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = { static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = { { .name = "tx", .dma_req = 47, }, { .name = "rx", .dma_req = 48, }, + { .dma_req = -1 } }; static struct omap_hwmod_opt_clk omap34xx_mmc2_opt_clks[] = { @@ -3280,7 +3278,6 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = { .name = "mmc2", .mpu_irqs = omap34xx_mmc2_mpu_irqs, .sdma_reqs = omap34xx_mmc2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs), .opt_clks = omap34xx_mmc2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc2_opt_clks), .main_clk = "mmchs2_fck", @@ -3309,6 +3306,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = { static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = { { .name = "tx", .dma_req = 77, }, { .name = "rx", .dma_req = 78, }, + { .dma_req = -1 } }; static struct omap_hwmod_opt_clk omap34xx_mmc3_opt_clks[] = { @@ -3323,7 +3321,6 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = { .name = "mmc3", .mpu_irqs = omap34xx_mmc3_mpu_irqs, .sdma_reqs = omap34xx_mmc3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs), .opt_clks = omap34xx_mmc3_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc3_opt_clks), .main_clk = "mmchs3_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index bbfc4db664b3..a93c4552a571 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -684,6 +684,7 @@ static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = { { .name = "fifo5", .dma_req = 105 + OMAP44XX_DMA_REQ_START }, { .name = "fifo6", .dma_req = 106 + OMAP44XX_DMA_REQ_START }, { .name = "fifo7", .dma_req = 107 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; /* aess master ports */ @@ -738,7 +739,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = { .class = &omap44xx_aess_hwmod_class, .mpu_irqs = omap44xx_aess_irqs, .sdma_reqs = omap44xx_aess_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_aess_sdma_reqs), .main_clk = "aess_fck", .prcm = { .omap4 = { @@ -953,6 +953,7 @@ static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = { static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = { { .dma_req = 66 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { @@ -1002,7 +1003,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { .class = &omap44xx_dmic_hwmod_class, .mpu_irqs = omap44xx_dmic_irqs, .sdma_reqs = omap44xx_dmic_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dmic_sdma_reqs), .main_clk = "dmic_fck", .prcm = { .omap4 = { @@ -1220,6 +1220,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = { static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = { { .dma_req = 5 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { @@ -1269,7 +1270,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .class = &omap44xx_dispc_hwmod_class, .mpu_irqs = omap44xx_dss_dispc_irqs, .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs), .main_clk = "dss_fck", .prcm = { .omap4 = { @@ -1311,6 +1311,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = { static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = { { .dma_req = 74 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { @@ -1360,7 +1361,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .class = &omap44xx_dsi_hwmod_class, .mpu_irqs = omap44xx_dss_dsi1_irqs, .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs), .main_clk = "dss_fck", .prcm = { .omap4 = { @@ -1381,6 +1381,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = { static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = { { .dma_req = 83 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { @@ -1430,7 +1431,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .class = &omap44xx_dsi_hwmod_class, .mpu_irqs = omap44xx_dss_dsi2_irqs, .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs), .main_clk = "dss_fck", .prcm = { .omap4 = { @@ -1471,6 +1471,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = { static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = { { .dma_req = 75 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { @@ -1520,7 +1521,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .class = &omap44xx_hdmi_hwmod_class, .mpu_irqs = omap44xx_dss_hdmi_irqs, .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs), .main_clk = "dss_fck", .prcm = { .omap4 = { @@ -1556,6 +1556,7 @@ static struct omap_hwmod_class omap44xx_rfbi_hwmod_class = { static struct omap_hwmod omap44xx_dss_rfbi_hwmod; static struct omap_hwmod_dma_info omap44xx_dss_rfbi_sdma_reqs[] = { { .dma_req = 13 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { @@ -1604,7 +1605,6 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { .name = "dss_rfbi", .class = &omap44xx_rfbi_hwmod_class, .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_sdma_reqs), .main_clk = "dss_fck", .prcm = { .omap4 = { @@ -2137,6 +2137,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = 26 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 27 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = { @@ -2168,7 +2169,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c1_irqs, .sdma_reqs = omap44xx_i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs), .main_clk = "i2c1_fck", .prcm = { .omap4 = { @@ -2190,6 +2190,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = { static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = 28 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 29 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = { @@ -2221,7 +2222,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c2_irqs, .sdma_reqs = omap44xx_i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs), .main_clk = "i2c2_fck", .prcm = { .omap4 = { @@ -2243,6 +2243,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = { static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = { { .name = "tx", .dma_req = 24 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 25 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = { @@ -2274,7 +2275,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c3_irqs, .sdma_reqs = omap44xx_i2c3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs), .main_clk = "i2c3_fck", .prcm = { .omap4 = { @@ -2296,6 +2296,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = { static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = { { .name = "tx", .dma_req = 123 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 124 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = { @@ -2327,7 +2328,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c4_irqs, .sdma_reqs = omap44xx_i2c4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs), .main_clk = "i2c4_fck", .prcm = { .omap4 = { @@ -2466,6 +2466,7 @@ static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = { { .name = "2", .dma_req = 9 + OMAP44XX_DMA_REQ_START }, { .name = "3", .dma_req = 11 + OMAP44XX_DMA_REQ_START }, { .name = "4", .dma_req = 12 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; /* iss master ports */ @@ -2505,7 +2506,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = { .class = &omap44xx_iss_hwmod_class, .mpu_irqs = omap44xx_iss_irqs, .sdma_reqs = omap44xx_iss_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_iss_sdma_reqs), .main_clk = "iss_fck", .prcm = { .omap4 = { @@ -2790,6 +2790,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { { .name = "tx", .dma_req = 32 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 33 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = { @@ -2841,7 +2842,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp1_irqs, .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs), .main_clk = "mcbsp1_fck", .prcm = { .omap4 = { @@ -2863,6 +2863,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { { .name = "tx", .dma_req = 16 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 17 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = { @@ -2914,7 +2915,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp2_irqs, .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs), .main_clk = "mcbsp2_fck", .prcm = { .omap4 = { @@ -2936,6 +2936,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { { .name = "tx", .dma_req = 18 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 19 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = { @@ -2987,7 +2988,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp3_irqs, .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs), .main_clk = "mcbsp3_fck", .prcm = { .omap4 = { @@ -3009,6 +3009,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { { .name = "tx", .dma_req = 30 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 31 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = { @@ -3039,7 +3040,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp4_irqs, .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs), .main_clk = "mcbsp4_fck", .prcm = { .omap4 = { @@ -3082,6 +3082,7 @@ static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = { { .name = "up_link", .dma_req = 64 + OMAP44XX_DMA_REQ_START }, { .name = "dn_link", .dma_req = 65 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = { @@ -3131,7 +3132,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { .class = &omap44xx_mcpdm_hwmod_class, .mpu_irqs = omap44xx_mcpdm_irqs, .sdma_reqs = omap44xx_mcpdm_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs), .main_clk = "mcpdm_fck", .prcm = { .omap4 = { @@ -3181,6 +3181,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = { { .name = "rx2", .dma_req = 39 + OMAP44XX_DMA_REQ_START }, { .name = "tx3", .dma_req = 40 + OMAP44XX_DMA_REQ_START }, { .name = "rx3", .dma_req = 41 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = { @@ -3216,7 +3217,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi1_irqs, .sdma_reqs = omap44xx_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", .prcm = { .omap4 = { @@ -3241,6 +3241,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = { { .name = "rx0", .dma_req = 43 + OMAP44XX_DMA_REQ_START }, { .name = "tx1", .dma_req = 44 + OMAP44XX_DMA_REQ_START }, { .name = "rx1", .dma_req = 45 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = { @@ -3276,7 +3277,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi2_irqs, .sdma_reqs = omap44xx_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", .prcm = { .omap4 = { @@ -3301,6 +3301,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = { { .name = "rx0", .dma_req = 15 + OMAP44XX_DMA_REQ_START }, { .name = "tx1", .dma_req = 22 + OMAP44XX_DMA_REQ_START }, { .name = "rx1", .dma_req = 23 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = { @@ -3336,7 +3337,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi3_irqs, .sdma_reqs = omap44xx_mcspi3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", .prcm = { .omap4 = { @@ -3359,6 +3359,7 @@ static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = { { .name = "tx0", .dma_req = 69 + OMAP44XX_DMA_REQ_START }, { .name = "rx0", .dma_req = 70 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = { @@ -3394,7 +3395,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi4_irqs, .sdma_reqs = omap44xx_mcspi4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs), .main_clk = "mcspi4_fck", .prcm = { .omap4 = { @@ -3439,6 +3439,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = { { .name = "tx", .dma_req = 60 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 61 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; /* mmc1 master ports */ @@ -3479,7 +3480,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc1_irqs, .sdma_reqs = omap44xx_mmc1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs), .main_clk = "mmc1_fck", .prcm = { .omap4 = { @@ -3503,6 +3503,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = { { .name = "tx", .dma_req = 46 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 47 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; /* mmc2 master ports */ @@ -3538,7 +3539,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc2_irqs, .sdma_reqs = omap44xx_mmc2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs), .main_clk = "mmc2_fck", .prcm = { .omap4 = { @@ -3562,6 +3562,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = { { .name = "tx", .dma_req = 76 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 77 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = { @@ -3592,7 +3593,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc3_irqs, .sdma_reqs = omap44xx_mmc3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs), .main_clk = "mmc3_fck", .prcm = { .omap4 = { @@ -3614,6 +3614,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = { { .name = "tx", .dma_req = 56 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 57 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = { @@ -3645,7 +3646,6 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { .mpu_irqs = omap44xx_mmc4_irqs, .sdma_reqs = omap44xx_mmc4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs), .main_clk = "mmc4_fck", .prcm = { .omap4 = { @@ -3667,6 +3667,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = { { .name = "tx", .dma_req = 58 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 59 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = { @@ -3697,7 +3698,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc5_irqs, .sdma_reqs = omap44xx_mmc5_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs), .main_clk = "mmc5_fck", .prcm = { .omap4 = { @@ -4617,6 +4617,7 @@ static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = { static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = { { .name = "tx", .dma_req = 48 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 49 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = { @@ -4647,7 +4648,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart1_irqs, .sdma_reqs = omap44xx_uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs), .main_clk = "uart1_fck", .prcm = { .omap4 = { @@ -4669,6 +4669,7 @@ static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = { static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = { { .name = "tx", .dma_req = 50 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 51 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = { @@ -4699,7 +4700,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart2_irqs, .sdma_reqs = omap44xx_uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs), .main_clk = "uart2_fck", .prcm = { .omap4 = { @@ -4721,6 +4721,7 @@ static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = { static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = { { .name = "tx", .dma_req = 52 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 53 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = { @@ -4752,7 +4753,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), .mpu_irqs = omap44xx_uart3_irqs, .sdma_reqs = omap44xx_uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs), .main_clk = "uart3_fck", .prcm = { .omap4 = { @@ -4774,6 +4774,7 @@ static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = { static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = { { .name = "tx", .dma_req = 54 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 55 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = { @@ -4804,7 +4805,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart4_irqs, .sdma_reqs = omap44xx_uart4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs), .main_clk = "uart4_fck", .prcm = { .omap4 = { diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 3bd6d1d9c0da..822556ea3789 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -112,7 +112,7 @@ struct omap_hwmod_irq_info { /** * struct omap_hwmod_dma_info - DMA channels used by the hwmod * @name: name of the DMA channel (module local name) - * @dma_req: DMA request ID + * @dma_req: DMA request ID (should be non-negative except -1 = terminator) * * @name should be something short, e.g., "tx" or "rx". It is for use * by platform_get_resource_byname(). It is defined locally to the @@ -120,7 +120,7 @@ struct omap_hwmod_irq_info { */ struct omap_hwmod_dma_info { const char *name; - u16 dma_req; + s16 dma_req; }; /** @@ -467,7 +467,7 @@ struct omap_hwmod_class { * @class: struct omap_hwmod_class * to the class of this hwmod * @od: struct omap_device currently associated with this hwmod (internal use) * @mpu_irqs: ptr to an array of MPU IRQs - * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt) + * @sdma_reqs: ptr to an array of System DMA request IDs * @prcm: PRCM data pertaining to this hwmod * @main_clk: main clock: OMAP clock name * @_clk: pointer to the main struct clk (filled in at runtime) @@ -480,7 +480,6 @@ struct omap_hwmod_class { * @_sysc_cache: internal-use hwmod flags * @_mpu_rt_va: cached register target start address (internal use) * @_mpu_port_index: cached MPU register target slave ID (internal use) - * @sdma_reqs_cnt: number of @sdma_reqs * @opt_clks_cnt: number of @opt_clks * @master_cnt: number of @master entries * @slaves_cnt: number of @slave entries @@ -528,7 +527,6 @@ struct omap_hwmod { u16 flags; u8 _mpu_port_index; u8 response_lat; - u8 sdma_reqs_cnt; u8 rst_lines_cnt; u8 opt_clks_cnt; u8 masters_cnt; From d826ebfa49aeb8a8f4d216165e5e00826741ad9c Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:07 -0600 Subject: [PATCH 22/56] omap_hwmod: share identical omap_hwmod_dma_info arrays To reduce kernel source file data duplication, share struct omap_hwmod_dma_info arrays across OMAP2xxx and 3xxx hwmod data files. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 87 ++--------------- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 95 +++---------------- .../omap_hwmod_2xxx_3xxx_ipblock_data.c | 92 ++++++++++++++++++ .../mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 6 ++ arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 89 ++--------------- arch/arm/mach-omap2/omap_hwmod_common_data.c | 20 ---- arch/arm/mach-omap2/omap_hwmod_common_data.h | 15 +++ 7 files changed, 144 insertions(+), 260 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 60c817e63c3b..6acc01f58902 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -828,12 +828,6 @@ static struct omap_hwmod_class uart_class = { /* UART1 */ -static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { &omap2_l4_core__uart1, }; @@ -841,7 +835,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { static struct omap_hwmod omap2420_uart1_hwmod = { .name = "uart1", .mpu_irqs = omap2_uart1_mpu_irqs, - .sdma_reqs = uart1_sdma_reqs, + .sdma_reqs = omap2_uart1_sdma_reqs, .main_clk = "uart1_fck", .prcm = { .omap2 = { @@ -860,12 +854,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = { /* UART2 */ -static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { &omap2_l4_core__uart2, }; @@ -873,7 +861,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { static struct omap_hwmod omap2420_uart2_hwmod = { .name = "uart2", .mpu_irqs = omap2_uart2_mpu_irqs, - .sdma_reqs = uart2_sdma_reqs, + .sdma_reqs = omap2_uart2_sdma_reqs, .main_clk = "uart2_fck", .prcm = { .omap2 = { @@ -892,12 +880,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = { /* UART3 */ -static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { &omap2_l4_core__uart3, }; @@ -905,7 +887,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { static struct omap_hwmod omap2420_uart3_hwmod = { .name = "uart3", .mpu_irqs = omap2_uart3_mpu_irqs, - .sdma_reqs = uart3_sdma_reqs, + .sdma_reqs = omap2_uart3_sdma_reqs, .main_clk = "uart3_fck", .prcm = { .omap2 = { @@ -940,11 +922,6 @@ static struct omap_hwmod_class omap2420_dss_hwmod_class = { .sysc = &omap2420_dss_sysc, }; -static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { - { .name = "dispc", .dma_req = 5 }, - { .dma_req = -1 } -}; - /* dss */ /* dss master ports */ static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { @@ -980,7 +957,7 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { .name = "dss_core", .class = &omap2420_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ - .sdma_reqs = omap2420_dss_sdma_chs, + .sdma_reqs = omap2xxx_dss_sdma_chs, .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1183,12 +1160,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr; /* I2C1 */ -static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { &omap2420_l4_core__i2c1, }; @@ -1196,7 +1167,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { static struct omap_hwmod omap2420_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = omap2_i2c1_mpu_irqs, - .sdma_reqs = i2c1_sdma_reqs, + .sdma_reqs = omap2_i2c1_sdma_reqs, .main_clk = "i2c1_fck", .prcm = { .omap2 = { @@ -1217,12 +1188,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { /* I2C2 */ -static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { &omap2420_l4_core__i2c2, }; @@ -1230,7 +1195,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { static struct omap_hwmod omap2420_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = omap2_i2c2_mpu_irqs, - .sdma_reqs = i2c2_sdma_reqs, + .sdma_reqs = omap2_i2c2_sdma_reqs, .main_clk = "i2c2_fck", .prcm = { .omap2 = { @@ -1602,18 +1567,6 @@ static struct omap_hwmod_class omap2420_mcspi_class = { }; /* mcspi1 */ -static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { - { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ - { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ - { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ - { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ - { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ - { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ - { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ - { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { &omap2420_l4_core__mcspi1, }; @@ -1625,7 +1578,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap2420_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2_mcspi1_mpu_irqs, - .sdma_reqs = omap2420_mcspi1_sdma_reqs, + .sdma_reqs = omap2_mcspi1_sdma_reqs, .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -1644,14 +1597,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { }; /* mcspi2 */ -static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { - { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ - { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ - { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { &omap2420_l4_core__mcspi2, }; @@ -1663,7 +1608,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap2420_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2_mcspi2_mpu_irqs, - .sdma_reqs = omap2420_mcspi2_sdma_reqs, + .sdma_reqs = omap2_mcspi2_sdma_reqs, .main_clk = "mcspi2_fck", .prcm = { .omap2 = { @@ -1697,12 +1642,6 @@ static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { - { .name = "rx", .dma_req = 32 }, - { .name = "tx", .dma_req = 31 }, - { .dma_req = -1 } -}; - /* l4_core -> mcbsp1 */ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { .master = &omap2420_l4_core_hwmod, @@ -1721,7 +1660,7 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp1_irqs, - .sdma_reqs = omap2420_mcbsp1_sdma_chs, + .sdma_reqs = omap2_mcbsp1_sdma_reqs, .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -1744,12 +1683,6 @@ static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { - { .name = "rx", .dma_req = 34 }, - { .name = "tx", .dma_req = 33 }, - { .dma_req = -1 } -}; - /* l4_core -> mcbsp2 */ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { .master = &omap2420_l4_core_hwmod, @@ -1768,7 +1701,7 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp2_irqs, - .sdma_reqs = omap2420_mcbsp2_sdma_chs, + .sdma_reqs = omap2_mcbsp2_sdma_reqs, .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index af758b3e723c..639acd598c92 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -900,12 +900,6 @@ static struct omap_hwmod_class uart_class = { /* UART1 */ -static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { &omap2_l4_core__uart1, }; @@ -913,7 +907,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { static struct omap_hwmod omap2430_uart1_hwmod = { .name = "uart1", .mpu_irqs = omap2_uart1_mpu_irqs, - .sdma_reqs = uart1_sdma_reqs, + .sdma_reqs = omap2_uart1_sdma_reqs, .main_clk = "uart1_fck", .prcm = { .omap2 = { @@ -932,12 +926,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { /* UART2 */ -static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { &omap2_l4_core__uart2, }; @@ -945,7 +933,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { static struct omap_hwmod omap2430_uart2_hwmod = { .name = "uart2", .mpu_irqs = omap2_uart2_mpu_irqs, - .sdma_reqs = uart2_sdma_reqs, + .sdma_reqs = omap2_uart2_sdma_reqs, .main_clk = "uart2_fck", .prcm = { .omap2 = { @@ -964,12 +952,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { /* UART3 */ -static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { &omap2_l4_core__uart3, }; @@ -977,7 +959,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { static struct omap_hwmod omap2430_uart3_hwmod = { .name = "uart3", .mpu_irqs = omap2_uart3_mpu_irqs, - .sdma_reqs = uart3_sdma_reqs, + .sdma_reqs = omap2_uart3_sdma_reqs, .main_clk = "uart3_fck", .prcm = { .omap2 = { @@ -1012,11 +994,6 @@ static struct omap_hwmod_class omap2430_dss_hwmod_class = { .sysc = &omap2430_dss_sysc, }; -static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { - { .name = "dispc", .dma_req = 5 }, - { .dma_req = -1 } -}; - /* dss */ /* dss master ports */ static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = { @@ -1046,7 +1023,7 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { .name = "dss_core", .class = &omap2430_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ - .sdma_reqs = omap2430_dss_sdma_chs, + .sdma_reqs = omap2xxx_dss_sdma_chs, .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1234,12 +1211,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { /* I2C1 */ -static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { &omap2430_l4_core__i2c1, }; @@ -1247,7 +1218,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { static struct omap_hwmod omap2430_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = omap2_i2c1_mpu_irqs, - .sdma_reqs = i2c1_sdma_reqs, + .sdma_reqs = omap2_i2c1_sdma_reqs, .main_clk = "i2chs1_fck", .prcm = { .omap2 = { @@ -1275,12 +1246,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { /* I2C2 */ -static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { &omap2430_l4_core__i2c2, }; @@ -1288,7 +1253,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { static struct omap_hwmod omap2430_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = omap2_i2c2_mpu_irqs, - .sdma_reqs = i2c2_sdma_reqs, + .sdma_reqs = omap2_i2c2_sdma_reqs, .main_clk = "i2chs2_fck", .prcm = { .omap2 = { @@ -1707,18 +1672,6 @@ static struct omap_hwmod_class omap2430_mcspi_class = { }; /* mcspi1 */ -static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { - { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ - { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ - { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ - { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ - { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ - { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ - { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ - { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { &omap2430_l4_core__mcspi1, }; @@ -1730,7 +1683,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap2430_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2_mcspi1_mpu_irqs, - .sdma_reqs = omap2430_mcspi1_sdma_reqs, + .sdma_reqs = omap2_mcspi1_sdma_reqs, .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -1749,14 +1702,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { }; /* mcspi2 */ -static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { - { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ - { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ - { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { &omap2430_l4_core__mcspi2, }; @@ -1768,7 +1713,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap2430_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2_mcspi2_mpu_irqs, - .sdma_reqs = omap2430_mcspi2_sdma_reqs, + .sdma_reqs = omap2_mcspi2_sdma_reqs, .main_clk = "mcspi2_fck", .prcm = { .omap2 = { @@ -1912,12 +1857,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { - { .name = "rx", .dma_req = 32 }, - { .name = "tx", .dma_req = 31 }, - { .dma_req = -1 } -}; - /* l4_core -> mcbsp1 */ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { .master = &omap2430_l4_core_hwmod, @@ -1936,7 +1875,7 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp1_irqs, - .sdma_reqs = omap2430_mcbsp1_sdma_chs, + .sdma_reqs = omap2_mcbsp1_sdma_reqs, .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -1960,12 +1899,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { - { .name = "rx", .dma_req = 34 }, - { .name = "tx", .dma_req = 33 }, - { .dma_req = -1 } -}; - /* l4_core -> mcbsp2 */ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { .master = &omap2430_l4_core_hwmod, @@ -1984,7 +1917,7 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp2_irqs, - .sdma_reqs = omap2430_mcbsp2_sdma_chs, + .sdma_reqs = omap2_mcbsp2_sdma_reqs, .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { @@ -2008,12 +1941,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { - { .name = "rx", .dma_req = 18 }, - { .name = "tx", .dma_req = 17 }, - { .dma_req = -1 } -}; - static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { { .name = "mpu", @@ -2042,7 +1969,7 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { .name = "mcbsp3", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp3_irqs, - .sdma_reqs = omap2430_mcbsp3_sdma_chs, + .sdma_reqs = omap2_mcbsp3_sdma_reqs, .main_clk = "mcbsp3_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c index 245294b97f6e..7c4f5ab374a7 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c @@ -10,11 +10,35 @@ */ #include #include +#include #include #include "omap_hwmod_common_data.h" + +/* + * omap_hwmod class data + */ + +struct omap_hwmod_class l3_hwmod_class = { + .name = "l3" +}; + +struct omap_hwmod_class l4_hwmod_class = { + .name = "l4" +}; + +struct omap_hwmod_class mpu_hwmod_class = { + .name = "mpu" +}; + +struct omap_hwmod_class iva_hwmod_class = { + .name = "iva" +}; + +/* Common MPU IRQ line data */ + struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = { { .irq = 37, }, { .irq = -1 } @@ -138,5 +162,73 @@ struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = { { .irq = -1 } }; +/* Common DMA request line data */ +struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = { + { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, + { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = { + { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, + { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = { + { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, + { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = { + { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, + { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = { + { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, + { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = { + { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ + { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ + { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ + { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ + { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ + { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ + { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ + { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = { + { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ + { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ + { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ + { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = { + { .name = "rx", .dma_req = 32 }, + { .name = "tx", .dma_req = 31 }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = { + { .name = "rx", .dma_req = 34 }, + { .name = "tx", .dma_req = 33 }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = { + { .name = "rx", .dma_req = 18 }, + { .name = "tx", .dma_req = 17 }, + { .dma_req = -1 } +}; diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c index 5a078a652c33..f5b63efb1b67 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c @@ -10,6 +10,7 @@ */ #include #include +#include #include @@ -19,3 +20,8 @@ struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = { { .irq = 48, }, { .irq = -1 } }; + +struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = { + { .name = "dispc", .dma_req = 5 }, + { .dma_req = -1 } +}; diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 265f0b10e5ca..001f67b8777d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1210,12 +1210,6 @@ static struct omap_hwmod_class uart_class = { /* UART1 */ -static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { &omap3_l4_core__uart1, }; @@ -1223,7 +1217,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { static struct omap_hwmod omap3xxx_uart1_hwmod = { .name = "uart1", .mpu_irqs = omap2_uart1_mpu_irqs, - .sdma_reqs = uart1_sdma_reqs, + .sdma_reqs = omap2_uart1_sdma_reqs, .main_clk = "uart1_fck", .prcm = { .omap2 = { @@ -1242,12 +1236,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { /* UART2 */ -static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { &omap3_l4_core__uart2, }; @@ -1255,7 +1243,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { static struct omap_hwmod omap3xxx_uart2_hwmod = { .name = "uart2", .mpu_irqs = omap2_uart2_mpu_irqs, - .sdma_reqs = uart2_sdma_reqs, + .sdma_reqs = omap2_uart2_sdma_reqs, .main_clk = "uart2_fck", .prcm = { .omap2 = { @@ -1274,12 +1262,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { /* UART3 */ -static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { &omap3_l4_per__uart3, }; @@ -1287,7 +1269,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { static struct omap_hwmod omap3xxx_uart3_hwmod = { .name = "uart3", .mpu_irqs = omap2_uart3_mpu_irqs, - .sdma_reqs = uart3_sdma_reqs, + .sdma_reqs = omap2_uart3_sdma_reqs, .main_clk = "uart3_fck", .prcm = { .omap2 = { @@ -1714,12 +1696,6 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { .fifo_depth = 8, /* bytes */ }; -static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { &omap3_l4_core__i2c1, }; @@ -1727,7 +1703,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { static struct omap_hwmod omap3xxx_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = omap2_i2c1_mpu_irqs, - .sdma_reqs = i2c1_sdma_reqs, + .sdma_reqs = omap2_i2c1_sdma_reqs, .main_clk = "i2c1_fck", .prcm = { .omap2 = { @@ -1751,12 +1727,6 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { .fifo_depth = 8, /* bytes */ }; -static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { &omap3_l4_core__i2c2, }; @@ -1764,7 +1734,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { static struct omap_hwmod omap3xxx_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = omap2_i2c2_mpu_irqs, - .sdma_reqs = i2c2_sdma_reqs, + .sdma_reqs = omap2_i2c2_sdma_reqs, .main_clk = "i2c2_fck", .prcm = { .omap2 = { @@ -2269,12 +2239,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { - { .name = "rx", .dma_req = 32 }, - { .name = "tx", .dma_req = 31 }, - { .dma_req = -1 } -}; - static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { { .name = "mpu", @@ -2303,7 +2267,7 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp1_irqs, - .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, + .sdma_reqs = omap2_mcbsp1_sdma_reqs, .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -2327,12 +2291,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { - { .name = "rx", .dma_req = 34 }, - { .name = "tx", .dma_req = 33 }, - { .dma_req = -1 } -}; - static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { { .name = "mpu", @@ -2349,7 +2307,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = { .slave = &omap3xxx_mcbsp2_hwmod, .clk = "mcbsp2_ick", .addr = omap3xxx_mcbsp2_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2366,7 +2323,7 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp2_irqs, - .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, + .sdma_reqs = omap2_mcbsp2_sdma_reqs, .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { @@ -2391,12 +2348,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { - { .name = "rx", .dma_req = 18 }, - { .name = "tx", .dma_req = 17 }, - { .dma_req = -1 } -}; - static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { { .name = "mpu", @@ -2429,7 +2380,7 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { .name = "mcbsp3", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp3_irqs, - .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, + .sdma_reqs = omap2_mcbsp3_sdma_reqs, .main_clk = "mcbsp3_fck", .prcm = { .omap2 = { @@ -2939,18 +2890,6 @@ static struct omap_hwmod_class omap34xx_mcspi_class = { }; /* mcspi1 */ -static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { - { .name = "tx0", .dma_req = 35 }, - { .name = "rx0", .dma_req = 36 }, - { .name = "tx1", .dma_req = 37 }, - { .name = "rx1", .dma_req = 38 }, - { .name = "tx2", .dma_req = 39 }, - { .name = "rx2", .dma_req = 40 }, - { .name = "tx3", .dma_req = 41 }, - { .name = "rx3", .dma_req = 42 }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = { &omap34xx_l4_core__mcspi1, }; @@ -2962,7 +2901,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap34xx_mcspi1 = { .name = "mcspi1", .mpu_irqs = omap2_mcspi1_mpu_irqs, - .sdma_reqs = omap34xx_mcspi1_sdma_reqs, + .sdma_reqs = omap2_mcspi1_sdma_reqs, .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -2981,14 +2920,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { }; /* mcspi2 */ -static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { - { .name = "tx0", .dma_req = 43 }, - { .name = "rx0", .dma_req = 44 }, - { .name = "tx1", .dma_req = 45 }, - { .name = "rx1", .dma_req = 46 }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = { &omap34xx_l4_core__mcspi2, }; @@ -3000,7 +2931,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap34xx_mcspi2 = { .name = "mcspi2", .mpu_irqs = omap2_mcspi2_mpu_irqs, - .sdma_reqs = omap34xx_mcspi2_sdma_reqs, + .sdma_reqs = omap2_mcspi2_sdma_reqs, .main_clk = "mcspi2_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c index 08a134243ecb..de832ebc93a9 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c @@ -49,23 +49,3 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = { .srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT, }; - -/* - * omap_hwmod class data - */ - -struct omap_hwmod_class l3_hwmod_class = { - .name = "l3" -}; - -struct omap_hwmod_class l4_hwmod_class = { - .name = "l4" -}; - -struct omap_hwmod_class mpu_hwmod_class = { - .name = "mpu" -}; - -struct omap_hwmod_class iva_hwmod_class = { - .name = "iva" -}; diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index 1ac878c46af3..b636cf6a62d4 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h @@ -51,6 +51,21 @@ extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; /* Common IP block data across OMAP2xxx */ extern struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[]; +extern struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[]; + +/* Common IP block data */ +extern struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[]; +extern struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[]; +extern struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[]; +extern struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[]; +extern struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[]; +extern struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[]; +extern struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[]; +extern struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[]; +extern struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[]; + +/* Common IP block data on OMAP2430/OMAP3 */ +extern struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[]; /* Common IP block data across OMAP2/3 */ extern struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[]; From 273b9465bc68d4f4bcdedc34411b231e26b48416 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:08 -0600 Subject: [PATCH 23/56] omap_hwmod: share identical omap_hwmod_class, omap_hwmod_class_sysconfig arrays To reduce kernel source file data duplication, share struct omap_hwmod_class and omap_hwmod_class_sysconfig arrays across OMAP2xxx and 3xxx hwmod data files. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 267 ++--------------- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 273 +++--------------- .../omap_hwmod_2xxx_3xxx_ipblock_data.c | 228 ++++++++++----- .../mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 123 ++++++++ arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 105 +------ arch/arm/mach-omap2/omap_hwmod_common_data.h | 11 + 6 files changed, 364 insertions(+), 643 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 6acc01f58902..f3901abf2c28 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -274,24 +274,6 @@ static struct omap_hwmod omap2420_iva_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; -/* Timer Common */ -static struct omap_hwmod_class_sysconfig omap2420_timer_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_timer_hwmod_class = { - .name = "timer", - .sysc = &omap2420_timer_sysc, - .rev = OMAP_TIMER_IP_VERSION_1, -}; - /* timer1 */ static struct omap_hwmod omap2420_timer1_hwmod; @@ -334,7 +316,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = { }, .slaves = omap2420_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -371,7 +353,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = { }, .slaves = omap2420_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -408,7 +390,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = { }, .slaves = omap2420_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -445,7 +427,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = { }, .slaves = omap2420_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -482,7 +464,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = { }, .slaves = omap2420_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -520,7 +502,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = { }, .slaves = omap2420_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -557,7 +539,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = { }, .slaves = omap2420_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -594,7 +576,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = { }, .slaves = omap2420_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -631,7 +613,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = { }, .slaves = omap2420_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -668,7 +650,7 @@ static struct omap_hwmod omap2420_timer10_hwmod = { }, .slaves = omap2420_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -705,7 +687,7 @@ static struct omap_hwmod omap2420_timer11_hwmod = { }, .slaves = omap2420_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -742,7 +724,7 @@ static struct omap_hwmod omap2420_timer12_hwmod = { }, .slaves = omap2420_timer12_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -764,27 +746,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* - * 'wd_timer' class - * 32-bit watchdog upward counter that generates a pulse on the reset pin on - * overflow condition - */ - -static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_wd_timer_hwmod_class = { - .name = "wd_timer", - .sysc = &omap2420_wd_timer_sysc, - .pre_shutdown = &omap2_wd_timer_disable -}; - /* wd_timer2 */ static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = { &omap2420_l4_wkup__wd_timer2, @@ -792,7 +753,7 @@ static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = { static struct omap_hwmod omap2420_wd_timer2_hwmod = { .name = "wd_timer2", - .class = &omap2420_wd_timer_hwmod_class, + .class = &omap2xxx_wd_timer_hwmod_class, .main_clk = "mpu_wdt_fck", .prcm = { .omap2 = { @@ -808,24 +769,6 @@ static struct omap_hwmod omap2420_wd_timer2_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; -/* UART */ - -static struct omap_hwmod_class_sysconfig uart_sysc = { - .rev_offs = 0x50, - .sysc_offs = 0x54, - .syss_offs = 0x58, - .sysc_flags = (SYSC_HAS_SIDLEMODE | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class uart_class = { - .name = "uart", - .sysc = &uart_sysc, -}; - /* UART1 */ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { @@ -848,7 +791,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = { }, .slaves = omap2420_uart1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_uart1_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; @@ -874,7 +817,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = { }, .slaves = omap2420_uart2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_uart2_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; @@ -900,28 +843,10 @@ static struct omap_hwmod omap2420_uart3_hwmod = { }, .slaves = omap2420_uart3_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_uart3_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; -/* - * 'dss' class - * display sub-system - */ - -static struct omap_hwmod_class_sysconfig omap2420_dss_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_dss_hwmod_class = { - .name = "dss", - .sysc = &omap2420_dss_sysc, -}; - /* dss */ /* dss master ports */ static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { @@ -955,7 +880,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { static struct omap_hwmod omap2420_dss_core_hwmod = { .name = "dss_core", - .class = &omap2420_dss_hwmod_class, + .class = &omap2_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ .sdma_reqs = omap2xxx_dss_sdma_chs, .prcm = { @@ -977,27 +902,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'dispc' class - * display controller - */ - -static struct omap_hwmod_class_sysconfig omap2420_dispc_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_dispc_hwmod_class = { - .name = "dispc", - .sysc = &omap2420_dispc_sysc, -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { .master = &omap2420_l4_core_hwmod, @@ -1020,7 +924,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = { static struct omap_hwmod omap2420_dss_dispc_hwmod = { .name = "dss_dispc", - .class = &omap2420_dispc_hwmod_class, + .class = &omap2_dispc_hwmod_class, .mpu_irqs = omap2_dispc_irqs, .main_clk = "dss1_fck", .prcm = { @@ -1038,26 +942,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'rfbi' class - * remote frame buffer interface - */ - -static struct omap_hwmod_class_sysconfig omap2420_rfbi_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_rfbi_hwmod_class = { - .name = "rfbi", - .sysc = &omap2420_rfbi_sysc, -}; - /* l4_core -> dss_rfbi */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { .master = &omap2420_l4_core_hwmod, @@ -1080,7 +964,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = { static struct omap_hwmod omap2420_dss_rfbi_hwmod = { .name = "dss_rfbi", - .class = &omap2420_rfbi_hwmod_class, + .class = &omap2_rfbi_hwmod_class, .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1095,15 +979,6 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'venc' class - * video encoder - */ - -static struct omap_hwmod_class omap2420_venc_hwmod_class = { - .name = "venc", -}; - /* l4_core -> dss_venc */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { .master = &omap2420_l4_core_hwmod, @@ -1127,7 +1002,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = { static struct omap_hwmod omap2420_dss_venc_hwmod = { .name = "dss_venc", - .class = &omap2420_venc_hwmod_class, + .class = &omap2_venc_hwmod_class, .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1292,27 +1167,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { .dbck_flag = false, }; -static struct omap_hwmod_class_sysconfig omap242x_gpio_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | - SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -/* - * 'gpio' class - * general purpose io module - */ -static struct omap_hwmod_class omap242x_gpio_hwmod_class = { - .name = "gpio", - .sysc = &omap242x_gpio_sysc, - .rev = 0, -}; - /* gpio1 */ static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { &omap2420_l4_wkup__gpio1, @@ -1334,7 +1188,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { }, .slaves = omap2420_gpio1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_gpio1_slaves), - .class = &omap242x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; @@ -1360,7 +1214,7 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { }, .slaves = omap2420_gpio2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_gpio2_slaves), - .class = &omap242x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; @@ -1386,7 +1240,7 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { }, .slaves = omap2420_gpio3_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_gpio3_slaves), - .class = &omap242x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; @@ -1412,28 +1266,11 @@ static struct omap_hwmod omap2420_gpio4_hwmod = { }, .slaves = omap2420_gpio4_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_gpio4_slaves), - .class = &omap242x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; -/* system dma */ -static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x002c, - .syss_offs = 0x0028, - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | - SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_dma_hwmod_class = { - .name = "dma", - .sysc = &omap2420_dma_sysc, -}; - /* dma attributes */ static struct omap_dma_dev_attr dma_dev_attr = { .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | @@ -1470,7 +1307,7 @@ static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = { static struct omap_hwmod omap2420_dma_system_hwmod = { .name = "dma", - .class = &omap2420_dma_hwmod_class, + .class = &omap2xxx_dma_hwmod_class, .mpu_irqs = omap2_dma_system_irqs, .main_clk = "core_l3_ck", .slaves = omap2420_dma_system_slaves, @@ -1482,27 +1319,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'mailbox' class - * mailbox module allowing communication between the on-chip processors - * using a queued mailbox-interrupt mechanism. - */ - -static struct omap_hwmod_class_sysconfig omap2420_mailbox_sysc = { - .rev_offs = 0x000, - .sysc_offs = 0x010, - .syss_offs = 0x014, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_mailbox_hwmod_class = { - .name = "mailbox", - .sysc = &omap2420_mailbox_sysc, -}; - /* mailbox */ static struct omap_hwmod omap2420_mailbox_hwmod; static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { @@ -1526,7 +1342,7 @@ static struct omap_hwmod_ocp_if *omap2420_mailbox_slaves[] = { static struct omap_hwmod omap2420_mailbox_hwmod = { .name = "mailbox", - .class = &omap2420_mailbox_hwmod_class, + .class = &omap2xxx_mailbox_hwmod_class, .mpu_irqs = omap2420_mailbox_irqs, .main_clk = "mailboxes_ick", .prcm = { @@ -1543,29 +1359,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; -/* - * 'mcspi' class - * multichannel serial port interface (mcspi) / master/slave synchronous serial - * bus - */ - -static struct omap_hwmod_class_sysconfig omap2420_mcspi_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_mcspi_class = { - .name = "mcspi", - .sysc = &omap2420_mcspi_sysc, - .rev = OMAP2_MCSPI_REV, -}; - /* mcspi1 */ static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { &omap2420_l4_core__mcspi1, @@ -1591,8 +1384,8 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { }, .slaves = omap2420_mcspi1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_mcspi1_slaves), - .class = &omap2420_mcspi_class, - .dev_attr = &omap_mcspi1_dev_attr, + .class = &omap2xxx_mcspi_class, + .dev_attr = &omap_mcspi1_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; @@ -1621,8 +1414,8 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = { }, .slaves = omap2420_mcspi2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_mcspi2_slaves), - .class = &omap2420_mcspi_class, - .dev_attr = &omap_mcspi2_dev_attr, + .class = &omap2xxx_mcspi_class, + .dev_attr = &omap_mcspi2_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 639acd598c92..2a52f025bd06 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -347,24 +347,6 @@ static struct omap_hwmod omap2430_iva_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; -/* Timer Common */ -static struct omap_hwmod_class_sysconfig omap2430_timer_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_timer_hwmod_class = { - .name = "timer", - .sysc = &omap2430_timer_sysc, - .rev = OMAP_TIMER_IP_VERSION_1, -}; - /* timer1 */ static struct omap_hwmod omap2430_timer1_hwmod; @@ -407,7 +389,7 @@ static struct omap_hwmod omap2430_timer1_hwmod = { }, .slaves = omap2430_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -444,7 +426,7 @@ static struct omap_hwmod omap2430_timer2_hwmod = { }, .slaves = omap2430_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -481,7 +463,7 @@ static struct omap_hwmod omap2430_timer3_hwmod = { }, .slaves = omap2430_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -518,7 +500,7 @@ static struct omap_hwmod omap2430_timer4_hwmod = { }, .slaves = omap2430_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -555,7 +537,7 @@ static struct omap_hwmod omap2430_timer5_hwmod = { }, .slaves = omap2430_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -592,7 +574,7 @@ static struct omap_hwmod omap2430_timer6_hwmod = { }, .slaves = omap2430_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -629,7 +611,7 @@ static struct omap_hwmod omap2430_timer7_hwmod = { }, .slaves = omap2430_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -666,7 +648,7 @@ static struct omap_hwmod omap2430_timer8_hwmod = { }, .slaves = omap2430_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -703,7 +685,7 @@ static struct omap_hwmod omap2430_timer9_hwmod = { }, .slaves = omap2430_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -740,7 +722,7 @@ static struct omap_hwmod omap2430_timer10_hwmod = { }, .slaves = omap2430_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -777,7 +759,7 @@ static struct omap_hwmod omap2430_timer11_hwmod = { }, .slaves = omap2430_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -814,7 +796,7 @@ static struct omap_hwmod omap2430_timer12_hwmod = { }, .slaves = omap2430_timer12_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -836,27 +818,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* - * 'wd_timer' class - * 32-bit watchdog upward counter that generates a pulse on the reset pin on - * overflow condition - */ - -static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = { - .rev_offs = 0x0, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = { - .name = "wd_timer", - .sysc = &omap2430_wd_timer_sysc, - .pre_shutdown = &omap2_wd_timer_disable -}; - /* wd_timer2 */ static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { &omap2430_l4_wkup__wd_timer2, @@ -864,7 +825,7 @@ static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { static struct omap_hwmod omap2430_wd_timer2_hwmod = { .name = "wd_timer2", - .class = &omap2430_wd_timer_hwmod_class, + .class = &omap2xxx_wd_timer_hwmod_class, .main_clk = "mpu_wdt_fck", .prcm = { .omap2 = { @@ -880,24 +841,6 @@ static struct omap_hwmod omap2430_wd_timer2_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; -/* UART */ - -static struct omap_hwmod_class_sysconfig uart_sysc = { - .rev_offs = 0x50, - .sysc_offs = 0x54, - .syss_offs = 0x58, - .sysc_flags = (SYSC_HAS_SIDLEMODE | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class uart_class = { - .name = "uart", - .sysc = &uart_sysc, -}; - /* UART1 */ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { @@ -920,7 +863,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = { }, .slaves = omap2430_uart1_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; @@ -946,7 +889,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = { }, .slaves = omap2430_uart2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; @@ -972,28 +915,10 @@ static struct omap_hwmod omap2430_uart3_hwmod = { }, .slaves = omap2430_uart3_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; -/* - * 'dss' class - * display sub-system - */ - -static struct omap_hwmod_class_sysconfig omap2430_dss_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_dss_hwmod_class = { - .name = "dss", - .sysc = &omap2430_dss_sysc, -}; - /* dss */ /* dss master ports */ static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = { @@ -1021,7 +946,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { static struct omap_hwmod omap2430_dss_core_hwmod = { .name = "dss_core", - .class = &omap2430_dss_hwmod_class, + .class = &omap2_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ .sdma_reqs = omap2xxx_dss_sdma_chs, .prcm = { @@ -1043,27 +968,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'dispc' class - * display controller - */ - -static struct omap_hwmod_class_sysconfig omap2430_dispc_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_dispc_hwmod_class = { - .name = "dispc", - .sysc = &omap2430_dispc_sysc, -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { .master = &omap2430_l4_core_hwmod, @@ -1080,7 +984,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = { static struct omap_hwmod omap2430_dss_dispc_hwmod = { .name = "dss_dispc", - .class = &omap2430_dispc_hwmod_class, + .class = &omap2_dispc_hwmod_class, .mpu_irqs = omap2_dispc_irqs, .main_clk = "dss1_fck", .prcm = { @@ -1098,26 +1002,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'rfbi' class - * remote frame buffer interface - */ - -static struct omap_hwmod_class_sysconfig omap2430_rfbi_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_rfbi_hwmod_class = { - .name = "rfbi", - .sysc = &omap2430_rfbi_sysc, -}; - /* l4_core -> dss_rfbi */ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { .master = &omap2430_l4_core_hwmod, @@ -1134,7 +1018,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = { static struct omap_hwmod omap2430_dss_rfbi_hwmod = { .name = "dss_rfbi", - .class = &omap2430_rfbi_hwmod_class, + .class = &omap2_rfbi_hwmod_class, .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1149,15 +1033,6 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'venc' class - * video encoder - */ - -static struct omap_hwmod_class omap2430_venc_hwmod_class = { - .name = "venc", -}; - /* l4_core -> dss_venc */ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { .master = &omap2430_l4_core_hwmod, @@ -1175,7 +1050,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = { static struct omap_hwmod omap2430_dss_venc_hwmod = { .name = "dss_venc", - .class = &omap2430_venc_hwmod_class, + .class = &omap2_venc_hwmod_class, .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1367,27 +1242,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { .dbck_flag = false, }; -static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | - SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -/* - * 'gpio' class - * general purpose io module - */ -static struct omap_hwmod_class omap243x_gpio_hwmod_class = { - .name = "gpio", - .sysc = &omap243x_gpio_sysc, - .rev = 0, -}; - /* gpio1 */ static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { &omap2430_l4_wkup__gpio1, @@ -1409,7 +1263,7 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { }, .slaves = omap2430_gpio1_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves), - .class = &omap243x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; @@ -1435,7 +1289,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { }, .slaves = omap2430_gpio2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves), - .class = &omap243x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; @@ -1461,7 +1315,7 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { }, .slaves = omap2430_gpio3_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves), - .class = &omap243x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; @@ -1487,7 +1341,7 @@ static struct omap_hwmod omap2430_gpio4_hwmod = { }, .slaves = omap2430_gpio4_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves), - .class = &omap243x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; @@ -1518,28 +1372,11 @@ static struct omap_hwmod omap2430_gpio5_hwmod = { }, .slaves = omap2430_gpio5_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves), - .class = &omap243x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; -/* dma_system */ -static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x002c, - .syss_offs = 0x0028, - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | - SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_dma_hwmod_class = { - .name = "dma", - .sysc = &omap2430_dma_sysc, -}; - /* dma attributes */ static struct omap_dma_dev_attr dma_dev_attr = { .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | @@ -1576,7 +1413,7 @@ static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = { static struct omap_hwmod omap2430_dma_system_hwmod = { .name = "dma", - .class = &omap2430_dma_hwmod_class, + .class = &omap2xxx_dma_hwmod_class, .mpu_irqs = omap2_dma_system_irqs, .main_clk = "core_l3_ck", .slaves = omap2430_dma_system_slaves, @@ -1588,27 +1425,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'mailbox' class - * mailbox module allowing communication between the on-chip processors - * using a queued mailbox-interrupt mechanism. - */ - -static struct omap_hwmod_class_sysconfig omap2430_mailbox_sysc = { - .rev_offs = 0x000, - .sysc_offs = 0x010, - .syss_offs = 0x014, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_mailbox_hwmod_class = { - .name = "mailbox", - .sysc = &omap2430_mailbox_sysc, -}; - /* mailbox */ static struct omap_hwmod omap2430_mailbox_hwmod; static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { @@ -1631,7 +1447,7 @@ static struct omap_hwmod_ocp_if *omap2430_mailbox_slaves[] = { static struct omap_hwmod omap2430_mailbox_hwmod = { .name = "mailbox", - .class = &omap2430_mailbox_hwmod_class, + .class = &omap2xxx_mailbox_hwmod_class, .mpu_irqs = omap2430_mailbox_irqs, .main_clk = "mailboxes_ick", .prcm = { @@ -1648,29 +1464,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; -/* - * 'mcspi' class - * multichannel serial port interface (mcspi) / master/slave synchronous serial - * bus - */ - -static struct omap_hwmod_class_sysconfig omap2430_mcspi_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_mcspi_class = { - .name = "mcspi", - .sysc = &omap2430_mcspi_sysc, - .rev = OMAP2_MCSPI_REV, -}; - /* mcspi1 */ static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { &omap2430_l4_core__mcspi1, @@ -1696,8 +1489,8 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { }, .slaves = omap2430_mcspi1_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves), - .class = &omap2430_mcspi_class, - .dev_attr = &omap_mcspi1_dev_attr, + .class = &omap2xxx_mcspi_class, + .dev_attr = &omap_mcspi1_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; @@ -1726,8 +1519,8 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = { }, .slaves = omap2430_mcspi2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves), - .class = &omap2430_mcspi_class, - .dev_attr = &omap_mcspi2_dev_attr, + .class = &omap2xxx_mcspi_class, + .dev_attr = &omap_mcspi2_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; @@ -1769,8 +1562,8 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = { }, .slaves = omap2430_mcspi3_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves), - .class = &omap2430_mcspi_class, - .dev_attr = &omap_mcspi3_dev_attr, + .class = &omap2xxx_mcspi_class, + .dev_attr = &omap_mcspi3_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c index 7c4f5ab374a7..c451729d289a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c @@ -16,6 +16,164 @@ #include "omap_hwmod_common_data.h" +/* UART */ + +static struct omap_hwmod_class_sysconfig omap2_uart_sysc = { + .rev_offs = 0x50, + .sysc_offs = 0x54, + .syss_offs = 0x58, + .sysc_flags = (SYSC_HAS_SIDLEMODE | + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2_uart_class = { + .name = "uart", + .sysc = &omap2_uart_sysc, +}; + +/* + * 'dss' class + * display sub-system + */ + +static struct omap_hwmod_class_sysconfig omap2_dss_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2_dss_hwmod_class = { + .name = "dss", + .sysc = &omap2_dss_sysc, +}; + +/* + * 'dispc' class + * display controller + */ + +static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | + SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2_dispc_hwmod_class = { + .name = "dispc", + .sysc = &omap2_dispc_sysc, +}; + +/* + * 'rfbi' class + * remote frame buffer interface + */ + +static struct omap_hwmod_class_sysconfig omap2_rfbi_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2_rfbi_hwmod_class = { + .name = "rfbi", + .sysc = &omap2_rfbi_sysc, +}; + +/* + * 'venc' class + * video encoder + */ + +struct omap_hwmod_class omap2_venc_hwmod_class = { + .name = "venc", +}; + + +/* Common DMA request line data */ +struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = { + { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, + { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = { + { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, + { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = { + { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, + { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = { + { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, + { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = { + { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, + { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = { + { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ + { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ + { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ + { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ + { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ + { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ + { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ + { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = { + { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ + { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ + { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ + { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = { + { .name = "rx", .dma_req = 32 }, + { .name = "tx", .dma_req = 31 }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = { + { .name = "rx", .dma_req = 34 }, + { .name = "tx", .dma_req = 33 }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = { + { .name = "rx", .dma_req = 18 }, + { .name = "tx", .dma_req = 17 }, + { .dma_req = -1 } +}; + +/* Other IP block data */ + /* * omap_hwmod class data @@ -162,73 +320,3 @@ struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = { { .irq = -1 } }; -/* Common DMA request line data */ -struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = { - { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ - { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ - { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ - { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ - { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ - { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ - { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ - { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = { - { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ - { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ - { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = { - { .name = "rx", .dma_req = 32 }, - { .name = "tx", .dma_req = 31 }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = { - { .name = "rx", .dma_req = 34 }, - { .name = "tx", .dma_req = 33 }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = { - { .name = "rx", .dma_req = 18 }, - { .name = "tx", .dma_req = 17 }, - { .dma_req = -1 } -}; - - diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c index f5b63efb1b67..177dee20faef 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c @@ -11,10 +11,13 @@ #include #include #include +#include +#include #include #include "omap_hwmod_common_data.h" +#include "wd_timer.h" struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = { { .irq = 48, }, @@ -25,3 +28,123 @@ struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, { .dma_req = -1 } }; +/* OMAP2xxx Timer Common */ +static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2xxx_timer_hwmod_class = { + .name = "timer", + .sysc = &omap2xxx_timer_sysc, + .rev = OMAP_TIMER_IP_VERSION_1, +}; + +/* + * 'wd_timer' class + * 32-bit watchdog upward counter that generates a pulse on the reset pin on + * overflow condition + */ + +static struct omap_hwmod_class_sysconfig omap2xxx_wd_timer_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class = { + .name = "wd_timer", + .sysc = &omap2xxx_wd_timer_sysc, + .pre_shutdown = &omap2_wd_timer_disable +}; + +/* + * 'gpio' class + * general purpose io module + */ +static struct omap_hwmod_class_sysconfig omap2xxx_gpio_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | + SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | + SYSS_HAS_RESET_STATUS), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2xxx_gpio_hwmod_class = { + .name = "gpio", + .sysc = &omap2xxx_gpio_sysc, + .rev = 0, +}; + +/* system dma */ +static struct omap_hwmod_class_sysconfig omap2xxx_dma_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x002c, + .syss_offs = 0x0028, + .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | + SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), + .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2xxx_dma_hwmod_class = { + .name = "dma", + .sysc = &omap2xxx_dma_sysc, +}; + +/* + * 'mailbox' class + * mailbox module allowing communication between the on-chip processors + * using a queued mailbox-interrupt mechanism. + */ + +static struct omap_hwmod_class_sysconfig omap2xxx_mailbox_sysc = { + .rev_offs = 0x000, + .sysc_offs = 0x010, + .syss_offs = 0x014, + .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | + SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2xxx_mailbox_hwmod_class = { + .name = "mailbox", + .sysc = &omap2xxx_mailbox_sysc, +}; + +/* + * 'mcspi' class + * multichannel serial port interface (mcspi) / master/slave synchronous serial + * bus + */ + +static struct omap_hwmod_class_sysconfig omap2xxx_mcspi_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2xxx_mcspi_class = { + .name = "mcspi", + .sysc = &omap2xxx_mcspi_sysc, + .rev = OMAP2_MCSPI_REV, +}; diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 001f67b8777d..1a52716e48bf 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1190,24 +1190,6 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = { .flags = HWMOD_SWSUP_SIDLE, }; -/* UART common */ - -static struct omap_hwmod_class_sysconfig uart_sysc = { - .rev_offs = 0x50, - .sysc_offs = 0x54, - .syss_offs = 0x58, - .sysc_flags = (SYSC_HAS_SIDLEMODE | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class uart_class = { - .name = "uart", - .sysc = &uart_sysc, -}; - /* UART1 */ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { @@ -1230,7 +1212,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { }, .slaves = omap3xxx_uart1_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_uart1_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; @@ -1256,7 +1238,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { }, .slaves = omap3xxx_uart2_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_uart2_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; @@ -1282,7 +1264,7 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = { }, .slaves = omap3xxx_uart3_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_uart3_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; @@ -1319,7 +1301,7 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { }, .slaves = omap3xxx_uart4_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_uart4_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1), }; @@ -1328,24 +1310,6 @@ static struct omap_hwmod_class i2c_class = { .sysc = &i2c_sysc, }; -/* - * 'dss' class - * display sub-system - */ - -static struct omap_hwmod_class_sysconfig omap3xxx_dss_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap3xxx_dss_hwmod_class = { - .name = "dss", - .sysc = &omap3xxx_dss_sysc, -}; - static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, { .name = "dsi1", .dma_req = 74 }, @@ -1406,7 +1370,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { static struct omap_hwmod omap3430es1_dss_core_hwmod = { .name = "dss_core", - .class = &omap3xxx_dss_hwmod_class, + .class = &omap2_dss_hwmod_class, .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ .sdma_reqs = omap3xxx_dss_sdma_chs, .prcm = { @@ -1430,7 +1394,7 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = { static struct omap_hwmod omap3xxx_dss_core_hwmod = { .name = "dss_core", - .class = &omap3xxx_dss_hwmod_class, + .class = &omap2_dss_hwmod_class, .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ .sdma_reqs = omap3xxx_dss_sdma_chs, .prcm = { @@ -1453,28 +1417,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = { CHIP_IS_OMAP3630ES1 | CHIP_GE_OMAP3630ES1_1), }; -/* - * 'dispc' class - * display controller - */ - -static struct omap_hwmod_class_sysconfig omap3xxx_dispc_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | - SYSC_HAS_MIDLEMODE | SYSC_HAS_ENAWAKEUP | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { - .name = "dispc", - .sysc = &omap3xxx_dispc_sysc, -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { .master = &omap3xxx_l4_core_hwmod, @@ -1498,7 +1440,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = { static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { .name = "dss_dispc", - .class = &omap3xxx_dispc_hwmod_class, + .class = &omap2_dispc_hwmod_class, .mpu_irqs = omap2_dispc_irqs, .main_clk = "dss1_alwon_fck", .prcm = { @@ -1580,26 +1522,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'rfbi' class - * remote frame buffer interface - */ - -static struct omap_hwmod_class_sysconfig omap3xxx_rfbi_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap3xxx_rfbi_hwmod_class = { - .name = "rfbi", - .sysc = &omap3xxx_rfbi_sysc, -}; - /* l4_core -> dss_rfbi */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { .master = &omap3xxx_l4_core_hwmod, @@ -1623,7 +1545,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = { static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { .name = "dss_rfbi", - .class = &omap3xxx_rfbi_hwmod_class, + .class = &omap2_rfbi_hwmod_class, .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { @@ -1640,15 +1562,6 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'venc' class - * video encoder - */ - -static struct omap_hwmod_class omap3xxx_venc_hwmod_class = { - .name = "venc", -}; - /* l4_core -> dss_venc */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { .master = &omap3xxx_l4_core_hwmod, @@ -1673,7 +1586,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = { static struct omap_hwmod omap3xxx_dss_venc_hwmod = { .name = "dss_venc", - .class = &omap3xxx_venc_hwmod_class, + .class = &omap2_venc_hwmod_class, .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index b636cf6a62d4..39a7c37f4587 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h @@ -98,6 +98,17 @@ extern struct omap_hwmod_class l3_hwmod_class; extern struct omap_hwmod_class l4_hwmod_class; extern struct omap_hwmod_class mpu_hwmod_class; extern struct omap_hwmod_class iva_hwmod_class; +extern struct omap_hwmod_class omap2_uart_class; +extern struct omap_hwmod_class omap2_dss_hwmod_class; +extern struct omap_hwmod_class omap2_dispc_hwmod_class; +extern struct omap_hwmod_class omap2_rfbi_hwmod_class; +extern struct omap_hwmod_class omap2_venc_hwmod_class; +extern struct omap_hwmod_class omap2xxx_timer_hwmod_class; +extern struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class; +extern struct omap_hwmod_class omap2xxx_gpio_hwmod_class; +extern struct omap_hwmod_class omap2xxx_dma_hwmod_class; +extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class; +extern struct omap_hwmod_class omap2xxx_mcspi_class; #endif From 9b4021befe59e53454d2fe0a4d22e269f1e843b1 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:14:27 -0600 Subject: [PATCH 24/56] OMAP4: hwmod data: Fix L3 interconnect data order and alignement Change the position of the ocp_if structure to match the template. Remove unneeded comma at the end of address space flag field. Remove USER_SDMA since this ocp link is only from the l3_main_1 path that is accessible only from the MPU in that case and not the SDMA. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 27 +++++++++++----------- 1 file changed, 13 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index a93c4552a571..f1138e48b24b 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -216,6 +216,12 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { }; /* l3_main_1 interface data */ +static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = { + { .name = "dbg_err", .irq = 9 + OMAP44XX_IRQ_GIC_START }, + { .name = "app_err", .irq = 10 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } +}; + /* dsp -> l3_main_1 */ static struct omap_hwmod_ocp_if omap44xx_dsp__l3_main_1 = { .master = &omap44xx_dsp_hwmod, @@ -264,18 +270,11 @@ static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* L3 target configuration and error log registers */ -static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = { - { .irq = 9 + OMAP44XX_IRQ_GIC_START }, - { .irq = 10 + OMAP44XX_IRQ_GIC_START }, - { .irq = -1 } -}; - static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { { .pa_start = 0x44000000, .pa_end = 0x44000fff, - .flags = ADDR_TYPE_RT, + .flags = ADDR_TYPE_RT }, { } }; @@ -286,7 +285,7 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = { .slave = &omap44xx_l3_main_1_hwmod, .clk = "l3_div_ck", .addr = omap44xx_l3_main_1_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, + .user = OCP_USER_MPU, }; /* l3_main_1 slave ports */ @@ -303,9 +302,9 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = { static struct omap_hwmod omap44xx_l3_main_1_hwmod = { .name = "l3_main_1", .class = &omap44xx_l3_hwmod_class, - .mpu_irqs = omap44xx_l3_targ_irqs, .slaves = omap44xx_l3_main_1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), + .mpu_irqs = omap44xx_l3_main_1_irqs, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -354,7 +353,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = { { .pa_start = 0x44800000, .pa_end = 0x44801fff, - .flags = ADDR_TYPE_RT, + .flags = ADDR_TYPE_RT }, { } }; @@ -365,7 +364,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = { .slave = &omap44xx_l3_main_2_hwmod, .clk = "l3_div_ck", .addr = omap44xx_l3_main_2_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, + .user = OCP_USER_MPU, }; /* l4_cfg -> l3_main_2 */ @@ -409,7 +408,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { { .pa_start = 0x45000000, .pa_end = 0x45000fff, - .flags = ADDR_TYPE_RT, + .flags = ADDR_TYPE_RT }, { } }; @@ -420,7 +419,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = { .slave = &omap44xx_l3_main_3_hwmod, .clk = "l3_div_ck", .addr = omap44xx_l3_main_3_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, + .user = OCP_USER_MPU, }; /* l3_main_2 -> l3_main_3 */ From 7ecc5373fe5788b993820eb0bc0e4b7c282147e2 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:14:28 -0600 Subject: [PATCH 25/56] OMAP4: hwmod data: Remove un-needed parens A couple of parens were added around some flags. Remove them, since they are not needed and not used for any other hwmods. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index f1138e48b24b..eb00c08b3481 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -3735,7 +3735,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_masters[] = { static struct omap_hwmod omap44xx_mpu_hwmod = { .name = "mpu", .class = &omap44xx_mpu_hwmod_class, - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), + .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_mpu_irqs, .main_clk = "dpll_mpu_m2_ck", .prcm = { @@ -4749,7 +4749,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = { static struct omap_hwmod omap44xx_uart3_hwmod = { .name = "uart3", .class = &omap44xx_uart_hwmod_class, - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), + .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_uart3_irqs, .sdma_reqs = omap44xx_uart3_sdma_reqs, .main_clk = "uart3_fck", From 00fe610b7a699780e956756be91ba60343302e49 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:14:28 -0600 Subject: [PATCH 26/56] OMAP4: hwmod data: Fix bad alignement Fix .prcm alignement and usb_otg_hs class and hwmod structures. Add a couple of more potential hwmods in the comment. Remove hsi, since it is already included in the data. Remove one blank line. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 45 +++++++++++----------- 1 file changed, 23 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index eb00c08b3481..0b73d8ee1de4 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -632,7 +632,9 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = { * gpmc * gpu * hdq1w - * hsi + * mcasp + * mpu_c0 + * mpu_c1 * ocmc_ram * ocp2scp_usb_phy * ocp_wp_noc @@ -739,7 +741,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = { .mpu_irqs = omap44xx_aess_irqs, .sdma_reqs = omap44xx_aess_sdma_reqs, .main_clk = "aess_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL, }, @@ -768,7 +770,7 @@ static struct omap_hwmod_opt_clk bandgap_opt_clks[] = { static struct omap_hwmod omap44xx_bandgap_hwmod = { .name = "bandgap", .class = &omap44xx_bandgap_hwmod_class, - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, }, @@ -827,7 +829,7 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = { .class = &omap44xx_counter_hwmod_class, .flags = HWMOD_SWSUP_SIDLE, .main_clk = "sys_32k_ck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL, }, @@ -1003,7 +1005,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { .mpu_irqs = omap44xx_dmic_irqs, .sdma_reqs = omap44xx_dmic_sdma_reqs, .main_clk = "dmic_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM1_ABE_DMIC_CLKCTRL, }, @@ -2093,7 +2095,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { .class = &omap44xx_hsi_hwmod_class, .mpu_irqs = omap44xx_hsi_irqs, .main_clk = "hsi_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L3INIT_HSI_CLKCTRL, }, @@ -2390,7 +2392,7 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = { .flags = HWMOD_INIT_NO_RESET, .rst_lines = omap44xx_ipu_c0_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), - .prcm = { + .prcm = { .omap4 = { .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, }, @@ -2405,7 +2407,7 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = { .flags = HWMOD_INIT_NO_RESET, .rst_lines = omap44xx_ipu_c1_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), - .prcm = { + .prcm = { .omap4 = { .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, }, @@ -2420,7 +2422,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { .rst_lines = omap44xx_ipu_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), .main_clk = "ipu_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL, .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, @@ -2506,7 +2508,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = { .mpu_irqs = omap44xx_iss_irqs, .sdma_reqs = omap44xx_iss_sdma_reqs, .main_clk = "iss_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_CAM_ISS_CLKCTRL, }, @@ -2686,7 +2688,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { .class = &omap44xx_kbd_hwmod_class, .mpu_irqs = omap44xx_kbd_irqs, .main_clk = "kbd_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL, }, @@ -2750,7 +2752,7 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { .name = "mailbox", .class = &omap44xx_mailbox_hwmod_class, .mpu_irqs = omap44xx_mailbox_irqs, - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, }, @@ -3132,7 +3134,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { .mpu_irqs = omap44xx_mcpdm_irqs, .sdma_reqs = omap44xx_mcpdm_sdma_reqs, .main_clk = "mcpdm_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM1_ABE_PDM_CLKCTRL, }, @@ -3429,7 +3431,6 @@ static struct omap_hwmod_class omap44xx_mmc_hwmod_class = { }; /* mmc1 */ - static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { { .irq = 83 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -3480,7 +3481,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { .mpu_irqs = omap44xx_mmc1_irqs, .sdma_reqs = omap44xx_mmc1_sdma_reqs, .main_clk = "mmc1_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL, }, @@ -3539,7 +3540,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { .mpu_irqs = omap44xx_mmc2_irqs, .sdma_reqs = omap44xx_mmc2_sdma_reqs, .main_clk = "mmc2_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL, }, @@ -3593,7 +3594,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { .mpu_irqs = omap44xx_mmc3_irqs, .sdma_reqs = omap44xx_mmc3_sdma_reqs, .main_clk = "mmc3_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, }, @@ -3646,7 +3647,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { .sdma_reqs = omap44xx_mmc4_sdma_reqs, .main_clk = "mmc4_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, }, @@ -3698,7 +3699,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { .mpu_irqs = omap44xx_mmc5_irqs, .sdma_reqs = omap44xx_mmc5_sdma_reqs, .main_clk = "mmc5_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, }, @@ -4834,8 +4835,8 @@ static struct omap_hwmod_class_sysconfig omap44xx_usb_otg_hs_sysc = { }; static struct omap_hwmod_class omap44xx_usb_otg_hs_hwmod_class = { - .name = "usb_otg_hs", - .sysc = &omap44xx_usb_otg_hs_sysc, + .name = "usb_otg_hs", + .sysc = &omap44xx_usb_otg_hs_sysc, }; /* usb_otg_hs */ @@ -4889,7 +4890,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { }, }, .opt_clks = usb_otg_hs_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks), + .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks), .slaves = omap44xx_usb_otg_hs_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_slaves), .masters = omap44xx_usb_otg_hs_masters, From 7e69ed974259b42c4f87a44222415dbb7472898d Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:14:28 -0600 Subject: [PATCH 27/56] OMAP4: hwmod data: Align interconnect format with regular modules The interconnect modules were using a slightly different layout than the regular modules. Align the layout for better consitency. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 36 +++++++++++----------- 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 0b73d8ee1de4..346a028e95c5 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -80,7 +80,12 @@ static struct omap_hwmod_class omap44xx_dmm_hwmod_class = { .name = "dmm", }; -/* dmm interface data */ +/* dmm */ +static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { + { .irq = 113 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } +}; + /* l3_main_1 -> dmm */ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = { .master = &omap44xx_l3_main_1_hwmod, @@ -113,17 +118,12 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = { &omap44xx_mpu__dmm, }; -static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { - { .irq = 113 + OMAP44XX_IRQ_GIC_START }, - { .irq = -1 } -}; - static struct omap_hwmod omap44xx_dmm_hwmod = { .name = "dmm", .class = &omap44xx_dmm_hwmod_class, + .mpu_irqs = omap44xx_dmm_irqs, .slaves = omap44xx_dmm_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), - .mpu_irqs = omap44xx_dmm_irqs, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -135,7 +135,7 @@ static struct omap_hwmod_class omap44xx_emif_fw_hwmod_class = { .name = "emif_fw", }; -/* emif_fw interface data */ +/* emif_fw */ /* dmm -> emif_fw */ static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = { .master = &omap44xx_dmm_hwmod, @@ -184,7 +184,7 @@ static struct omap_hwmod_class omap44xx_l3_hwmod_class = { .name = "l3", }; -/* l3_instr interface data */ +/* l3_instr */ /* iva -> l3_instr */ static struct omap_hwmod_ocp_if omap44xx_iva__l3_instr = { .master = &omap44xx_iva_hwmod, @@ -215,7 +215,7 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -/* l3_main_1 interface data */ +/* l3_main_1 */ static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = { { .name = "dbg_err", .irq = 9 + OMAP44XX_IRQ_GIC_START }, { .name = "app_err", .irq = 10 + OMAP44XX_IRQ_GIC_START }, @@ -302,13 +302,13 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = { static struct omap_hwmod omap44xx_l3_main_1_hwmod = { .name = "l3_main_1", .class = &omap44xx_l3_hwmod_class, + .mpu_irqs = omap44xx_l3_main_1_irqs, .slaves = omap44xx_l3_main_1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), - .mpu_irqs = omap44xx_l3_main_1_irqs, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -/* l3_main_2 interface data */ +/* l3_main_2 */ /* dma_system -> l3_main_2 */ static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = { .master = &omap44xx_dma_system_hwmod, @@ -403,7 +403,7 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -/* l3_main_3 interface data */ +/* l3_main_3 */ static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { { .pa_start = 0x45000000, @@ -461,7 +461,7 @@ static struct omap_hwmod_class omap44xx_l4_hwmod_class = { .name = "l4", }; -/* l4_abe interface data */ +/* l4_abe */ /* aess -> l4_abe */ static struct omap_hwmod_ocp_if omap44xx_aess__l4_abe = { .master = &omap44xx_aess_hwmod, @@ -510,7 +510,7 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -/* l4_cfg interface data */ +/* l4_cfg */ /* l3_main_1 -> l4_cfg */ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = { .master = &omap44xx_l3_main_1_hwmod, @@ -532,7 +532,7 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -/* l4_per interface data */ +/* l4_per */ /* l3_main_2 -> l4_per */ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l4_per = { .master = &omap44xx_l3_main_2_hwmod, @@ -554,7 +554,7 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -/* l4_wkup interface data */ +/* l4_wkup */ /* l4_cfg -> l4_wkup */ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l4_wkup = { .master = &omap44xx_l4_cfg_hwmod, @@ -584,7 +584,7 @@ static struct omap_hwmod_class omap44xx_mpu_bus_hwmod_class = { .name = "mpu_bus", }; -/* mpu_private interface data */ +/* mpu_private */ /* mpu -> mpu_private */ static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = { .master = &omap44xx_mpu_hwmod, From 962519e07e44bdeb381fdc7689361a144fe3491c Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:14:45 -0600 Subject: [PATCH 28/56] OMAP4: clock data: Add sddiv to USB DPLL The USB DPLL is a J-Type DPLL with the sddiv extra parameter. Add it in USB DPLL. Signed-off-by: Benoit Cousson Cc: Paul Walmsley [paul@pwsan.com: dropped UNIPRO change since it is removed in a later patch] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock44xx_data.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 8c965671b4d4..f28a9c943cfc 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -1015,6 +1015,7 @@ static struct dpll_data dpll_usb_dd = { .enable_mask = OMAP4430_DPLL_EN_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, + .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK, .max_multiplier = OMAP4430_MAX_DPLL_MULT, .max_divider = OMAP4430_MAX_DPLL_DIV, .min_divider = 1, From 6629f3c47006dd00db0b87ce02a55a16ecacfbbf Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:14:45 -0600 Subject: [PATCH 29/56] OMAP4: clock data: Remove usb_host_fs clkdev with NULL dev usb_host_fs_fck does have a clkdev mapping with "usbhs-omap.0" and "fs_fck" alias used by the driver. The entry with NULL dev is thus not needed anymore. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Felipe Balbi Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock44xx_data.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index f28a9c943cfc..0fa1cb88331c 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -3205,7 +3205,6 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "uart2_fck", &uart2_fck, CK_443X), CLK(NULL, "uart3_fck", &uart3_fck, CK_443X), CLK(NULL, "uart4_fck", &uart4_fck, CK_443X), - CLK(NULL, "usb_host_fs_fck", &usb_host_fs_fck, CK_443X), CLK("usbhs-omap.0", "fs_fck", &usb_host_fs_fck, CK_443X), CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X), CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X), @@ -3217,7 +3216,6 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_443X), CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X), CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X), - CLK(NULL, "usb_host_hs_fck", &usb_host_hs_fck, CK_443X), CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X), CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X), @@ -3227,7 +3225,6 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_443X), CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X), CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X), - CLK(NULL, "usb_tll_hs_ick", &usb_tll_hs_ick, CK_443X), CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X), CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), CLK(NULL, "usim_ck", &usim_ck, CK_443X), From 7ecd4228b48192890220e1fd1b39c8bd2988aa80 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:14:45 -0600 Subject: [PATCH 30/56] OMAP4: clock data: Re-order some clock nodes and structure fields A couple of fieds were edited manually and thus do not stick to the template used by the generator and by other structures. Move them to the correct location. Signed-off-by: Benoit Cousson Cc: Paul Walmsley [paul@pwsan.com: dropped the UNIPRO changes since those will be removed in a later patch] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock44xx_data.c | 66 ++++++++++++++-------------- 1 file changed, 34 insertions(+), 32 deletions(-) diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 0fa1cb88331c..4b57d55f5a11 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -53,9 +53,9 @@ static struct clk extalt_clkin_ck = { static struct clk pad_clks_ck = { .name = "pad_clks_ck", .rate = 12000000, - .ops = &clkops_omap2_dflt, - .enable_reg = OMAP4430_CM_CLKSEL_ABE, - .enable_bit = OMAP4430_PAD_CLKS_GATE_SHIFT, + .ops = &clkops_omap2_dflt, + .enable_reg = OMAP4430_CM_CLKSEL_ABE, + .enable_bit = OMAP4430_PAD_CLKS_GATE_SHIFT, }; static struct clk pad_slimbus_core_clks_ck = { @@ -73,9 +73,9 @@ static struct clk secure_32k_clk_src_ck = { static struct clk slimbus_clk = { .name = "slimbus_clk", .rate = 12000000, - .ops = &clkops_omap2_dflt, - .enable_reg = OMAP4430_CM_CLKSEL_ABE, - .enable_bit = OMAP4430_SLIMBUS_CLK_GATE_SHIFT, + .ops = &clkops_omap2_dflt, + .enable_reg = OMAP4430_CM_CLKSEL_ABE, + .enable_bit = OMAP4430_SLIMBUS_CLK_GATE_SHIFT, }; static struct clk sys_32k_ck = { @@ -278,10 +278,10 @@ static struct clk dpll_abe_ck = { static struct clk dpll_abe_x2_ck = { .name = "dpll_abe_x2_ck", .parent = &dpll_abe_ck, + .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE, .flags = CLOCK_CLKOUTX2, .ops = &clkops_omap4_dpllmx_ops, .recalc = &omap3_clkoutx2_recalc, - .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE, }; static const struct clksel_rate div31_1to31_rates[] = { @@ -622,11 +622,11 @@ static struct clk dpll_core_m3x2_ck = { .clksel_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, .clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK, .ops = &clkops_omap2_dflt, - .enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, - .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, .recalc = &omap2_clksel_recalc, .round_rate = &omap2_clksel_round_rate, .set_rate = &omap2_clksel_set_rate, + .enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, + .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, }; static struct clk dpll_core_m7x2_ck = { @@ -850,10 +850,10 @@ static struct clk dpll_per_m2_ck = { static struct clk dpll_per_x2_ck = { .name = "dpll_per_x2_ck", .parent = &dpll_per_ck, + .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER, .flags = CLOCK_CLKOUTX2, .ops = &clkops_omap4_dpllmx_ops, .recalc = &omap3_clkoutx2_recalc, - .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER, }; static const struct clksel dpll_per_m2x2_div[] = { @@ -880,11 +880,11 @@ static struct clk dpll_per_m3x2_ck = { .clksel_reg = OMAP4430_CM_DIV_M3_DPLL_PER, .clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK, .ops = &clkops_omap2_dflt, - .enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER, - .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, .recalc = &omap2_clksel_recalc, .round_rate = &omap2_clksel_round_rate, .set_rate = &omap2_clksel_set_rate, + .enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER, + .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, }; static struct clk dpll_per_m4x2_ck = { @@ -970,8 +970,9 @@ static struct clk dpll_unipro_ck = { static struct clk dpll_unipro_x2_ck = { .name = "dpll_unipro_x2_ck", .parent = &dpll_unipro_ck, + .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, .flags = CLOCK_CLKOUTX2, - .ops = &clkops_null, + .ops = &clkops_omap4_dpllmx_ops, .recalc = &omap3_clkoutx2_recalc, }; @@ -1036,8 +1037,8 @@ static struct clk dpll_usb_ck = { static struct clk dpll_usb_clkdcoldo_ck = { .name = "dpll_usb_clkdcoldo_ck", .parent = &dpll_usb_ck, - .ops = &clkops_omap4_dpllmx_ops, .clksel_reg = OMAP4430_CM_CLKDCOLDO_DPLL_USB, + .ops = &clkops_omap4_dpllmx_ops, .recalc = &followparent_recalc, }; @@ -1847,8 +1848,8 @@ static struct clk l3_instr_ick = { .ops = &clkops_omap2_dflt, .enable_reg = OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL, .enable_bit = OMAP4430_MODULEMODE_HWCTRL, - .clkdm_name = "l3_instr_clkdm", .flags = ENABLE_ON_INIT, + .clkdm_name = "l3_instr_clkdm", .parent = &l3_div_ck, .recalc = &followparent_recalc, }; @@ -1858,8 +1859,8 @@ static struct clk l3_main_3_ick = { .ops = &clkops_omap2_dflt, .enable_reg = OMAP4430_CM_L3INSTR_L3_3_CLKCTRL, .enable_bit = OMAP4430_MODULEMODE_HWCTRL, - .clkdm_name = "l3_instr_clkdm", .flags = ENABLE_ON_INIT, + .clkdm_name = "l3_instr_clkdm", .parent = &l3_div_ck, .recalc = &followparent_recalc, }; @@ -2163,8 +2164,8 @@ static struct clk ocp_wp_noc_ick = { .ops = &clkops_omap2_dflt, .enable_reg = OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL, .enable_bit = OMAP4430_MODULEMODE_HWCTRL, - .clkdm_name = "l3_instr_clkdm", .flags = ENABLE_ON_INIT, + .clkdm_name = "l3_instr_clkdm", .parent = &l3_div_ck, .recalc = &followparent_recalc, }; @@ -2896,6 +2897,7 @@ static struct clk auxclk2_ck = { .enable_reg = OMAP4_SCRM_AUXCLK2, .enable_bit = OMAP4_ENABLE_SHIFT, }; + static struct clk auxclk3_ck = { .name = "auxclk3_ck", .parent = &sys_clkin_ck, @@ -3217,7 +3219,6 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X), CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X), CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X), - CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X), CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X), CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X), @@ -3226,15 +3227,25 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X), CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X), CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X), - CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), CLK(NULL, "usim_ck", &usim_ck, CK_443X), CLK(NULL, "usim_fclk", &usim_fclk, CK_443X), CLK(NULL, "usim_fck", &usim_fck, CK_443X), CLK("omap_wdt", "fck", &wd_timer2_fck, CK_443X), - CLK(NULL, "mailboxes_ick", &dummy_ck, CK_443X), CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, CK_443X), CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_443X), CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_443X), + CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X), + CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X), + CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X), + CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X), + CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X), + CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), + CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X), + CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X), + CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X), + CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X), + CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X), + CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X), CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X), CLK(NULL, "gpt1_ick", &dummy_ck, CK_443X), CLK(NULL, "gpt2_ick", &dummy_ck, CK_443X), @@ -3251,6 +3262,7 @@ static struct omap_clk omap44xx_clks[] = { CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X), CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X), CLK("omap_i2c.4", "ick", &dummy_ck, CK_443X), + CLK(NULL, "mailboxes_ick", &dummy_ck, CK_443X), CLK("omap_hsmmc.0", "ick", &dummy_ck, CK_443X), CLK("omap_hsmmc.1", "ick", &dummy_ck, CK_443X), CLK("omap_hsmmc.2", "ick", &dummy_ck, CK_443X), @@ -3268,19 +3280,9 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "uart2_ick", &dummy_ck, CK_443X), CLK(NULL, "uart3_ick", &dummy_ck, CK_443X), CLK(NULL, "uart4_ick", &dummy_ck, CK_443X), + CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), + CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), CLK("omap_wdt", "ick", &dummy_ck, CK_443X), - CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X), - CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X), - CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X), - CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X), - CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X), - CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), - CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X), - CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X), - CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X), - CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X), - CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X), - CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X), }; int __init omap4xxx_clk_init(void) From 628479a8ea5d32ef26ba0b4eb26f8d6712a574ec Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:14:46 -0600 Subject: [PATCH 31/56] OMAP4: clock data: Fix max mult and div for USB DPLL The DPLL USB can generate higher speed (x2) than the regular ones. The max multiplication value is then twice the previous value. Fix both max_mult and max_div with that correct values. Change the max_div variable type to u16 to allow storing up to 256. Replace as well the define with the value to avoid unneeded indirection and provide a better readability. Remove the defines that become useless. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock44xx.h | 7 ------ arch/arm/mach-omap2/clock44xx_data.c | 29 ++++++++++++------------- arch/arm/plat-omap/include/plat/clock.h | 2 +- 3 files changed, 15 insertions(+), 23 deletions(-) diff --git a/arch/arm/mach-omap2/clock44xx.h b/arch/arm/mach-omap2/clock44xx.h index 6be1095936db..7ceb870e7ab8 100644 --- a/arch/arm/mach-omap2/clock44xx.h +++ b/arch/arm/mach-omap2/clock44xx.h @@ -8,13 +8,6 @@ #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H #define __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H -/* - * XXX Missing values for the OMAP4 DPLL_USB - * XXX Missing min_multiplier values for all OMAP4 DPLLs - */ -#define OMAP4430_MAX_DPLL_MULT 2047 -#define OMAP4430_MAX_DPLL_DIV 128 - int omap4xxx_clk_init(void); #endif diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 4b57d55f5a11..8307c9ebd309 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -258,8 +258,8 @@ static struct dpll_data dpll_abe_dd = { .enable_mask = OMAP4430_DPLL_EN_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, - .max_multiplier = OMAP4430_MAX_DPLL_MULT, - .max_divider = OMAP4430_MAX_DPLL_DIV, + .max_multiplier = 2047, + .max_divider = 128, .min_divider = 1, }; @@ -434,8 +434,8 @@ static struct dpll_data dpll_core_dd = { .enable_mask = OMAP4430_DPLL_EN_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, - .max_multiplier = OMAP4430_MAX_DPLL_MULT, - .max_divider = OMAP4430_MAX_DPLL_DIV, + .max_multiplier = 2047, + .max_divider = 128, .min_divider = 1, }; @@ -672,8 +672,8 @@ static struct dpll_data dpll_iva_dd = { .enable_mask = OMAP4430_DPLL_EN_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, - .max_multiplier = OMAP4430_MAX_DPLL_MULT, - .max_divider = OMAP4430_MAX_DPLL_DIV, + .max_multiplier = 2047, + .max_divider = 128, .min_divider = 1, }; @@ -740,8 +740,8 @@ static struct dpll_data dpll_mpu_dd = { .enable_mask = OMAP4430_DPLL_EN_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, - .max_multiplier = OMAP4430_MAX_DPLL_MULT, - .max_divider = OMAP4430_MAX_DPLL_DIV, + .max_multiplier = 2047, + .max_divider = 128, .min_divider = 1, }; @@ -813,8 +813,8 @@ static struct dpll_data dpll_per_dd = { .enable_mask = OMAP4430_DPLL_EN_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, - .max_multiplier = OMAP4430_MAX_DPLL_MULT, - .max_divider = OMAP4430_MAX_DPLL_DIV, + .max_multiplier = 2047, + .max_divider = 128, .min_divider = 1, }; @@ -949,9 +949,8 @@ static struct dpll_data dpll_unipro_dd = { .enable_mask = OMAP4430_DPLL_EN_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, - .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK, - .max_multiplier = OMAP4430_MAX_DPLL_MULT, - .max_divider = OMAP4430_MAX_DPLL_DIV, + .max_multiplier = 2047, + .max_divider = 128, .min_divider = 1, }; @@ -1017,8 +1016,8 @@ static struct dpll_data dpll_usb_dd = { .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK, - .max_multiplier = OMAP4430_MAX_DPLL_MULT, - .max_divider = OMAP4430_MAX_DPLL_DIV, + .max_multiplier = 4095, + .max_divider = 256, .min_divider = 1, }; diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h index 006e599c6613..f57e0649ab30 100644 --- a/arch/arm/plat-omap/include/plat/clock.h +++ b/arch/arm/plat-omap/include/plat/clock.h @@ -152,7 +152,7 @@ struct dpll_data { u16 max_multiplier; u8 last_rounded_n; u8 min_divider; - u8 max_divider; + u16 max_divider; u8 modes; #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) void __iomem *autoidle_reg; From ad98a18b3ffa15761e6b3b4a944d4ef37f5ec2c5 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:15:04 -0600 Subject: [PATCH 32/56] OMAP4: prcm: Fix errors in few defines name A couple of macros were wrongly changed during the _MOD to _INST rename done in the following commit: OMAP4: PRCM: rename _MOD macros to _INST cdb54c4457d68994da7c2e16907adfbfc130060d Fix them to their original name. Some CM and PRM instances were not well aligned. Align them. Remove one blank line in cm2_44xx.h to align the output with the other (cm1_44xx.h, prm44xx.h) files. Update header copyright date. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/cm1_44xx.h | 28 ++++++++++++++-------------- arch/arm/mach-omap2/cm2_44xx.h | 23 +++++++++++------------ arch/arm/mach-omap2/prm44xx.h | 22 +++++++++++----------- 3 files changed, 36 insertions(+), 37 deletions(-) diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h index e2d7a56b2ad6..fc649f5d2506 100644 --- a/arch/arm/mach-omap2/cm1_44xx.h +++ b/arch/arm/mach-omap2/cm1_44xx.h @@ -1,7 +1,7 @@ /* * OMAP44xx CM1 instance offset macros * - * Copyright (C) 2009-2010 Texas Instruments, Inc. + * Copyright (C) 2009-2011 Texas Instruments, Inc. * Copyright (C) 2009-2010 Nokia Corporation * * Paul Walmsley (paul@pwsan.com) @@ -41,9 +41,9 @@ #define OMAP4430_CM1_INSTR_INST 0x0f00 /* CM1 clockdomain register offsets (from instance start) */ -#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000 -#define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000 -#define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000 +#define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000 +#define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000 +#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000 /* CM1 */ @@ -82,8 +82,8 @@ #define OMAP4430_CM_DIV_M7_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0044) #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_OFFSET 0x0048 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0048) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_OFFSET 0x004c -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c) +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_CORE_OFFSET 0x004c +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c) #define OMAP4_CM_EMU_OVERRIDE_DPLL_CORE_OFFSET 0x0050 #define OMAP4430_CM_EMU_OVERRIDE_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0050) #define OMAP4_CM_CLKMODE_DPLL_MPU_OFFSET 0x0060 @@ -98,8 +98,8 @@ #define OMAP4430_CM_DIV_M2_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0070) #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_MPU_OFFSET 0x0088 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0088) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_MPU_OFFSET 0x008c -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c) +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_MPU_OFFSET 0x008c +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c) #define OMAP4_CM_BYPCLK_DPLL_MPU_OFFSET 0x009c #define OMAP4430_CM_BYPCLK_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x009c) #define OMAP4_CM_CLKMODE_DPLL_IVA_OFFSET 0x00a0 @@ -116,8 +116,8 @@ #define OMAP4430_CM_DIV_M5_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00bc) #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_IVA_OFFSET 0x00c8 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00c8) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_IVA_OFFSET 0x00cc -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc) +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_IVA_OFFSET 0x00cc +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc) #define OMAP4_CM_BYPCLK_DPLL_IVA_OFFSET 0x00dc #define OMAP4430_CM_BYPCLK_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00dc) #define OMAP4_CM_CLKMODE_DPLL_ABE_OFFSET 0x00e0 @@ -134,8 +134,8 @@ #define OMAP4430_CM_DIV_M3_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00f4) #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_ABE_OFFSET 0x0108 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0108) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_ABE_OFFSET 0x010c -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c) +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_ABE_OFFSET 0x010c +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c) #define OMAP4_CM_CLKMODE_DPLL_DDRPHY_OFFSET 0x0120 #define OMAP4430_CM_CLKMODE_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0120) #define OMAP4_CM_IDLEST_DPLL_DDRPHY_OFFSET 0x0124 @@ -154,8 +154,8 @@ #define OMAP4430_CM_DIV_M6_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0140) #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_DDRPHY_OFFSET 0x0148 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0148) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_DDRPHY_OFFSET 0x014c -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c) +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_DDRPHY_OFFSET 0x014c +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c) #define OMAP4_CM_SHADOW_FREQ_CONFIG1_OFFSET 0x0160 #define OMAP4430_CM_SHADOW_FREQ_CONFIG1 OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0160) #define OMAP4_CM_SHADOW_FREQ_CONFIG2_OFFSET 0x0164 diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-omap2/cm2_44xx.h index aa4745044065..8036a161b026 100644 --- a/arch/arm/mach-omap2/cm2_44xx.h +++ b/arch/arm/mach-omap2/cm2_44xx.h @@ -1,7 +1,7 @@ /* * OMAP44xx CM2 instance offset macros * - * Copyright (C) 2009-2010 Texas Instruments, Inc. + * Copyright (C) 2009-2011 Texas Instruments, Inc. * Copyright (C) 2009-2010 Nokia Corporation * * Paul Walmsley (paul@pwsan.com) @@ -40,9 +40,9 @@ #define OMAP4430_CM2_CAM_INST 0x1000 #define OMAP4430_CM2_DSS_INST 0x1100 #define OMAP4430_CM2_GFX_INST 0x1200 -#define OMAP4430_CM2_L3INIT_INST 0x1300 +#define OMAP4430_CM2_L3INIT_INST 0x1300 #define OMAP4430_CM2_L4PER_INST 0x1400 -#define OMAP4430_CM2_CEFUSE_INST 0x1600 +#define OMAP4430_CM2_CEFUSE_INST 0x1600 #define OMAP4430_CM2_RESTORE_INST 0x1e00 #define OMAP4430_CM2_INSTR_INST 0x1f00 @@ -65,7 +65,6 @@ #define OMAP4430_CM2_L4PER_L4SEC_CDOFFS 0x0180 #define OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS 0x0000 - /* CM2 */ /* CM2.OCP_SOCKET_CM2 register offsets */ @@ -121,8 +120,8 @@ #define OMAP4430_CM_DIV_M7_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0064) #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_PER_OFFSET 0x0068 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0068) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_PER_OFFSET 0x006c -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c) +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_PER_OFFSET 0x006c +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c) #define OMAP4_CM_CLKMODE_DPLL_USB_OFFSET 0x0080 #define OMAP4430_CM_CLKMODE_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0080) #define OMAP4_CM_IDLEST_DPLL_USB_OFFSET 0x0084 @@ -135,8 +134,8 @@ #define OMAP4430_CM_DIV_M2_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0090) #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_USB_OFFSET 0x00a8 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00a8) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_USB_OFFSET 0x00ac -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac) +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_USB_OFFSET 0x00ac +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac) #define OMAP4_CM_CLKDCOLDO_DPLL_USB_OFFSET 0x00b4 #define OMAP4430_CM_CLKDCOLDO_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00b4) #define OMAP4_CM_CLKMODE_DPLL_UNIPRO_OFFSET 0x00c0 @@ -151,8 +150,8 @@ #define OMAP4430_CM_DIV_M2_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00d0) #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_UNIPRO_OFFSET 0x00e8 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00e8) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_UNIPRO_OFFSET 0x00ec -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec) +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_UNIPRO_OFFSET 0x00ec +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec) /* CM2.ALWAYS_ON_CM2 register offsets */ #define OMAP4_CM_ALWON_CLKSTCTRL_OFFSET 0x0000 @@ -227,8 +226,8 @@ #define OMAP4430_CM_D2D_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0508) #define OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET 0x0520 #define OMAP4430_CM_D2D_SAD2D_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0520) -#define OMAP4_CM_D2D_INSTEM_ICR_CLKCTRL_OFFSET 0x0528 -#define OMAP4430_CM_D2D_INSTEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528) +#define OMAP4_CM_D2D_MODEM_ICR_CLKCTRL_OFFSET 0x0528 +#define OMAP4430_CM_D2D_MODEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528) #define OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET 0x0530 #define OMAP4430_CM_D2D_SAD2D_FW_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0530) #define OMAP4_CM_L4CFG_CLKSTCTRL_OFFSET 0x0600 diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 67a0d3feb3f6..2aec8c8ee7c1 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -31,7 +31,7 @@ #define OMAP4430_PRM_BASE 0x4a306000 #define OMAP44XX_PRM_REGADDR(inst, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg)) + OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg)) /* PRM instances */ @@ -46,14 +46,14 @@ #define OMAP4430_PRM_CAM_INST 0x1000 #define OMAP4430_PRM_DSS_INST 0x1100 #define OMAP4430_PRM_GFX_INST 0x1200 -#define OMAP4430_PRM_L3INIT_INST 0x1300 +#define OMAP4430_PRM_L3INIT_INST 0x1300 #define OMAP4430_PRM_L4PER_INST 0x1400 -#define OMAP4430_PRM_CEFUSE_INST 0x1600 +#define OMAP4430_PRM_CEFUSE_INST 0x1600 #define OMAP4430_PRM_WKUP_INST 0x1700 #define OMAP4430_PRM_WKUP_CM_INST 0x1800 #define OMAP4430_PRM_EMU_INST 0x1900 -#define OMAP4430_PRM_EMU_CM_INST 0x1a00 -#define OMAP4430_PRM_DEVICE_INST 0x1b00 +#define OMAP4430_PRM_EMU_CM_INST 0x1a00 +#define OMAP4430_PRM_DEVICE_INST 0x1b00 #define OMAP4430_PRM_INSTR_INST 0x1f00 /* PRM clockdomain register offsets (from instance start) */ @@ -247,8 +247,8 @@ #define OMAP4430_RM_MEMIF_DLL_H_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0464) #define OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET 0x0524 #define OMAP4430_RM_D2D_SAD2D_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0524) -#define OMAP4_RM_D2D_INSTEM_ICR_CONTEXT_OFFSET 0x052c -#define OMAP4430_RM_D2D_INSTEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c) +#define OMAP4_RM_D2D_MODEM_ICR_CONTEXT_OFFSET 0x052c +#define OMAP4430_RM_D2D_MODEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c) #define OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET 0x0534 #define OMAP4430_RM_D2D_SAD2D_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0534) #define OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET 0x0624 @@ -713,8 +713,8 @@ #define OMAP4430_PRM_VC_VAL_BYPASS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a0) #define OMAP4_PRM_VC_CFG_CHANNEL_OFFSET 0x00a4 #define OMAP4430_PRM_VC_CFG_CHANNEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a4) -#define OMAP4_PRM_VC_CFG_I2C_INSTE_OFFSET 0x00a8 -#define OMAP4430_PRM_VC_CFG_I2C_INSTE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8) +#define OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET 0x00a8 +#define OMAP4430_PRM_VC_CFG_I2C_MODE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8) #define OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET 0x00ac #define OMAP4430_PRM_VC_CFG_I2C_CLK OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ac) #define OMAP4_PRM_SRAM_COUNT_OFFSET 0x00b0 @@ -751,8 +751,8 @@ #define OMAP4430_PRM_PHASE2A_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ec) #define OMAP4_PRM_PHASE2B_CNDP_OFFSET 0x00f0 #define OMAP4430_PRM_PHASE2B_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f0) -#define OMAP4_PRM_INSTEM_IF_CTRL_OFFSET 0x00f4 -#define OMAP4430_PRM_INSTEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4) +#define OMAP4_PRM_MODEM_IF_CTRL_OFFSET 0x00f4 +#define OMAP4430_PRM_MODEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4) #define OMAP4_PRM_VC_ERRST_OFFSET 0x00f8 #define OMAP4430_PRM_VC_ERRST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f8) From 631af17cafae308d04d864d6250997cededb3467 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:15:04 -0600 Subject: [PATCH 33/56] OMAP4: prm: Remove wrong clockdomain offsets The following commit introduced new macros to define an offset per clock domain in an instance. commit e4156ee52fe617c2c2d80b5db993ff4bf07d7c3c OMAP4: CM instances: add clockdomain register offsets The PRM contains only two clock controls management entities: EMU and WKUP. Remove the other ones. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/prm44xx.h | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 2aec8c8ee7c1..6e53120fd6cb 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -57,19 +57,7 @@ #define OMAP4430_PRM_INSTR_INST 0x1f00 /* PRM clockdomain register offsets (from instance start) */ -#define OMAP4430_PRM_MPU_MPU_CDOFFS 0x0000 -#define OMAP4430_PRM_TESLA_TESLA_CDOFFS 0x0000 -#define OMAP4430_PRM_ABE_ABE_CDOFFS 0x0000 -#define OMAP4430_PRM_CORE_CORE_CDOFFS 0x0000 -#define OMAP4430_PRM_IVAHD_IVAHD_CDOFFS 0x0000 -#define OMAP4430_PRM_CAM_CAM_CDOFFS 0x0000 -#define OMAP4430_PRM_DSS_DSS_CDOFFS 0x0000 -#define OMAP4430_PRM_GFX_GFX_CDOFFS 0x0000 -#define OMAP4430_PRM_L3INIT_L3INIT_CDOFFS 0x0000 -#define OMAP4430_PRM_L4PER_L4PER_CDOFFS 0x0000 -#define OMAP4430_PRM_CEFUSE_CEFUSE_CDOFFS 0x0000 #define OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS 0x0000 -#define OMAP4430_PRM_EMU_EMU_CDOFFS 0x0000 #define OMAP4430_PRM_EMU_CM_EMU_CDOFFS 0x0000 /* OMAP4 specific register offsets */ From 0fef658331354138d422500509d6e006d9f070d6 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:15:05 -0600 Subject: [PATCH 34/56] OMAP4: powerdomain data: Fix indentation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Indent flags to be aligned with other fields. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Cc: Santosh Shilimkar [paul@pwsan.com: split this patch from an earlier patch by Benoît; edited commit message] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/powerdomains44xx_data.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c index c4222c7036a5..3a7e678fd5f1 100644 --- a/arch/arm/mach-omap2/powerdomains44xx_data.c +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c @@ -53,7 +53,7 @@ static struct powerdomain core_44xx_pwrdm = { [3] = PWRSTS_ON, /* ducati_l2ram */ [4] = PWRSTS_ON, /* ducati_unicache */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* gfx_44xx_pwrdm: 3D accelerator power domain */ @@ -70,7 +70,7 @@ static struct powerdomain gfx_44xx_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, /* gfx_mem */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* abe_44xx_pwrdm: Audio back end power domain */ @@ -90,7 +90,7 @@ static struct powerdomain abe_44xx_pwrdm = { [0] = PWRSTS_ON, /* aessmem */ [1] = PWRSTS_ON, /* periphmem */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* dss_44xx_pwrdm: Display subsystem power domain */ @@ -108,7 +108,7 @@ static struct powerdomain dss_44xx_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, /* dss_mem */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* tesla_44xx_pwrdm: Tesla processor power domain */ @@ -130,7 +130,7 @@ static struct powerdomain tesla_44xx_pwrdm = { [1] = PWRSTS_ON, /* tesla_l1 */ [2] = PWRSTS_ON, /* tesla_l2 */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* wkup_44xx_pwrdm: Wake-up power domain */ @@ -241,7 +241,7 @@ static struct powerdomain ivahd_44xx_pwrdm = { [2] = PWRSTS_ON, /* tcm1_mem */ [3] = PWRSTS_ON, /* tcm2_mem */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* cam_44xx_pwrdm: Camera subsystem power domain */ @@ -258,7 +258,7 @@ static struct powerdomain cam_44xx_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, /* cam_mem */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* l3init_44xx_pwrdm: L3 initators pheripherals power domain */ @@ -276,7 +276,7 @@ static struct powerdomain l3init_44xx_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, /* l3init_bank1 */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* l4per_44xx_pwrdm: Target peripherals power domain */ @@ -296,7 +296,7 @@ static struct powerdomain l4per_44xx_pwrdm = { [0] = PWRSTS_ON, /* nonretained_bank */ [1] = PWRSTS_ON, /* retained_bank */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* From 7b342a8d4c310b5cc153b35ea80aab03ddf2e6da Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:15:05 -0600 Subject: [PATCH 35/56] OMAP4: cm: Remove RESTORE macros to avoid access from SW The restore part of the CM is an alias of some regular registers used only during the SAR restore to facilate the dma to write a contiguous set of registers. The registers should never be used by the SW, only the original register have to be used. Remove them from cmX_44xx.h files to avoid anybody to use them by mistake. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Cc: Santosh Shilimkar Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/cm-regbits-44xx.h | 623 +++++++++++--------------- arch/arm/mach-omap2/cm1_44xx.h | 36 -- arch/arm/mach-omap2/cm2_44xx.h | 50 --- 3 files changed, 254 insertions(+), 455 deletions(-) diff --git a/arch/arm/mach-omap2/cm-regbits-44xx.h b/arch/arm/mach-omap2/cm-regbits-44xx.h index 9d47a05b17b4..0e77945d26ec 100644 --- a/arch/arm/mach-omap2/cm-regbits-44xx.h +++ b/arch/arm/mach-omap2/cm-regbits-44xx.h @@ -22,22 +22,18 @@ #ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H #define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H -/* - * Used by CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, - * CM_TESLA_DYNAMICDEP - */ +/* Used by CM_L3_1_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP */ #define OMAP4430_ABE_DYNDEP_SHIFT 3 #define OMAP4430_ABE_DYNDEP_MASK (1 << 3) /* - * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP, - * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, - * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, + * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_ABE_STATDEP_SHIFT 3 #define OMAP4430_ABE_STATDEP_MASK (1 << 3) -/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ +/* Used by CM_L4CFG_DYNAMICDEP */ #define OMAP4430_ALWONCORE_DYNDEP_SHIFT 16 #define OMAP4430_ALWONCORE_DYNDEP_MASK (1 << 16) @@ -47,14 +43,13 @@ /* * Used by CM_AUTOIDLE_DPLL_ABE, CM_AUTOIDLE_DPLL_CORE, - * CM_AUTOIDLE_DPLL_CORE_RESTORE, CM_AUTOIDLE_DPLL_DDRPHY, - * CM_AUTOIDLE_DPLL_IVA, CM_AUTOIDLE_DPLL_MPU, CM_AUTOIDLE_DPLL_PER, - * CM_AUTOIDLE_DPLL_UNIPRO, CM_AUTOIDLE_DPLL_USB + * CM_AUTOIDLE_DPLL_DDRPHY, CM_AUTOIDLE_DPLL_IVA, CM_AUTOIDLE_DPLL_MPU, + * CM_AUTOIDLE_DPLL_PER, CM_AUTOIDLE_DPLL_UNIPRO, CM_AUTOIDLE_DPLL_USB */ #define OMAP4430_AUTO_DPLL_MODE_SHIFT 0 #define OMAP4430_AUTO_DPLL_MODE_MASK (0x7 << 0) -/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ +/* Used by CM_L4CFG_DYNAMICDEP */ #define OMAP4430_CEFUSE_DYNDEP_SHIFT 17 #define OMAP4430_CEFUSE_DYNDEP_MASK (1 << 17) @@ -82,15 +77,15 @@ #define OMAP4430_CLKACTIVITY_ABE_X2_CLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_ABE_X2_CLK_MASK (1 << 8) -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ +/* Used by CM_MEMIF_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_ASYNC_DLL_CLK_SHIFT 11 #define OMAP4430_CLKACTIVITY_ASYNC_DLL_CLK_MASK (1 << 11) -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ +/* Used by CM_MEMIF_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_ASYNC_PHY1_CLK_SHIFT 12 #define OMAP4430_CLKACTIVITY_ASYNC_PHY1_CLK_MASK (1 << 12) -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ +/* Used by CM_MEMIF_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_ASYNC_PHY2_CLK_SHIFT 13 #define OMAP4430_CLKACTIVITY_ASYNC_PHY2_CLK_MASK (1 << 13) @@ -110,31 +105,31 @@ #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_SHIFT 9 #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_MASK (1 << 9) -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ +/* Used by CM_MEMIF_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_DLL_CLK_SHIFT 9 #define OMAP4430_CLKACTIVITY_DLL_CLK_MASK (1 << 9) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_DMT10_GFCLK_SHIFT 9 #define OMAP4430_CLKACTIVITY_DMT10_GFCLK_MASK (1 << 9) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_DMT11_GFCLK_SHIFT 10 #define OMAP4430_CLKACTIVITY_DMT11_GFCLK_MASK (1 << 10) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_DMT2_GFCLK_SHIFT 11 #define OMAP4430_CLKACTIVITY_DMT2_GFCLK_MASK (1 << 11) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_DMT3_GFCLK_SHIFT 12 #define OMAP4430_CLKACTIVITY_DMT3_GFCLK_MASK (1 << 12) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_DMT4_GFCLK_SHIFT 13 #define OMAP4430_CLKACTIVITY_DMT4_GFCLK_MASK (1 << 13) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_DMT9_GFCLK_SHIFT 14 #define OMAP4430_CLKACTIVITY_DMT9_GFCLK_MASK (1 << 14) @@ -158,7 +153,7 @@ #define OMAP4430_CLKACTIVITY_FDIF_GFCLK_SHIFT 10 #define OMAP4430_CLKACTIVITY_FDIF_GFCLK_MASK (1 << 10) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_FUNC_12M_GFCLK_SHIFT 15 #define OMAP4430_CLKACTIVITY_FUNC_12M_GFCLK_MASK (1 << 15) @@ -170,55 +165,55 @@ #define OMAP4430_CLKACTIVITY_HDMI_PHY_48MHZ_GFCLK_SHIFT 11 #define OMAP4430_CLKACTIVITY_HDMI_PHY_48MHZ_GFCLK_MASK (1 << 11) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_HSIC_P1_480M_GFCLK_SHIFT 20 #define OMAP4430_CLKACTIVITY_HSIC_P1_480M_GFCLK_MASK (1 << 20) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_HSIC_P1_GFCLK_SHIFT 26 #define OMAP4430_CLKACTIVITY_HSIC_P1_GFCLK_MASK (1 << 26) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_HSIC_P2_480M_GFCLK_SHIFT 21 #define OMAP4430_CLKACTIVITY_HSIC_P2_480M_GFCLK_MASK (1 << 21) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_HSIC_P2_GFCLK_SHIFT 27 #define OMAP4430_CLKACTIVITY_HSIC_P2_GFCLK_MASK (1 << 27) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_48MC_GFCLK_SHIFT 13 #define OMAP4430_CLKACTIVITY_INIT_48MC_GFCLK_MASK (1 << 13) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_48M_GFCLK_SHIFT 12 #define OMAP4430_CLKACTIVITY_INIT_48M_GFCLK_MASK (1 << 12) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_60M_P1_GFCLK_SHIFT 28 #define OMAP4430_CLKACTIVITY_INIT_60M_P1_GFCLK_MASK (1 << 28) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_60M_P2_GFCLK_SHIFT 29 #define OMAP4430_CLKACTIVITY_INIT_60M_P2_GFCLK_MASK (1 << 29) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_96M_GFCLK_SHIFT 11 #define OMAP4430_CLKACTIVITY_INIT_96M_GFCLK_MASK (1 << 11) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_HSI_GFCLK_SHIFT 16 #define OMAP4430_CLKACTIVITY_INIT_HSI_GFCLK_MASK (1 << 16) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_HSMMC1_GFCLK_SHIFT 17 #define OMAP4430_CLKACTIVITY_INIT_HSMMC1_GFCLK_MASK (1 << 17) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_HSMMC2_GFCLK_SHIFT 18 #define OMAP4430_CLKACTIVITY_INIT_HSMMC2_GFCLK_MASK (1 << 18) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_HSMMC6_GFCLK_SHIFT 19 #define OMAP4430_CLKACTIVITY_INIT_HSMMC6_GFCLK_MASK (1 << 19) @@ -234,11 +229,11 @@ #define OMAP4430_CLKACTIVITY_L3X2_D2D_GICLK_SHIFT 10 #define OMAP4430_CLKACTIVITY_L3X2_D2D_GICLK_MASK (1 << 10) -/* Used by CM_L3_1_CLKSTCTRL, CM_L3_1_CLKSTCTRL_RESTORE */ +/* Used by CM_L3_1_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_L3_1_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L3_1_GICLK_MASK (1 << 8) -/* Used by CM_L3_2_CLKSTCTRL, CM_L3_2_CLKSTCTRL_RESTORE */ +/* Used by CM_L3_2_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_L3_2_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L3_2_GICLK_MASK (1 << 8) @@ -254,7 +249,7 @@ #define OMAP4430_CLKACTIVITY_L3_DSS_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L3_DSS_GICLK_MASK (1 << 8) -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ +/* Used by CM_MEMIF_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_L3_EMIF_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L3_EMIF_GICLK_MASK (1 << 8) @@ -262,7 +257,7 @@ #define OMAP4430_CLKACTIVITY_L3_GFX_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L3_GFX_GICLK_MASK (1 << 8) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_L3_INIT_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L3_INIT_GICLK_MASK (1 << 8) @@ -282,7 +277,7 @@ #define OMAP4430_CLKACTIVITY_L4_CEFUSE_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L4_CEFUSE_GICLK_MASK (1 << 8) -/* Used by CM_L4CFG_CLKSTCTRL, CM_L4CFG_CLKSTCTRL_RESTORE */ +/* Used by CM_L4CFG_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_L4_CFG_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L4_CFG_GICLK_MASK (1 << 8) @@ -290,11 +285,11 @@ #define OMAP4430_CLKACTIVITY_L4_D2D_GICLK_SHIFT 9 #define OMAP4430_CLKACTIVITY_L4_D2D_GICLK_MASK (1 << 9) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_L4_INIT_GICLK_SHIFT 9 #define OMAP4430_CLKACTIVITY_L4_INIT_GICLK_MASK (1 << 9) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_L4_PER_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L4_PER_GICLK_MASK (1 << 8) @@ -306,7 +301,7 @@ #define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_SHIFT 12 #define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_MASK (1 << 12) -/* Used by CM_MPU_CLKSTCTRL, CM_MPU_CLKSTCTRL_RESTORE */ +/* Used by CM_MPU_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_MASK (1 << 8) @@ -314,43 +309,43 @@ #define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_SHIFT 9 #define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_MASK (1 << 9) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_SHIFT 16 #define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_MASK (1 << 16) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_SHIFT 17 #define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_MASK (1 << 17) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_SHIFT 18 #define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_MASK (1 << 18) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_SHIFT 19 #define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_MASK (1 << 19) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_SHIFT 25 #define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_MASK (1 << 25) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_SHIFT 20 #define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_MASK (1 << 20) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_MCASP3_GFCLK_SHIFT 21 #define OMAP4430_CLKACTIVITY_PER_MCASP3_GFCLK_MASK (1 << 21) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_SHIFT 22 #define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_MASK (1 << 22) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_SHIFT 24 #define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_MASK (1 << 24) -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ +/* Used by CM_MEMIF_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_SHIFT 10 #define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_MASK (1 << 10) @@ -378,27 +373,27 @@ #define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_MASK (1 << 8) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_SHIFT 22 #define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_MASK (1 << 22) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_SHIFT 23 #define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_MASK (1 << 23) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_SHIFT 24 #define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_MASK (1 << 24) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_UNIPRO_DPLL_CLK_SHIFT 10 #define OMAP4430_CLKACTIVITY_UNIPRO_DPLL_CLK_MASK (1 << 10) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_USB_DPLL_CLK_SHIFT 14 #define OMAP4430_CLKACTIVITY_USB_DPLL_CLK_MASK (1 << 14) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_SHIFT 15 #define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_MASK (1 << 15) @@ -406,11 +401,11 @@ #define OMAP4430_CLKACTIVITY_USIM_GFCLK_SHIFT 10 #define OMAP4430_CLKACTIVITY_USIM_GFCLK_MASK (1 << 10) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_SHIFT 30 #define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_MASK (1 << 30) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_SHIFT 25 #define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_MASK (1 << 25) @@ -432,7 +427,7 @@ /* * Renamed from CLKSEL Used by CM_ABE_DSS_SYS_CLKSEL, CM_ABE_PLL_REF_CLKSEL, - * CM_L4_WKUP_CLKSEL, CM_CLKSEL_DUCATI_ISS_ROOT, CM_CLKSEL_USB_60MHZ + * CM_CLKSEL_DUCATI_ISS_ROOT, CM_CLKSEL_USB_60MHZ, CM_L4_WKUP_CLKSEL */ #define OMAP4430_CLKSEL_0_0_SHIFT 0 #define OMAP4430_CLKSEL_0_0_MASK (1 << 0) @@ -453,14 +448,11 @@ #define OMAP4430_CLKSEL_AESS_FCLK_SHIFT 24 #define OMAP4430_CLKSEL_AESS_FCLK_MASK (1 << 24) -/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */ +/* Used by CM_CLKSEL_CORE */ #define OMAP4430_CLKSEL_CORE_SHIFT 0 #define OMAP4430_CLKSEL_CORE_MASK (1 << 0) -/* - * Renamed from CLKSEL_CORE Used by CM_SHADOW_FREQ_CONFIG2_RESTORE, - * CM_SHADOW_FREQ_CONFIG2 - */ +/* Renamed from CLKSEL_CORE Used by CM_SHADOW_FREQ_CONFIG2 */ #define OMAP4430_CLKSEL_CORE_1_1_SHIFT 1 #define OMAP4430_CLKSEL_CORE_1_1_MASK (1 << 1) @@ -484,18 +476,15 @@ #define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_SHIFT 26 #define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_MASK (0x3 << 26) -/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */ +/* Used by CM_CLKSEL_CORE */ #define OMAP4430_CLKSEL_L3_SHIFT 4 #define OMAP4430_CLKSEL_L3_MASK (1 << 4) -/* - * Renamed from CLKSEL_L3 Used by CM_SHADOW_FREQ_CONFIG2_RESTORE, - * CM_SHADOW_FREQ_CONFIG2 - */ +/* Renamed from CLKSEL_L3 Used by CM_SHADOW_FREQ_CONFIG2 */ #define OMAP4430_CLKSEL_L3_SHADOW_SHIFT 2 #define OMAP4430_CLKSEL_L3_SHADOW_MASK (1 << 2) -/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */ +/* Used by CM_CLKSEL_CORE */ #define OMAP4430_CLKSEL_L4_SHIFT 8 #define OMAP4430_CLKSEL_L4_MASK (1 << 8) @@ -526,11 +515,11 @@ #define OMAP4430_CLKSEL_SOURCE_24_24_SHIFT 24 #define OMAP4430_CLKSEL_SOURCE_24_24_MASK (1 << 24) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_CLKSEL_UTMI_P1_SHIFT 24 #define OMAP4430_CLKSEL_UTMI_P1_MASK (1 << 24) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_CLKSEL_UTMI_P2_SHIFT 25 #define OMAP4430_CLKSEL_UTMI_P2_MASK (1 << 25) @@ -538,13 +527,10 @@ * Used by CM1_ABE_CLKSTCTRL, CM_ALWON_CLKSTCTRL, CM_CAM_CLKSTCTRL, * CM_CEFUSE_CLKSTCTRL, CM_D2D_CLKSTCTRL, CM_DSS_CLKSTCTRL, * CM_DUCATI_CLKSTCTRL, CM_EMU_CLKSTCTRL, CM_GFX_CLKSTCTRL, CM_IVAHD_CLKSTCTRL, - * CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE, CM_L3INSTR_CLKSTCTRL, - * CM_L3_1_CLKSTCTRL, CM_L3_1_CLKSTCTRL_RESTORE, CM_L3_2_CLKSTCTRL, - * CM_L3_2_CLKSTCTRL_RESTORE, CM_L4CFG_CLKSTCTRL, CM_L4CFG_CLKSTCTRL_RESTORE, - * CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE, CM_L4SEC_CLKSTCTRL, - * CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE, CM_MPU_CLKSTCTRL, - * CM_MPU_CLKSTCTRL_RESTORE, CM_SDMA_CLKSTCTRL, CM_TESLA_CLKSTCTRL, - * CM_WKUP_CLKSTCTRL + * CM_L3INIT_CLKSTCTRL, CM_L3INSTR_CLKSTCTRL, CM_L3_1_CLKSTCTRL, + * CM_L3_2_CLKSTCTRL, CM_L4CFG_CLKSTCTRL, CM_L4PER_CLKSTCTRL, + * CM_L4SEC_CLKSTCTRL, CM_MEMIF_CLKSTCTRL, CM_MPU_CLKSTCTRL, CM_SDMA_CLKSTCTRL, + * CM_TESLA_CLKSTCTRL, CM_WKUP_CLKSTCTRL */ #define OMAP4430_CLKTRCTRL_SHIFT 0 #define OMAP4430_CLKTRCTRL_MASK (0x3 << 0) @@ -561,10 +547,7 @@ #define OMAP4430_CUSTOM_SHIFT 6 #define OMAP4430_CUSTOM_MASK (0x3 << 6) -/* - * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, - * CM_L4CFG_DYNAMICDEP_RESTORE - */ +/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP */ #define OMAP4430_D2D_DYNDEP_SHIFT 18 #define OMAP4430_D2D_DYNDEP_MASK (1 << 18) @@ -574,31 +557,29 @@ /* * Used by CM_SSC_DELTAMSTEP_DPLL_ABE, CM_SSC_DELTAMSTEP_DPLL_CORE, - * CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE, CM_SSC_DELTAMSTEP_DPLL_DDRPHY, - * CM_SSC_DELTAMSTEP_DPLL_IVA, CM_SSC_DELTAMSTEP_DPLL_MPU, - * CM_SSC_DELTAMSTEP_DPLL_PER, CM_SSC_DELTAMSTEP_DPLL_UNIPRO, - * CM_SSC_DELTAMSTEP_DPLL_USB + * CM_SSC_DELTAMSTEP_DPLL_DDRPHY, CM_SSC_DELTAMSTEP_DPLL_IVA, + * CM_SSC_DELTAMSTEP_DPLL_MPU, CM_SSC_DELTAMSTEP_DPLL_PER, + * CM_SSC_DELTAMSTEP_DPLL_UNIPRO, CM_SSC_DELTAMSTEP_DPLL_USB */ #define OMAP4430_DELTAMSTEP_SHIFT 0 #define OMAP4430_DELTAMSTEP_MASK (0xfffff << 0) -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ -#define OMAP4430_DLL_OVERRIDE_SHIFT 2 -#define OMAP4430_DLL_OVERRIDE_MASK (1 << 2) +/* Used by CM_DLL_CTRL */ +#define OMAP4430_DLL_OVERRIDE_SHIFT 0 +#define OMAP4430_DLL_OVERRIDE_MASK (1 << 0) -/* Renamed from DLL_OVERRIDE Used by CM_DLL_CTRL */ -#define OMAP4430_DLL_OVERRIDE_0_0_SHIFT 0 -#define OMAP4430_DLL_OVERRIDE_0_0_MASK (1 << 0) +/* Renamed from DLL_OVERRIDE Used by CM_SHADOW_FREQ_CONFIG1 */ +#define OMAP4430_DLL_OVERRIDE_2_2_SHIFT 2 +#define OMAP4430_DLL_OVERRIDE_2_2_MASK (1 << 2) -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ +/* Used by CM_SHADOW_FREQ_CONFIG1 */ #define OMAP4430_DLL_RESET_SHIFT 3 #define OMAP4430_DLL_RESET_MASK (1 << 3) /* - * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, - * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA, - * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO, - * CM_CLKSEL_DPLL_USB + * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDRPHY, + * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, + * CM_CLKSEL_DPLL_UNIPRO, CM_CLKSEL_DPLL_USB */ #define OMAP4430_DPLL_BYP_CLKSEL_SHIFT 23 #define OMAP4430_DPLL_BYP_CLKSEL_MASK (1 << 23) @@ -607,28 +588,19 @@ #define OMAP4430_DPLL_CLKDCOLDO_GATE_CTRL_SHIFT 8 #define OMAP4430_DPLL_CLKDCOLDO_GATE_CTRL_MASK (1 << 8) -/* Used by CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_CORE_RESTORE */ +/* Used by CM_CLKSEL_DPLL_CORE */ #define OMAP4430_DPLL_CLKOUTHIF_CLKSEL_SHIFT 20 #define OMAP4430_DPLL_CLKOUTHIF_CLKSEL_MASK (1 << 20) -/* - * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, - * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER - */ +/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */ #define OMAP4430_DPLL_CLKOUTHIF_DIV_SHIFT 0 #define OMAP4430_DPLL_CLKOUTHIF_DIV_MASK (0x1f << 0) -/* - * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, - * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER - */ +/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */ #define OMAP4430_DPLL_CLKOUTHIF_DIVCHACK_SHIFT 5 #define OMAP4430_DPLL_CLKOUTHIF_DIVCHACK_MASK (1 << 5) -/* - * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, - * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER - */ +/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */ #define OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT 8 #define OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_MASK (1 << 8) @@ -637,9 +609,8 @@ #define OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK (1 << 10) /* - * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, - * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU, - * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO + * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, + * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO */ #define OMAP4430_DPLL_CLKOUT_DIV_SHIFT 0 #define OMAP4430_DPLL_CLKOUT_DIV_MASK (0x1f << 0) @@ -649,9 +620,8 @@ #define OMAP4430_DPLL_CLKOUT_DIV_0_6_MASK (0x7f << 0) /* - * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, - * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU, - * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO + * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, + * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO */ #define OMAP4430_DPLL_CLKOUT_DIVCHACK_SHIFT 5 #define OMAP4430_DPLL_CLKOUT_DIVCHACK_MASK (1 << 5) @@ -661,29 +631,28 @@ #define OMAP4430_DPLL_CLKOUT_DIVCHACK_M2_USB_MASK (1 << 7) /* - * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, - * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU, - * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB + * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, + * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB */ #define OMAP4430_DPLL_CLKOUT_GATE_CTRL_SHIFT 8 #define OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK (1 << 8) -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ +/* Used by CM_SHADOW_FREQ_CONFIG1 */ #define OMAP4430_DPLL_CORE_DPLL_EN_SHIFT 8 #define OMAP4430_DPLL_CORE_DPLL_EN_MASK (0x7 << 8) -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ +/* Used by CM_SHADOW_FREQ_CONFIG1 */ #define OMAP4430_DPLL_CORE_M2_DIV_SHIFT 11 #define OMAP4430_DPLL_CORE_M2_DIV_MASK (0x1f << 11) -/* Used by CM_SHADOW_FREQ_CONFIG2, CM_SHADOW_FREQ_CONFIG2_RESTORE */ +/* Used by CM_SHADOW_FREQ_CONFIG2 */ #define OMAP4430_DPLL_CORE_M5_DIV_SHIFT 3 #define OMAP4430_DPLL_CORE_M5_DIV_MASK (0x1f << 3) /* - * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, - * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA, - * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO + * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDRPHY, + * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, + * CM_CLKSEL_DPLL_UNIPRO */ #define OMAP4430_DPLL_DIV_SHIFT 0 #define OMAP4430_DPLL_DIV_MASK (0x7f << 0) @@ -693,9 +662,8 @@ #define OMAP4430_DPLL_DIV_0_7_MASK (0xff << 0) /* - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER */ #define OMAP4430_DPLL_DRIFTGUARD_EN_SHIFT 8 #define OMAP4430_DPLL_DRIFTGUARD_EN_MASK (1 << 8) @@ -705,26 +673,25 @@ #define OMAP4430_DPLL_DRIFTGUARD_EN_3_3_MASK (1 << 3) /* - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, - * CM_CLKMODE_DPLL_USB + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, + * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB */ #define OMAP4430_DPLL_EN_SHIFT 0 #define OMAP4430_DPLL_EN_MASK (0x7 << 0) /* - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, + * CM_CLKMODE_DPLL_UNIPRO */ #define OMAP4430_DPLL_LPMODE_EN_SHIFT 10 #define OMAP4430_DPLL_LPMODE_EN_MASK (1 << 10) /* - * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, - * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA, - * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO + * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDRPHY, + * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, + * CM_CLKSEL_DPLL_UNIPRO */ #define OMAP4430_DPLL_MULT_SHIFT 8 #define OMAP4430_DPLL_MULT_MASK (0x7ff << 8) @@ -734,9 +701,9 @@ #define OMAP4430_DPLL_MULT_USB_MASK (0xfff << 8) /* - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, + * CM_CLKMODE_DPLL_UNIPRO */ #define OMAP4430_DPLL_REGM4XEN_SHIFT 11 #define OMAP4430_DPLL_REGM4XEN_MASK (1 << 11) @@ -746,55 +713,46 @@ #define OMAP4430_DPLL_SD_DIV_MASK (0xff << 24) /* - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, - * CM_CLKMODE_DPLL_USB + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, + * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB */ #define OMAP4430_DPLL_SSC_ACK_SHIFT 13 #define OMAP4430_DPLL_SSC_ACK_MASK (1 << 13) /* - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, - * CM_CLKMODE_DPLL_USB + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, + * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB */ #define OMAP4430_DPLL_SSC_DOWNSPREAD_SHIFT 14 #define OMAP4430_DPLL_SSC_DOWNSPREAD_MASK (1 << 14) /* - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, - * CM_CLKMODE_DPLL_USB + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, + * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB */ #define OMAP4430_DPLL_SSC_EN_SHIFT 12 #define OMAP4430_DPLL_SSC_EN_MASK (1 << 12) -/* - * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, CM_L4PER_DYNAMICDEP_RESTORE - */ +/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, CM_L4PER_DYNAMICDEP */ #define OMAP4430_DSS_DYNDEP_SHIFT 8 #define OMAP4430_DSS_DYNDEP_MASK (1 << 8) -/* - * Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, - * CM_SDMA_STATICDEP_RESTORE - */ +/* Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP */ #define OMAP4430_DSS_STATDEP_SHIFT 8 #define OMAP4430_DSS_STATDEP_MASK (1 << 8) -/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */ +/* Used by CM_L3_2_DYNAMICDEP */ #define OMAP4430_DUCATI_DYNDEP_SHIFT 0 #define OMAP4430_DUCATI_DYNDEP_MASK (1 << 0) -/* Used by CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE */ +/* Used by CM_MPU_STATICDEP, CM_SDMA_STATICDEP */ #define OMAP4430_DUCATI_STATDEP_SHIFT 0 #define OMAP4430_DUCATI_STATDEP_MASK (1 << 0) -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ +/* Used by CM_SHADOW_FREQ_CONFIG1 */ #define OMAP4430_FREQ_UPDATE_SHIFT 0 #define OMAP4430_FREQ_UPDATE_MASK (1 << 0) @@ -802,7 +760,7 @@ #define OMAP4430_FUNC_SHIFT 16 #define OMAP4430_FUNC_MASK (0xfff << 16) -/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */ +/* Used by CM_L3_2_DYNAMICDEP */ #define OMAP4430_GFX_DYNDEP_SHIFT 10 #define OMAP4430_GFX_DYNDEP_MASK (1 << 10) @@ -810,119 +768,95 @@ #define OMAP4430_GFX_STATDEP_SHIFT 10 #define OMAP4430_GFX_STATDEP_MASK (1 << 10) -/* Used by CM_SHADOW_FREQ_CONFIG2, CM_SHADOW_FREQ_CONFIG2_RESTORE */ +/* Used by CM_SHADOW_FREQ_CONFIG2 */ #define OMAP4430_GPMC_FREQ_UPDATE_SHIFT 0 #define OMAP4430_GPMC_FREQ_UPDATE_MASK (1 << 0) /* - * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, - * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER + * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, + * CM_DIV_M4_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT1_DIV_SHIFT 0 #define OMAP4430_HSDIVIDER_CLKOUT1_DIV_MASK (0x1f << 0) /* - * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, - * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER + * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, + * CM_DIV_M4_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT1_DIVCHACK_SHIFT 5 #define OMAP4430_HSDIVIDER_CLKOUT1_DIVCHACK_MASK (1 << 5) /* - * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, - * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER + * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, + * CM_DIV_M4_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT1_GATE_CTRL_SHIFT 8 #define OMAP4430_HSDIVIDER_CLKOUT1_GATE_CTRL_MASK (1 << 8) /* - * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, - * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER + * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, + * CM_DIV_M4_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT1_PWDN_SHIFT 12 #define OMAP4430_HSDIVIDER_CLKOUT1_PWDN_MASK (1 << 12) /* - * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, - * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER + * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, + * CM_DIV_M5_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT2_DIV_SHIFT 0 #define OMAP4430_HSDIVIDER_CLKOUT2_DIV_MASK (0x1f << 0) /* - * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, - * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER + * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, + * CM_DIV_M5_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT2_DIVCHACK_SHIFT 5 #define OMAP4430_HSDIVIDER_CLKOUT2_DIVCHACK_MASK (1 << 5) /* - * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, - * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER + * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, + * CM_DIV_M5_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT2_GATE_CTRL_SHIFT 8 #define OMAP4430_HSDIVIDER_CLKOUT2_GATE_CTRL_MASK (1 << 8) /* - * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, - * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER + * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, + * CM_DIV_M5_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT2_PWDN_SHIFT 12 #define OMAP4430_HSDIVIDER_CLKOUT2_PWDN_MASK (1 << 12) -/* - * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, - * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER - */ +/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT3_DIV_SHIFT 0 #define OMAP4430_HSDIVIDER_CLKOUT3_DIV_MASK (0x1f << 0) -/* - * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, - * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER - */ +/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT3_DIVCHACK_SHIFT 5 #define OMAP4430_HSDIVIDER_CLKOUT3_DIVCHACK_MASK (1 << 5) -/* - * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, - * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER - */ +/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT3_GATE_CTRL_SHIFT 8 #define OMAP4430_HSDIVIDER_CLKOUT3_GATE_CTRL_MASK (1 << 8) -/* - * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, - * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER - */ +/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT3_PWDN_SHIFT 12 #define OMAP4430_HSDIVIDER_CLKOUT3_PWDN_MASK (1 << 12) -/* - * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, - * CM_DIV_M7_DPLL_PER - */ +/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT4_DIV_SHIFT 0 #define OMAP4430_HSDIVIDER_CLKOUT4_DIV_MASK (0x1f << 0) -/* - * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, - * CM_DIV_M7_DPLL_PER - */ +/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT4_DIVCHACK_SHIFT 5 #define OMAP4430_HSDIVIDER_CLKOUT4_DIVCHACK_MASK (1 << 5) -/* - * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, - * CM_DIV_M7_DPLL_PER - */ +/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT4_GATE_CTRL_SHIFT 8 #define OMAP4430_HSDIVIDER_CLKOUT4_GATE_CTRL_MASK (1 << 8) -/* - * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, - * CM_DIV_M7_DPLL_PER - */ +/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT4_PWDN_SHIFT 12 #define OMAP4430_HSDIVIDER_CLKOUT4_PWDN_MASK (1 << 12) @@ -934,8 +868,7 @@ * CM1_ABE_TIMER8_CLKCTRL, CM1_ABE_WDT3_CLKCTRL, CM_ALWON_MDMINTC_CLKCTRL, * CM_ALWON_SR_CORE_CLKCTRL, CM_ALWON_SR_IVA_CLKCTRL, CM_ALWON_SR_MPU_CLKCTRL, * CM_CAM_FDIF_CLKCTRL, CM_CAM_ISS_CLKCTRL, CM_CEFUSE_CEFUSE_CLKCTRL, - * CM_CM1_PROFILING_CLKCTRL, CM_CM1_PROFILING_CLKCTRL_RESTORE, - * CM_CM2_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL_RESTORE, + * CM_CM1_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL, * CM_D2D_MODEM_ICR_CLKCTRL, CM_D2D_SAD2D_CLKCTRL, CM_D2D_SAD2D_FW_CLKCTRL, * CM_DSS_DEISS_CLKCTRL, CM_DSS_DSS_CLKCTRL, CM_DUCATI_DUCATI_CLKCTRL, * CM_EMU_DEBUGSS_CLKCTRL, CM_GFX_GFX_CLKCTRL, CM_IVAHD_IVAHD_CLKCTRL, @@ -944,30 +877,24 @@ * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL, * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL, * CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL, - * CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, CM_L3INIT_USB_HOST_FS_CLKCTRL, - * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL, - * CM_L3INIT_USB_TLL_CLKCTRL_RESTORE, CM_L3INIT_XHPI_CLKCTRL, - * CM_L3INSTR_L3_3_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL_RESTORE, - * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE, - * CM_L3INSTR_OCP_WP1_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE, + * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, + * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL, + * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL, * CM_L3_1_L3_1_CLKCTRL, CM_L3_2_GPMC_CLKCTRL, CM_L3_2_L3_2_CLKCTRL, * CM_L3_2_OCMC_RAM_CLKCTRL, CM_L4CFG_HW_SEM_CLKCTRL, CM_L4CFG_L4_CFG_CLKCTRL, * CM_L4CFG_MAILBOX_CLKCTRL, CM_L4CFG_SAR_ROM_CLKCTRL, CM_L4PER_ADC_CLKCTRL, * CM_L4PER_DMTIMER10_CLKCTRL, CM_L4PER_DMTIMER11_CLKCTRL, * CM_L4PER_DMTIMER2_CLKCTRL, CM_L4PER_DMTIMER3_CLKCTRL, * CM_L4PER_DMTIMER4_CLKCTRL, CM_L4PER_DMTIMER9_CLKCTRL, CM_L4PER_ELM_CLKCTRL, - * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE, - * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE, - * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE, - * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE, - * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE, - * CM_L4PER_HDQ1W_CLKCTRL, CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, - * CM_L4PER_I2C1_CLKCTRL, CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, - * CM_L4PER_I2C4_CLKCTRL, CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, - * CM_L4PER_MCASP2_CLKCTRL, CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, - * CM_L4PER_MCSPI1_CLKCTRL, CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, - * CM_L4PER_MCSPI4_CLKCTRL, CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, - * CM_L4PER_MMCSD4_CLKCTRL, CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, + * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL, + * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_HDQ1W_CLKCTRL, + * CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, CM_L4PER_I2C1_CLKCTRL, + * CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, CM_L4PER_I2C4_CLKCTRL, + * CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, CM_L4PER_MCASP2_CLKCTRL, + * CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, CM_L4PER_MCSPI1_CLKCTRL, + * CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, CM_L4PER_MCSPI4_CLKCTRL, + * CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, CM_L4PER_MMCSD4_CLKCTRL, + * CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, * CM_L4PER_SLIMBUS2_CLKCTRL, CM_L4PER_UART1_CLKCTRL, CM_L4PER_UART2_CLKCTRL, * CM_L4PER_UART3_CLKCTRL, CM_L4PER_UART4_CLKCTRL, CM_L4SEC_AES1_CLKCTRL, * CM_L4SEC_AES2_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, CM_L4SEC_DES3DES_CLKCTRL, @@ -983,166 +910,148 @@ #define OMAP4430_IDLEST_SHIFT 16 #define OMAP4430_IDLEST_MASK (0x3 << 16) -/* - * Used by CM_DUCATI_DYNAMICDEP, CM_L3_2_DYNAMICDEP, - * CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE - */ +/* Used by CM_DUCATI_DYNAMICDEP, CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP */ #define OMAP4430_ISS_DYNDEP_SHIFT 9 #define OMAP4430_ISS_DYNDEP_MASK (1 << 9) /* * Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, - * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * CM_TESLA_STATICDEP */ #define OMAP4430_ISS_STATDEP_SHIFT 9 #define OMAP4430_ISS_STATDEP_MASK (1 << 9) -/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_TESLA_DYNAMICDEP */ +/* Used by CM_L3_2_DYNAMICDEP, CM_TESLA_DYNAMICDEP */ #define OMAP4430_IVAHD_DYNDEP_SHIFT 2 #define OMAP4430_IVAHD_DYNDEP_MASK (1 << 2) /* - * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, - * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, - * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, - * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP, + * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_L3INIT_STATICDEP, + * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_IVAHD_STATDEP_SHIFT 2 #define OMAP4430_IVAHD_STATDEP_MASK (1 << 2) -/* - * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, CM_L4PER_DYNAMICDEP_RESTORE - */ +/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, CM_L4PER_DYNAMICDEP */ #define OMAP4430_L3INIT_DYNDEP_SHIFT 7 #define OMAP4430_L3INIT_DYNDEP_MASK (1 << 7) /* - * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP, - * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, - * CM_TESLA_STATICDEP + * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, + * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_L3INIT_STATDEP_SHIFT 7 #define OMAP4430_L3INIT_STATDEP_MASK (1 << 7) /* * Used by CM_DSS_DYNAMICDEP, CM_L3INIT_DYNAMICDEP, CM_L3_2_DYNAMICDEP, - * CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP + * CM_L4CFG_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP */ #define OMAP4430_L3_1_DYNDEP_SHIFT 5 #define OMAP4430_L3_1_DYNDEP_MASK (1 << 5) /* - * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, - * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, + * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP, + * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_L3_1_STATDEP_SHIFT 5 #define OMAP4430_L3_1_STATDEP_MASK (1 << 5) /* - * Used by CM_CAM_DYNAMICDEP, CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE, - * CM_DUCATI_DYNAMICDEP, CM_EMU_DYNAMICDEP, CM_GFX_DYNAMICDEP, - * CM_IVAHD_DYNAMICDEP, CM_L3INIT_DYNAMICDEP, CM_L3_1_DYNAMICDEP, - * CM_L3_1_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4SEC_DYNAMICDEP, CM_SDMA_DYNAMICDEP + * Used by CM_CAM_DYNAMICDEP, CM_D2D_DYNAMICDEP, CM_DUCATI_DYNAMICDEP, + * CM_EMU_DYNAMICDEP, CM_GFX_DYNAMICDEP, CM_IVAHD_DYNAMICDEP, + * CM_L3INIT_DYNAMICDEP, CM_L3_1_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, + * CM_L4SEC_DYNAMICDEP, CM_SDMA_DYNAMICDEP */ #define OMAP4430_L3_2_DYNDEP_SHIFT 6 #define OMAP4430_L3_2_DYNDEP_MASK (1 << 6) /* - * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, - * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, + * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP, + * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_L3_2_STATDEP_SHIFT 6 #define OMAP4430_L3_2_STATDEP_MASK (1 << 6) -/* Used by CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE */ +/* Used by CM_L3_1_DYNAMICDEP */ #define OMAP4430_L4CFG_DYNDEP_SHIFT 12 #define OMAP4430_L4CFG_DYNDEP_MASK (1 << 12) /* - * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP, - * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, - * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, + * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_L4CFG_STATDEP_SHIFT 12 #define OMAP4430_L4CFG_STATDEP_MASK (1 << 12) -/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */ +/* Used by CM_L3_2_DYNAMICDEP */ #define OMAP4430_L4PER_DYNDEP_SHIFT 13 #define OMAP4430_L4PER_DYNDEP_MASK (1 << 13) /* - * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP, - * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, + * CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_L4PER_STATDEP_SHIFT 13 #define OMAP4430_L4PER_STATDEP_MASK (1 << 13) -/* - * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, - * CM_L4PER_DYNAMICDEP_RESTORE - */ +/* Used by CM_L3_2_DYNAMICDEP, CM_L4PER_DYNAMICDEP */ #define OMAP4430_L4SEC_DYNDEP_SHIFT 14 #define OMAP4430_L4SEC_DYNDEP_MASK (1 << 14) /* * Used by CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE + * CM_SDMA_STATICDEP */ #define OMAP4430_L4SEC_STATDEP_SHIFT 14 #define OMAP4430_L4SEC_STATDEP_MASK (1 << 14) -/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ +/* Used by CM_L4CFG_DYNAMICDEP */ #define OMAP4430_L4WKUP_DYNDEP_SHIFT 15 #define OMAP4430_L4WKUP_DYNDEP_MASK (1 << 15) /* * Used by CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_L4WKUP_STATDEP_SHIFT 15 #define OMAP4430_L4WKUP_STATDEP_MASK (1 << 15) /* - * Used by CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE, CM_L3_1_DYNAMICDEP, - * CM_L3_1_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP + * Used by CM_D2D_DYNAMICDEP, CM_L3_1_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, + * CM_MPU_DYNAMICDEP */ #define OMAP4430_MEMIF_DYNDEP_SHIFT 4 #define OMAP4430_MEMIF_DYNDEP_MASK (1 << 4) /* - * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, - * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, + * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP, + * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_MEMIF_STATDEP_SHIFT 4 #define OMAP4430_MEMIF_STATDEP_MASK (1 << 4) /* * Used by CM_SSC_MODFREQDIV_DPLL_ABE, CM_SSC_MODFREQDIV_DPLL_CORE, - * CM_SSC_MODFREQDIV_DPLL_CORE_RESTORE, CM_SSC_MODFREQDIV_DPLL_DDRPHY, - * CM_SSC_MODFREQDIV_DPLL_IVA, CM_SSC_MODFREQDIV_DPLL_MPU, - * CM_SSC_MODFREQDIV_DPLL_PER, CM_SSC_MODFREQDIV_DPLL_UNIPRO, - * CM_SSC_MODFREQDIV_DPLL_USB + * CM_SSC_MODFREQDIV_DPLL_DDRPHY, CM_SSC_MODFREQDIV_DPLL_IVA, + * CM_SSC_MODFREQDIV_DPLL_MPU, CM_SSC_MODFREQDIV_DPLL_PER, + * CM_SSC_MODFREQDIV_DPLL_UNIPRO, CM_SSC_MODFREQDIV_DPLL_USB */ #define OMAP4430_MODFREQDIV_EXPONENT_SHIFT 8 #define OMAP4430_MODFREQDIV_EXPONENT_MASK (0x7 << 8) /* * Used by CM_SSC_MODFREQDIV_DPLL_ABE, CM_SSC_MODFREQDIV_DPLL_CORE, - * CM_SSC_MODFREQDIV_DPLL_CORE_RESTORE, CM_SSC_MODFREQDIV_DPLL_DDRPHY, - * CM_SSC_MODFREQDIV_DPLL_IVA, CM_SSC_MODFREQDIV_DPLL_MPU, - * CM_SSC_MODFREQDIV_DPLL_PER, CM_SSC_MODFREQDIV_DPLL_UNIPRO, - * CM_SSC_MODFREQDIV_DPLL_USB + * CM_SSC_MODFREQDIV_DPLL_DDRPHY, CM_SSC_MODFREQDIV_DPLL_IVA, + * CM_SSC_MODFREQDIV_DPLL_MPU, CM_SSC_MODFREQDIV_DPLL_PER, + * CM_SSC_MODFREQDIV_DPLL_UNIPRO, CM_SSC_MODFREQDIV_DPLL_USB */ #define OMAP4430_MODFREQDIV_MANTISSA_SHIFT 0 #define OMAP4430_MODFREQDIV_MANTISSA_MASK (0x7f << 0) @@ -1155,8 +1064,7 @@ * CM1_ABE_TIMER8_CLKCTRL, CM1_ABE_WDT3_CLKCTRL, CM_ALWON_MDMINTC_CLKCTRL, * CM_ALWON_SR_CORE_CLKCTRL, CM_ALWON_SR_IVA_CLKCTRL, CM_ALWON_SR_MPU_CLKCTRL, * CM_CAM_FDIF_CLKCTRL, CM_CAM_ISS_CLKCTRL, CM_CEFUSE_CEFUSE_CLKCTRL, - * CM_CM1_PROFILING_CLKCTRL, CM_CM1_PROFILING_CLKCTRL_RESTORE, - * CM_CM2_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL_RESTORE, + * CM_CM1_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL, * CM_D2D_MODEM_ICR_CLKCTRL, CM_D2D_SAD2D_CLKCTRL, CM_D2D_SAD2D_FW_CLKCTRL, * CM_DSS_DEISS_CLKCTRL, CM_DSS_DSS_CLKCTRL, CM_DUCATI_DUCATI_CLKCTRL, * CM_EMU_DEBUGSS_CLKCTRL, CM_GFX_GFX_CLKCTRL, CM_IVAHD_IVAHD_CLKCTRL, @@ -1165,30 +1073,24 @@ * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL, * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL, * CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL, - * CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, CM_L3INIT_USB_HOST_FS_CLKCTRL, - * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL, - * CM_L3INIT_USB_TLL_CLKCTRL_RESTORE, CM_L3INIT_XHPI_CLKCTRL, - * CM_L3INSTR_L3_3_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL_RESTORE, - * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE, - * CM_L3INSTR_OCP_WP1_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE, + * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, + * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL, + * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL, * CM_L3_1_L3_1_CLKCTRL, CM_L3_2_GPMC_CLKCTRL, CM_L3_2_L3_2_CLKCTRL, * CM_L3_2_OCMC_RAM_CLKCTRL, CM_L4CFG_HW_SEM_CLKCTRL, CM_L4CFG_L4_CFG_CLKCTRL, * CM_L4CFG_MAILBOX_CLKCTRL, CM_L4CFG_SAR_ROM_CLKCTRL, CM_L4PER_ADC_CLKCTRL, * CM_L4PER_DMTIMER10_CLKCTRL, CM_L4PER_DMTIMER11_CLKCTRL, * CM_L4PER_DMTIMER2_CLKCTRL, CM_L4PER_DMTIMER3_CLKCTRL, * CM_L4PER_DMTIMER4_CLKCTRL, CM_L4PER_DMTIMER9_CLKCTRL, CM_L4PER_ELM_CLKCTRL, - * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE, - * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE, - * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE, - * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE, - * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE, - * CM_L4PER_HDQ1W_CLKCTRL, CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, - * CM_L4PER_I2C1_CLKCTRL, CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, - * CM_L4PER_I2C4_CLKCTRL, CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, - * CM_L4PER_MCASP2_CLKCTRL, CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, - * CM_L4PER_MCSPI1_CLKCTRL, CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, - * CM_L4PER_MCSPI4_CLKCTRL, CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, - * CM_L4PER_MMCSD4_CLKCTRL, CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, + * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL, + * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_HDQ1W_CLKCTRL, + * CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, CM_L4PER_I2C1_CLKCTRL, + * CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, CM_L4PER_I2C4_CLKCTRL, + * CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, CM_L4PER_MCASP2_CLKCTRL, + * CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, CM_L4PER_MCSPI1_CLKCTRL, + * CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, CM_L4PER_MCSPI4_CLKCTRL, + * CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, CM_L4PER_MMCSD4_CLKCTRL, + * CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, * CM_L4PER_SLIMBUS2_CLKCTRL, CM_L4PER_UART1_CLKCTRL, CM_L4PER_UART2_CLKCTRL, * CM_L4PER_UART3_CLKCTRL, CM_L4PER_UART4_CLKCTRL, CM_L4SEC_AES1_CLKCTRL, * CM_L4SEC_AES2_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, CM_L4SEC_DES3DES_CLKCTRL, @@ -1221,11 +1123,9 @@ #define OMAP4430_OPTFCLKEN_CTRLCLK_MASK (1 << 8) /* - * Used by CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE, - * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE, - * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE, - * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE, - * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE, CM_WKUP_GPIO1_CLKCTRL + * Used by CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, + * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL, + * CM_WKUP_GPIO1_CLKCTRL */ #define OMAP4430_OPTFCLKEN_DBCLK_SHIFT 8 #define OMAP4430_OPTFCLKEN_DBCLK_MASK (1 << 8) @@ -1254,23 +1154,23 @@ #define OMAP4430_OPTFCLKEN_FCLK2_SHIFT 10 #define OMAP4430_OPTFCLKEN_FCLK2_MASK (1 << 10) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_OPTFCLKEN_FUNC48MCLK_SHIFT 15 #define OMAP4430_OPTFCLKEN_FUNC48MCLK_MASK (1 << 15) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_SHIFT 13 #define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_MASK (1 << 13) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_SHIFT 14 #define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_MASK (1 << 14) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_SHIFT 11 #define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_MASK (1 << 11) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_SHIFT 12 #define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_MASK (1 << 12) @@ -1306,27 +1206,27 @@ #define OMAP4430_OPTFCLKEN_TXPHYCLK_SHIFT 8 #define OMAP4430_OPTFCLKEN_TXPHYCLK_MASK (1 << 8) -/* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_TLL_CLKCTRL */ #define OMAP4430_OPTFCLKEN_USB_CH0_CLK_SHIFT 8 #define OMAP4430_OPTFCLKEN_USB_CH0_CLK_MASK (1 << 8) -/* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_TLL_CLKCTRL */ #define OMAP4430_OPTFCLKEN_USB_CH1_CLK_SHIFT 9 #define OMAP4430_OPTFCLKEN_USB_CH1_CLK_MASK (1 << 9) -/* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_TLL_CLKCTRL */ #define OMAP4430_OPTFCLKEN_USB_CH2_CLK_SHIFT 10 #define OMAP4430_OPTFCLKEN_USB_CH2_CLK_MASK (1 << 10) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_SHIFT 8 #define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_MASK (1 << 8) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_SHIFT 9 #define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_MASK (1 << 9) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_SHIFT 10 #define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_MASK (1 << 10) @@ -1374,7 +1274,7 @@ #define OMAP4430_PMD_TRACE_MUX_CTRL_SHIFT 22 #define OMAP4430_PMD_TRACE_MUX_CTRL_MASK (0x3 << 22) -/* Used by CM_DYN_DEP_PRESCAL, CM_DYN_DEP_PRESCAL_RESTORE */ +/* Used by CM_DYN_DEP_PRESCAL */ #define OMAP4430_PRESCAL_SHIFT 0 #define OMAP4430_PRESCAL_MASK (0x3f << 0) @@ -1382,10 +1282,7 @@ #define OMAP4430_R_RTL_SHIFT 11 #define OMAP4430_R_RTL_MASK (0x1f << 11) -/* - * Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, - * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE - */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL */ #define OMAP4430_SAR_MODE_SHIFT 4 #define OMAP4430_SAR_MODE_MASK (1 << 4) @@ -1397,7 +1294,7 @@ #define OMAP4430_SCHEME_SHIFT 30 #define OMAP4430_SCHEME_MASK (0x3 << 30) -/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ +/* Used by CM_L4CFG_DYNAMICDEP */ #define OMAP4430_SDMA_DYNDEP_SHIFT 11 #define OMAP4430_SDMA_DYNDEP_MASK (1 << 11) @@ -1417,10 +1314,10 @@ * CM_L3INIT_HSI_CLKCTRL, CM_L3INIT_MMC1_CLKCTRL, CM_L3INIT_MMC2_CLKCTRL, * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL, * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL, - * CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, - * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, - * CM_L3INIT_XHPI_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, CM_MPU_MPU_CLKCTRL, - * CM_SDMA_SDMA_CLKCTRL, CM_TESLA_TESLA_CLKCTRL + * CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_FS_CLKCTRL, + * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, + * CM_L4SEC_CRYPTODMA_CLKCTRL, CM_MPU_MPU_CLKCTRL, CM_SDMA_SDMA_CLKCTRL, + * CM_TESLA_TESLA_CLKCTRL */ #define OMAP4430_STBYST_SHIFT 18 #define OMAP4430_STBYST_MASK (1 << 18) @@ -1438,17 +1335,13 @@ #define OMAP4430_ST_DPLL_CLKDCOLDO_MASK (1 << 9) /* - * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, - * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU, - * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB + * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, + * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB */ #define OMAP4430_ST_DPLL_CLKOUT_SHIFT 9 #define OMAP4430_ST_DPLL_CLKOUT_MASK (1 << 9) -/* - * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, - * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER - */ +/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */ #define OMAP4430_ST_DPLL_CLKOUTHIF_SHIFT 9 #define OMAP4430_ST_DPLL_CLKOUTHIF_MASK (1 << 9) @@ -1457,30 +1350,24 @@ #define OMAP4430_ST_DPLL_CLKOUTX2_MASK (1 << 11) /* - * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, - * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER + * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, + * CM_DIV_M4_DPLL_PER */ #define OMAP4430_ST_HSDIVIDER_CLKOUT1_SHIFT 9 #define OMAP4430_ST_HSDIVIDER_CLKOUT1_MASK (1 << 9) /* - * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, - * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER + * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, + * CM_DIV_M5_DPLL_PER */ #define OMAP4430_ST_HSDIVIDER_CLKOUT2_SHIFT 9 #define OMAP4430_ST_HSDIVIDER_CLKOUT2_MASK (1 << 9) -/* - * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, - * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER - */ +/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ #define OMAP4430_ST_HSDIVIDER_CLKOUT3_SHIFT 9 #define OMAP4430_ST_HSDIVIDER_CLKOUT3_MASK (1 << 9) -/* - * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, - * CM_DIV_M7_DPLL_PER - */ +/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ #define OMAP4430_ST_HSDIVIDER_CLKOUT4_SHIFT 9 #define OMAP4430_ST_HSDIVIDER_CLKOUT4_MASK (1 << 9) @@ -1496,7 +1383,7 @@ #define OMAP4430_SYS_CLKSEL_SHIFT 0 #define OMAP4430_SYS_CLKSEL_MASK (0x7 << 0) -/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ +/* Used by CM_L4CFG_DYNAMICDEP */ #define OMAP4430_TESLA_DYNDEP_SHIFT 1 #define OMAP4430_TESLA_DYNDEP_MASK (1 << 1) @@ -1505,11 +1392,9 @@ #define OMAP4430_TESLA_STATDEP_MASK (1 << 1) /* - * Used by CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE, CM_DUCATI_DYNAMICDEP, - * CM_EMU_DYNAMICDEP, CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE, - * CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, - * CM_L4PER_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP + * Used by CM_D2D_DYNAMICDEP, CM_DUCATI_DYNAMICDEP, CM_EMU_DYNAMICDEP, + * CM_L3_1_DYNAMICDEP, CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, + * CM_L4PER_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP */ #define OMAP4430_WINDOWSIZE_SHIFT 24 #define OMAP4430_WINDOWSIZE_MASK (0xf << 24) diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h index fc649f5d2506..1bc00dc4876c 100644 --- a/arch/arm/mach-omap2/cm1_44xx.h +++ b/arch/arm/mach-omap2/cm1_44xx.h @@ -217,42 +217,6 @@ #define OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET 0x0088 #define OMAP4430_CM1_ABE_WDT3_CLKCTRL OMAP44XX_CM1_REGADDR(OMAP4430_CM1_ABE_INST, 0x0088) -/* CM1.RESTORE_CM1 register offsets */ -#define OMAP4_CM_CLKSEL_CORE_RESTORE_OFFSET 0x0000 -#define OMAP4430_CM_CLKSEL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0000) -#define OMAP4_CM_DIV_M2_DPLL_CORE_RESTORE_OFFSET 0x0004 -#define OMAP4430_CM_DIV_M2_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0004) -#define OMAP4_CM_DIV_M3_DPLL_CORE_RESTORE_OFFSET 0x0008 -#define OMAP4430_CM_DIV_M3_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0008) -#define OMAP4_CM_DIV_M4_DPLL_CORE_RESTORE_OFFSET 0x000c -#define OMAP4430_CM_DIV_M4_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x000c) -#define OMAP4_CM_DIV_M5_DPLL_CORE_RESTORE_OFFSET 0x0010 -#define OMAP4430_CM_DIV_M5_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0010) -#define OMAP4_CM_DIV_M6_DPLL_CORE_RESTORE_OFFSET 0x0014 -#define OMAP4430_CM_DIV_M6_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0014) -#define OMAP4_CM_DIV_M7_DPLL_CORE_RESTORE_OFFSET 0x0018 -#define OMAP4430_CM_DIV_M7_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0018) -#define OMAP4_CM_CLKSEL_DPLL_CORE_RESTORE_OFFSET 0x001c -#define OMAP4430_CM_CLKSEL_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x001c) -#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE_OFFSET 0x0020 -#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0020) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_RESTORE_OFFSET 0x0024 -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0024) -#define OMAP4_CM_CLKMODE_DPLL_CORE_RESTORE_OFFSET 0x0028 -#define OMAP4430_CM_CLKMODE_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0028) -#define OMAP4_CM_SHADOW_FREQ_CONFIG2_RESTORE_OFFSET 0x002c -#define OMAP4430_CM_SHADOW_FREQ_CONFIG2_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x002c) -#define OMAP4_CM_SHADOW_FREQ_CONFIG1_RESTORE_OFFSET 0x0030 -#define OMAP4430_CM_SHADOW_FREQ_CONFIG1_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0030) -#define OMAP4_CM_AUTOIDLE_DPLL_CORE_RESTORE_OFFSET 0x0034 -#define OMAP4430_CM_AUTOIDLE_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0034) -#define OMAP4_CM_MPU_CLKSTCTRL_RESTORE_OFFSET 0x0038 -#define OMAP4430_CM_MPU_CLKSTCTRL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0038) -#define OMAP4_CM_CM1_PROFILING_CLKCTRL_RESTORE_OFFSET 0x003c -#define OMAP4430_CM_CM1_PROFILING_CLKCTRL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x003c) -#define OMAP4_CM_DYN_DEP_PRESCAL_RESTORE_OFFSET 0x0040 -#define OMAP4430_CM_DYN_DEP_PRESCAL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0040) - /* Function prototypes */ extern u32 omap4_cm1_read_inst_reg(s16 inst, u16 idx); extern void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 idx); diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-omap2/cm2_44xx.h index 8036a161b026..b9de72da1a8e 100644 --- a/arch/arm/mach-omap2/cm2_44xx.h +++ b/arch/arm/mach-omap2/cm2_44xx.h @@ -449,56 +449,6 @@ #define OMAP4_CM_CEFUSE_CEFUSE_CLKCTRL_OFFSET 0x0020 #define OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_INST, 0x0020) -/* CM2.RESTORE_CM2 register offsets */ -#define OMAP4_CM_L3_1_CLKSTCTRL_RESTORE_OFFSET 0x0000 -#define OMAP4430_CM_L3_1_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0000) -#define OMAP4_CM_L3_2_CLKSTCTRL_RESTORE_OFFSET 0x0004 -#define OMAP4430_CM_L3_2_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0004) -#define OMAP4_CM_L4CFG_CLKSTCTRL_RESTORE_OFFSET 0x0008 -#define OMAP4430_CM_L4CFG_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0008) -#define OMAP4_CM_MEMIF_CLKSTCTRL_RESTORE_OFFSET 0x000c -#define OMAP4430_CM_MEMIF_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x000c) -#define OMAP4_CM_L4PER_CLKSTCTRL_RESTORE_OFFSET 0x0010 -#define OMAP4430_CM_L4PER_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0010) -#define OMAP4_CM_L3INIT_CLKSTCTRL_RESTORE_OFFSET 0x0014 -#define OMAP4430_CM_L3INIT_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0014) -#define OMAP4_CM_L3INSTR_L3_3_CLKCTRL_RESTORE_OFFSET 0x0018 -#define OMAP4430_CM_L3INSTR_L3_3_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0018) -#define OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE_OFFSET 0x001c -#define OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x001c) -#define OMAP4_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE_OFFSET 0x0020 -#define OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0020) -#define OMAP4_CM_CM2_PROFILING_CLKCTRL_RESTORE_OFFSET 0x0024 -#define OMAP4430_CM_CM2_PROFILING_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0024) -#define OMAP4_CM_D2D_STATICDEP_RESTORE_OFFSET 0x0028 -#define OMAP4430_CM_D2D_STATICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0028) -#define OMAP4_CM_L3_1_DYNAMICDEP_RESTORE_OFFSET 0x002c -#define OMAP4430_CM_L3_1_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x002c) -#define OMAP4_CM_L3_2_DYNAMICDEP_RESTORE_OFFSET 0x0030 -#define OMAP4430_CM_L3_2_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0030) -#define OMAP4_CM_D2D_DYNAMICDEP_RESTORE_OFFSET 0x0034 -#define OMAP4430_CM_D2D_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0034) -#define OMAP4_CM_L4CFG_DYNAMICDEP_RESTORE_OFFSET 0x0038 -#define OMAP4430_CM_L4CFG_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0038) -#define OMAP4_CM_L4PER_DYNAMICDEP_RESTORE_OFFSET 0x003c -#define OMAP4430_CM_L4PER_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x003c) -#define OMAP4_CM_L4PER_GPIO2_CLKCTRL_RESTORE_OFFSET 0x0040 -#define OMAP4430_CM_L4PER_GPIO2_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0040) -#define OMAP4_CM_L4PER_GPIO3_CLKCTRL_RESTORE_OFFSET 0x0044 -#define OMAP4430_CM_L4PER_GPIO3_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0044) -#define OMAP4_CM_L4PER_GPIO4_CLKCTRL_RESTORE_OFFSET 0x0048 -#define OMAP4430_CM_L4PER_GPIO4_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0048) -#define OMAP4_CM_L4PER_GPIO5_CLKCTRL_RESTORE_OFFSET 0x004c -#define OMAP4430_CM_L4PER_GPIO5_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x004c) -#define OMAP4_CM_L4PER_GPIO6_CLKCTRL_RESTORE_OFFSET 0x0050 -#define OMAP4430_CM_L4PER_GPIO6_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0050) -#define OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE_OFFSET 0x0054 -#define OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0054) -#define OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE_OFFSET 0x0058 -#define OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0058) -#define OMAP4_CM_SDMA_STATICDEP_RESTORE_OFFSET 0x005c -#define OMAP4430_CM_SDMA_STATICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x005c) - /* Function prototypes */ extern u32 omap4_cm2_read_inst_reg(s16 inst, u16 idx); extern void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 idx); From a3b90ad8d1fb0ddaa6964d83886283ae3e338cea Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:15:06 -0600 Subject: [PATCH 36/56] OMAP4: prcm_mpu: Fix indent in few macros Some maros were not well aligned. Re-align them. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/prcm_mpu44xx.h | 69 +++++++++++++++--------------- 1 file changed, 34 insertions(+), 35 deletions(-) diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h index d22d1b43bccd..8a6e250f04b5 100644 --- a/arch/arm/mach-omap2/prcm_mpu44xx.h +++ b/arch/arm/mach-omap2/prcm_mpu44xx.h @@ -31,7 +31,6 @@ OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE + (inst) + (reg)) /* PRCM_MPU instances */ - #define OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST 0x0000 #define OMAP4430_PRCM_MPU_DEVICE_PRM_INST 0x0200 #define OMAP4430_PRCM_MPU_CPU0_INST 0x0400 @@ -52,46 +51,46 @@ */ /* PRCM_MPU.OCP_SOCKET_PRCM register offsets */ -#define OMAP4_REVISION_PRCM_OFFSET 0x0000 -#define OMAP4430_REVISION_PRCM OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST, 0x0000) +#define OMAP4_REVISION_PRCM_OFFSET 0x0000 +#define OMAP4430_REVISION_PRCM OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST, 0x0000) /* PRCM_MPU.DEVICE_PRM register offsets */ -#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET 0x0000 -#define OMAP4430_PRCM_MPU_PRM_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0000) -#define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET 0x0004 -#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0004) +#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET 0x0000 +#define OMAP4430_PRCM_MPU_PRM_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0000) +#define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET 0x0004 +#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0004) /* PRCM_MPU.CPU0 register offsets */ -#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET 0x0000 -#define OMAP4430_PM_CPU0_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0000) -#define OMAP4_PM_CPU0_PWRSTST_OFFSET 0x0004 -#define OMAP4430_PM_CPU0_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0004) -#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0008 -#define OMAP4430_RM_CPU0_CPU0_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0008) -#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x000c -#define OMAP4430_RM_CPU0_CPU0_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x000c) -#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET 0x0010 -#define OMAP4430_RM_CPU0_CPU0_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0010) -#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0014 -#define OMAP4430_CM_CPU0_CPU0_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0014) -#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET 0x0018 -#define OMAP4430_CM_CPU0_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0018) +#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET 0x0000 +#define OMAP4430_PM_CPU0_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0000) +#define OMAP4_PM_CPU0_PWRSTST_OFFSET 0x0004 +#define OMAP4430_PM_CPU0_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0004) +#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0008 +#define OMAP4430_RM_CPU0_CPU0_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0008) +#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x000c +#define OMAP4430_RM_CPU0_CPU0_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x000c) +#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET 0x0010 +#define OMAP4430_RM_CPU0_CPU0_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0010) +#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0014 +#define OMAP4430_CM_CPU0_CPU0_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0014) +#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET 0x0018 +#define OMAP4430_CM_CPU0_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0018) /* PRCM_MPU.CPU1 register offsets */ -#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET 0x0000 -#define OMAP4430_PM_CPU1_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0000) -#define OMAP4_PM_CPU1_PWRSTST_OFFSET 0x0004 -#define OMAP4430_PM_CPU1_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0004) -#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0008 -#define OMAP4430_RM_CPU1_CPU1_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0008) -#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x000c -#define OMAP4430_RM_CPU1_CPU1_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x000c) -#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET 0x0010 -#define OMAP4430_RM_CPU1_CPU1_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0010) -#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0014 -#define OMAP4430_CM_CPU1_CPU1_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0014) -#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018 -#define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018) +#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET 0x0000 +#define OMAP4430_PM_CPU1_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0000) +#define OMAP4_PM_CPU1_PWRSTST_OFFSET 0x0004 +#define OMAP4430_PM_CPU1_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0004) +#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0008 +#define OMAP4430_RM_CPU1_CPU1_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0008) +#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x000c +#define OMAP4430_RM_CPU1_CPU1_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x000c) +#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET 0x0010 +#define OMAP4430_RM_CPU1_CPU1_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0010) +#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0014 +#define OMAP4430_CM_CPU1_CPU1_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0014) +#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018 +#define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018) /* Function prototypes */ # ifndef __ASSEMBLER__ From 3c95b707caf3504b37b11d2662bde77e1618d481 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:15:06 -0600 Subject: [PATCH 37/56] OMAP4: clockdomain data: Fix data order and wrong name MPUSS was renamed MPU and L3_D2D D2D. The rename will slightly change the order of the structure and thus generate some structures moves. Add a comment and remove a comma. Update Copyright for TI and Nokia and add back Paul in the author list. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clockdomains44xx_data.c | 126 ++++++++++---------- 1 file changed, 64 insertions(+), 62 deletions(-) diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c index a607ec196e8b..66090f2676ce 100644 --- a/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c @@ -1,11 +1,12 @@ /* * OMAP4 Clock domains framework * - * Copyright (C) 2009 Texas Instruments, Inc. - * Copyright (C) 2009 Nokia Corporation + * Copyright (C) 2009-2011 Texas Instruments, Inc. + * Copyright (C) 2009-2011 Nokia Corporation * * Abhijit Pagare (abhijitpagare@ti.com) * Benoit Cousson (b-cousson@ti.com) + * Paul Walmsley (paul@pwsan.com) * * This file is automatically generated from the OMAP hardware databases. * We respectfully ask that any modifications to this file be coordinated @@ -32,6 +33,42 @@ /* Static Dependencies for OMAP4 Clock Domains */ +static struct clkdm_dep d2d_wkup_sleep_deps[] = { + { + .clkdm_name = "abe_clkdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) + }, + { + .clkdm_name = "ivahd_clkdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) + }, + { + .clkdm_name = "l3_1_clkdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) + }, + { + .clkdm_name = "l3_2_clkdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) + }, + { + .clkdm_name = "l3_emif_clkdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) + }, + { + .clkdm_name = "l3_init_clkdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) + }, + { + .clkdm_name = "l4_cfg_clkdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) + }, + { + .clkdm_name = "l4_per_clkdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) + }, + { NULL }, +}; + static struct clkdm_dep ducati_wkup_sleep_deps[] = { { .clkdm_name = "abe_clkdm", @@ -116,42 +153,6 @@ static struct clkdm_dep ivahd_wkup_sleep_deps[] = { { NULL }, }; -static struct clkdm_dep l3_d2d_wkup_sleep_deps[] = { - { - .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "ivahd_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_init_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { NULL }, -}; - static struct clkdm_dep l3_dma_wkup_sleep_deps[] = { { .clkdm_name = "abe_clkdm", @@ -280,7 +281,7 @@ static struct clkdm_dep l4_secure_wkup_sleep_deps[] = { { NULL }, }; -static struct clkdm_dep mpuss_wkup_sleep_deps[] = { +static struct clkdm_dep mpu_wkup_sleep_deps[] = { { .clkdm_name = "abe_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) @@ -497,14 +498,14 @@ static struct clockdomain l3_init_44xx_clkdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -static struct clockdomain mpuss_44xx_clkdm = { - .name = "mpuss_clkdm", - .pwrdm = { .name = "mpu_pwrdm" }, - .prcm_partition = OMAP4430_CM1_PARTITION, - .cm_inst = OMAP4430_CM1_MPU_INST, - .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS, - .wkdep_srcs = mpuss_wkup_sleep_deps, - .sleepdep_srcs = mpuss_wkup_sleep_deps, +static struct clockdomain d2d_44xx_clkdm = { + .name = "d2d_clkdm", + .pwrdm = { .name = "core_pwrdm" }, + .prcm_partition = OMAP4430_CM2_PARTITION, + .cm_inst = OMAP4430_CM2_CORE_INST, + .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS, + .wkdep_srcs = d2d_wkup_sleep_deps, + .sleepdep_srcs = d2d_wkup_sleep_deps, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -563,6 +564,18 @@ static struct clockdomain ducati_44xx_clkdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; +static struct clockdomain mpu_44xx_clkdm = { + .name = "mpu_clkdm", + .pwrdm = { .name = "mpu_pwrdm" }, + .prcm_partition = OMAP4430_CM1_PARTITION, + .cm_inst = OMAP4430_CM1_MPU_INST, + .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS, + .wkdep_srcs = mpu_wkup_sleep_deps, + .sleepdep_srcs = mpu_wkup_sleep_deps, + .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), +}; + static struct clockdomain l3_2_44xx_clkdm = { .name = "l3_2_clkdm", .pwrdm = { .name = "core_pwrdm" }, @@ -585,18 +598,6 @@ static struct clockdomain l3_1_44xx_clkdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -static struct clockdomain l3_d2d_44xx_clkdm = { - .name = "l3_d2d_clkdm", - .pwrdm = { .name = "core_pwrdm" }, - .prcm_partition = OMAP4430_CM2_PARTITION, - .cm_inst = OMAP4430_CM2_CORE_INST, - .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS, - .wkdep_srcs = l3_d2d_wkup_sleep_deps, - .sleepdep_srcs = l3_d2d_wkup_sleep_deps, - .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -}; - static struct clockdomain iss_44xx_clkdm = { .name = "iss_clkdm", .pwrdm = { .name = "cam_pwrdm" }, @@ -655,6 +656,7 @@ static struct clockdomain l3_dma_44xx_clkdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; +/* As clockdomains are added or removed above, this list must also be changed */ static struct clockdomain *clockdomains_omap44xx[] __initdata = { &l4_cefuse_44xx_clkdm, &l4_cfg_44xx_clkdm, @@ -666,21 +668,21 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = { &abe_44xx_clkdm, &l3_instr_44xx_clkdm, &l3_init_44xx_clkdm, - &mpuss_44xx_clkdm, + &d2d_44xx_clkdm, &mpu0_44xx_clkdm, &mpu1_44xx_clkdm, &l3_emif_44xx_clkdm, &l4_ao_44xx_clkdm, &ducati_44xx_clkdm, + &mpu_44xx_clkdm, &l3_2_44xx_clkdm, &l3_1_44xx_clkdm, - &l3_d2d_44xx_clkdm, &iss_44xx_clkdm, &l3_dss_44xx_clkdm, &l4_wkup_44xx_clkdm, &emu_sys_44xx_clkdm, &l3_dma_44xx_clkdm, - NULL, + NULL }; void __init omap44xx_clockdomains_init(void) From 8f0d69dedcf1d10f9f72845f17f9a09a6ef0d66c Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Sat, 9 Jul 2011 19:15:20 -0600 Subject: [PATCH 38/56] OMAP: omap_device: replace _find_by_pdev() with to_omap_device() The omap_device layer currently has two ways of getting an omap_device pointer from a platform_device pointer. Replace current usage of _find_by_pdev() with to_omap_device() since to_omap_device() is more familiar to the existing to_platform_device() used when getting a platform_device pointer from a struct device pointer. Cc: Felipe Balbi Signed-off-by: Kevin Hilman Reviewed-by: Felipe Balbi Signed-off-by: Paul Walmsley --- arch/arm/plat-omap/omap_device.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index 49fc0df0c21f..c8b9cd1716ba 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c @@ -236,11 +236,6 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) return 0; } -static inline struct omap_device *_find_by_pdev(struct platform_device *pdev) -{ - return container_of(pdev, struct omap_device, pdev); -} - /** * _add_optional_clock_clkdev - Add clkdev entry for hwmod optional clocks * @od: struct omap_device *od @@ -316,7 +311,7 @@ u32 omap_device_get_context_loss_count(struct platform_device *pdev) struct omap_device *od; u32 ret = 0; - od = _find_by_pdev(pdev); + od = to_omap_device(pdev); if (od->hwmods_cnt) ret = omap_hwmod_get_context_loss_count(od->hwmods[0]); @@ -611,7 +606,7 @@ int omap_device_enable(struct platform_device *pdev) int ret; struct omap_device *od; - od = _find_by_pdev(pdev); + od = to_omap_device(pdev); if (od->_state == OMAP_DEVICE_STATE_ENABLED) { WARN(1, "omap_device: %s.%d: %s() called from invalid state %d\n", @@ -650,7 +645,7 @@ int omap_device_idle(struct platform_device *pdev) int ret; struct omap_device *od; - od = _find_by_pdev(pdev); + od = to_omap_device(pdev); if (od->_state != OMAP_DEVICE_STATE_ENABLED) { WARN(1, "omap_device: %s.%d: %s() called from invalid state %d\n", @@ -681,7 +676,7 @@ int omap_device_shutdown(struct platform_device *pdev) int ret, i; struct omap_device *od; - od = _find_by_pdev(pdev); + od = to_omap_device(pdev); if (od->_state != OMAP_DEVICE_STATE_ENABLED && od->_state != OMAP_DEVICE_STATE_IDLE) { @@ -722,7 +717,7 @@ int omap_device_align_pm_lat(struct platform_device *pdev, int ret = -EINVAL; struct omap_device *od; - od = _find_by_pdev(pdev); + od = to_omap_device(pdev); if (new_wakeup_lat_limit == od->dev_wakeup_lat) return 0; From 476e5be710bec3d324d9a28cf1f4fd15bd358a86 Mon Sep 17 00:00:00 2001 From: Jean Pihet Date: Sat, 9 Jul 2011 19:15:41 -0600 Subject: [PATCH 39/56] OMAP PM: remove OMAP_PM_NONE config option The current code base is not linking with the OMAP_PM_NONE option set. Since the option OMAP_PM_NOOP provides a no-op/debug layer, OMAP_PM_NONE can be removed. OMAP_PM_NOOP is enabled by default by Kconfig. Signed-off-by: Jean Pihet Signed-off-by: Paul Walmsley --- arch/arm/plat-omap/Kconfig | 3 --- arch/arm/plat-omap/include/plat/omap-pm.h | 8 -------- 2 files changed, 11 deletions(-) diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index 49a4c75243fc..6e6735f04ee3 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -211,9 +211,6 @@ choice depends on ARCH_OMAP default OMAP_PM_NOOP -config OMAP_PM_NONE - bool "No PM layer" - config OMAP_PM_NOOP bool "No-op/debug PM layer" diff --git a/arch/arm/plat-omap/include/plat/omap-pm.h b/arch/arm/plat-omap/include/plat/omap-pm.h index c0a752053039..0840df813f4f 100644 --- a/arch/arm/plat-omap/include/plat/omap-pm.h +++ b/arch/arm/plat-omap/include/plat/omap-pm.h @@ -40,11 +40,7 @@ * framework starts. The "_if_" is to avoid name collisions with the * PM idle-loop code. */ -#ifdef CONFIG_OMAP_PM_NONE -#define omap_pm_if_early_init() 0 -#else int __init omap_pm_if_early_init(void); -#endif /** * omap_pm_if_init - OMAP PM init code called after clock fw init @@ -52,11 +48,7 @@ int __init omap_pm_if_early_init(void); * The main initialization code. OPP tables are passed in here. The * "_if_" is to avoid name collisions with the PM idle-loop code. */ -#ifdef CONFIG_OMAP_PM_NONE -#define omap_pm_if_init() 0 -#else int __init omap_pm_if_init(void); -#endif /** * omap_pm_if_exit - OMAP PM exit code From de474535763c1a5c50cb26f34ec60f10aebc53fe Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Sat, 9 Jul 2011 19:14:47 -0600 Subject: [PATCH 40/56] OMAP4: clock data: Remove McASP2, McASP3 and MMC6 clocks McASP2, 3 and MMC6 modules are not present in the OMAP4 family. Remove the fclk and the clksel related to these nodes. Rename the references that were potentially re-used in order nodes. Remove related macros in prcm header files. Update TI copyright date. Signed-off-by: Jon Hunter [b-cousson@ti.com: Update the patch according to autogen output] Signed-off-by: Benoit Cousson [paul@pwsan.com: split PRCM data changes into a separate patch] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock44xx_data.c | 86 ++++++++++------------------ 1 file changed, 31 insertions(+), 55 deletions(-) diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 8307c9ebd309..96bc668c74b3 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -1170,19 +1170,6 @@ static struct clk func_96m_fclk = { .set_rate = &omap2_clksel_set_rate, }; -static const struct clksel hsmmc6_fclk_sel[] = { - { .parent = &func_64m_fclk, .rates = div_1_0_rates }, - { .parent = &func_96m_fclk, .rates = div_1_1_rates }, - { .parent = NULL }, -}; - -static struct clk hsmmc6_fclk = { - .name = "hsmmc6_fclk", - .parent = &func_64m_fclk, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - static const struct clksel_rate div2_1to8_rates[] = { { .div = 1, .val = 0, .flags = RATE_IN_4430 }, { .div = 8, .val = 1, .flags = RATE_IN_4430 }, @@ -1265,6 +1252,21 @@ static struct clk l4_wkup_clk_mux_ck = { .recalc = &omap2_clksel_recalc, }; +static struct clk ocp_abe_iclk = { + .name = "ocp_abe_iclk", + .parent = &aess_fclk, + .ops = &clkops_null, + .recalc = &followparent_recalc, +}; + +static struct clk per_abe_24m_fclk = { + .name = "per_abe_24m_fclk", + .parent = &dpll_abe_m2_ck, + .ops = &clkops_null, + .fixed_div = 4, + .recalc = &omap_fixed_divisor_recalc, +}; + static const struct clksel per_abe_nc_fclk_div[] = { { .parent = &dpll_abe_m2_ck, .rates = div2_1to2_rates }, { .parent = NULL }, @@ -1282,41 +1284,6 @@ static struct clk per_abe_nc_fclk = { .set_rate = &omap2_clksel_set_rate, }; -static const struct clksel mcasp2_fclk_sel[] = { - { .parent = &func_96m_fclk, .rates = div_1_0_rates }, - { .parent = &per_abe_nc_fclk, .rates = div_1_1_rates }, - { .parent = NULL }, -}; - -static struct clk mcasp2_fclk = { - .name = "mcasp2_fclk", - .parent = &func_96m_fclk, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk mcasp3_fclk = { - .name = "mcasp3_fclk", - .parent = &func_96m_fclk, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk ocp_abe_iclk = { - .name = "ocp_abe_iclk", - .parent = &aess_fclk, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk per_abe_24m_fclk = { - .name = "per_abe_24m_fclk", - .parent = &dpll_abe_m2_ck, - .ops = &clkops_null, - .fixed_div = 4, - .recalc = &omap_fixed_divisor_recalc, -}; - static const struct clksel pmd_stm_clock_mux_sel[] = { { .parent = &sys_clkin_ck, .rates = div_1_0_rates }, { .parent = &dpll_core_m6x2_ck, .rates = div_1_1_rates }, @@ -1996,10 +1963,16 @@ static struct clk mcbsp3_fck = { .clkdm_name = "abe_clkdm", }; +static const struct clksel mcbsp4_sync_mux_sel[] = { + { .parent = &func_96m_fclk, .rates = div_1_0_rates }, + { .parent = &per_abe_nc_fclk, .rates = div_1_1_rates }, + { .parent = NULL }, +}; + static struct clk mcbsp4_sync_mux_ck = { .name = "mcbsp4_sync_mux_ck", .parent = &func_96m_fclk, - .clksel = mcasp2_fclk_sel, + .clksel = mcbsp4_sync_mux_sel, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, .clksel_mask = OMAP4430_CLKSEL_INTERNAL_SOURCE_MASK, @@ -2078,11 +2051,17 @@ static struct clk mcspi4_fck = { .recalc = &followparent_recalc, }; +static const struct clksel hsmmc1_fclk_sel[] = { + { .parent = &func_64m_fclk, .rates = div_1_0_rates }, + { .parent = &func_96m_fclk, .rates = div_1_1_rates }, + { .parent = NULL }, +}; + /* Merged hsmmc1_fclk into mmc1 */ static struct clk mmc1_fck = { .name = "mmc1_fck", .parent = &func_64m_fclk, - .clksel = hsmmc6_fclk_sel, + .clksel = hsmmc1_fclk_sel, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL, .clksel_mask = OMAP4430_CLKSEL_MASK, @@ -2097,7 +2076,7 @@ static struct clk mmc1_fck = { static struct clk mmc2_fck = { .name = "mmc2_fck", .parent = &func_64m_fclk, - .clksel = hsmmc6_fclk_sel, + .clksel = hsmmc1_fclk_sel, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL, .clksel_mask = OMAP4430_CLKSEL_MASK, @@ -3094,17 +3073,14 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "func_48mc_fclk", &func_48mc_fclk, CK_443X), CLK(NULL, "func_64m_fclk", &func_64m_fclk, CK_443X), CLK(NULL, "func_96m_fclk", &func_96m_fclk, CK_443X), - CLK(NULL, "hsmmc6_fclk", &hsmmc6_fclk, CK_443X), CLK(NULL, "init_60m_fclk", &init_60m_fclk, CK_443X), CLK(NULL, "l3_div_ck", &l3_div_ck, CK_443X), CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X), CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X), CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X), - CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X), - CLK(NULL, "mcasp2_fclk", &mcasp2_fclk, CK_443X), - CLK(NULL, "mcasp3_fclk", &mcasp3_fclk, CK_443X), CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X), CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X), + CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X), CLK(NULL, "pmd_stm_clock_mux_ck", &pmd_stm_clock_mux_ck, CK_443X), CLK(NULL, "pmd_trace_clk_mux_ck", &pmd_trace_clk_mux_ck, CK_443X), CLK(NULL, "syc_clk_div_ck", &syc_clk_div_ck, CK_443X), From 571078aa3485073964b611493eee480b5dc3c084 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Sat, 9 Jul 2011 19:14:47 -0600 Subject: [PATCH 41/56] OMAP4: clock data: Remove UNIPRO clock nodes UNIPRO was removed from OMAP4 devices from ES2.0 onwards. Since this IP was anyway non-functional and not supported, it is best to remove it completely. Signed-off-by: Jon Hunter [b-cousson@ti.com: Update the changelog] Signed-off-by: Benoit Cousson [paul@pwsan.com: split PRCM header file changes into a separate patch] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock44xx_data.c | 60 ---------------------------- 1 file changed, 60 deletions(-) diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 96bc668c74b3..044df38f65ce 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -935,63 +935,6 @@ static struct clk dpll_per_m7x2_ck = { .set_rate = &omap2_clksel_set_rate, }; -/* DPLL_UNIPRO */ -static struct dpll_data dpll_unipro_dd = { - .mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_UNIPRO, - .clk_bypass = &sys_clkin_ck, - .clk_ref = &sys_clkin_ck, - .control_reg = OMAP4430_CM_CLKMODE_DPLL_UNIPRO, - .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED), - .autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_UNIPRO, - .idlest_reg = OMAP4430_CM_IDLEST_DPLL_UNIPRO, - .mult_mask = OMAP4430_DPLL_MULT_MASK, - .div1_mask = OMAP4430_DPLL_DIV_MASK, - .enable_mask = OMAP4430_DPLL_EN_MASK, - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, - .max_multiplier = 2047, - .max_divider = 128, - .min_divider = 1, -}; - - -static struct clk dpll_unipro_ck = { - .name = "dpll_unipro_ck", - .parent = &sys_clkin_ck, - .dpll_data = &dpll_unipro_dd, - .init = &omap2_init_dpll_parent, - .ops = &clkops_omap3_noncore_dpll_ops, - .recalc = &omap3_dpll_recalc, - .round_rate = &omap2_dpll_round_rate, - .set_rate = &omap3_noncore_dpll_set_rate, -}; - -static struct clk dpll_unipro_x2_ck = { - .name = "dpll_unipro_x2_ck", - .parent = &dpll_unipro_ck, - .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, - .flags = CLOCK_CLKOUTX2, - .ops = &clkops_omap4_dpllmx_ops, - .recalc = &omap3_clkoutx2_recalc, -}; - -static const struct clksel dpll_unipro_m2x2_div[] = { - { .parent = &dpll_unipro_x2_ck, .rates = div31_1to31_rates }, - { .parent = NULL }, -}; - -static struct clk dpll_unipro_m2x2_ck = { - .name = "dpll_unipro_m2x2_ck", - .parent = &dpll_unipro_x2_ck, - .clksel = dpll_unipro_m2x2_div, - .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, - .clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK, - .ops = &clkops_omap4_dpllmx_ops, - .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, - .set_rate = &omap2_clksel_set_rate, -}; - static struct clk usb_hs_clk_div_ck = { .name = "usb_hs_clk_div_ck", .parent = &dpll_abe_m3x2_ck, @@ -3058,9 +3001,6 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "dpll_per_m5x2_ck", &dpll_per_m5x2_ck, CK_443X), CLK(NULL, "dpll_per_m6x2_ck", &dpll_per_m6x2_ck, CK_443X), CLK(NULL, "dpll_per_m7x2_ck", &dpll_per_m7x2_ck, CK_443X), - CLK(NULL, "dpll_unipro_ck", &dpll_unipro_ck, CK_443X), - CLK(NULL, "dpll_unipro_x2_ck", &dpll_unipro_x2_ck, CK_443X), - CLK(NULL, "dpll_unipro_m2x2_ck", &dpll_unipro_m2x2_ck, CK_443X), CLK(NULL, "usb_hs_clk_div_ck", &usb_hs_clk_div_ck, CK_443X), CLK(NULL, "dpll_usb_ck", &dpll_usb_ck, CK_443X), CLK(NULL, "dpll_usb_clkdcoldo_ck", &dpll_usb_clkdcoldo_ck, CK_443X), From 3a23aafcde66f6327bda0a6423586dfd8d694eb4 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Sat, 9 Jul 2011 20:39:44 -0600 Subject: [PATCH 42/56] OMAP4: hwmod data: Modify DSS opt clocks Add missing DSS optional clocks to HWMOD data for OMAP4xxx. Add HWMOD_CONTROL_OPT_CLKS_IN_RESET flag for dispc to fix dispc reset. Signed-off-by: Tomi Valkeinen [b-cousson@ti.com: Remove a comment and update the subject] Signed-off-by: Benoit Cousson Cc: Tomi Valkeinen [paul@pwsan.com: removed DSS "fck" role and some clkdev aliases at Tomi's request] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock44xx_data.c | 8 +++--- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 33 ++++++++++++++++++++++ 2 files changed, 37 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 044df38f65ce..7a0b112f2207 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -3032,10 +3032,10 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X), CLK(NULL, "dmic_fck", &dmic_fck, CK_443X), CLK(NULL, "dsp_fck", &dsp_fck, CK_443X), - CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X), - CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X), - CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X), - CLK("omapdss_dss", "fck", &dss_dss_clk, CK_443X), + CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X), + CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X), + CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X), + CLK(NULL, "dss_dss_clk", &dss_dss_clk, CK_443X), CLK("omapdss_dss", "ick", &dss_fck, CK_443X), CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X), CLK(NULL, "emif1_fck", &emif1_fck, CK_443X), diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index e01143725b08..a7fbe5cb81d3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -1267,9 +1267,16 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = { &omap44xx_l4_per__dss_dispc, }; +static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = { + { .role = "sys_clk", .clk = "dss_sys_clk" }, + { .role = "tv_clk", .clk = "dss_tv_clk" }, + { .role = "hdmi_clk", .clk = "dss_48mhz_clk" }, +}; + static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap44xx_dispc_hwmod_class, + .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_dss_dispc_irqs, .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, .main_clk = "dss_fck", @@ -1278,6 +1285,8 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, }, }, + .opt_clks = dss_dispc_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks), .slaves = omap44xx_dss_dispc_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -1358,6 +1367,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dsi1_slaves[] = { &omap44xx_l4_per__dss_dsi1, }; +static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = { + { .role = "sys_clk", .clk = "dss_sys_clk" }, +}; + static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .name = "dss_dsi1", .class = &omap44xx_dsi_hwmod_class, @@ -1369,6 +1382,8 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, }, }, + .opt_clks = dss_dsi1_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks), .slaves = omap44xx_dss_dsi1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -1428,6 +1443,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dsi2_slaves[] = { &omap44xx_l4_per__dss_dsi2, }; +static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = { + { .role = "sys_clk", .clk = "dss_sys_clk" }, +}; + static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .name = "dss_dsi2", .class = &omap44xx_dsi_hwmod_class, @@ -1439,6 +1458,8 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, }, }, + .opt_clks = dss_dsi2_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_dsi2_opt_clks), .slaves = omap44xx_dss_dsi2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -1518,6 +1539,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_hdmi_slaves[] = { &omap44xx_l4_per__dss_hdmi, }; +static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = { + { .role = "sys_clk", .clk = "dss_sys_clk" }, +}; + static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .name = "dss_hdmi", .class = &omap44xx_hdmi_hwmod_class, @@ -1529,6 +1554,8 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, }, }, + .opt_clks = dss_hdmi_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks), .slaves = omap44xx_dss_hdmi_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -1603,6 +1630,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_rfbi_slaves[] = { &omap44xx_l4_per__dss_rfbi, }; +static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { + { .role = "ick", .clk = "dss_fck" }, +}; + static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { .name = "dss_rfbi", .class = &omap44xx_rfbi_hwmod_class, @@ -1613,6 +1644,8 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, }, }, + .opt_clks = dss_rfbi_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), .slaves = omap44xx_dss_rfbi_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), From 6349b96b439515e1100cd98f27ff55a262f558a3 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Sat, 9 Jul 2011 20:42:11 -0600 Subject: [PATCH 43/56] OMAP2+: PM: Initialise sleep_switch to a non-valid value sleep_switch which is initialised to 0 in omap_set_pwrdm_state happens to be a valid sleep_switch type (FORCEWAKEUP_SWITCH) which are defined as: #define FORCEWAKEUP_SWITCH 0 #define LOWPOWERSTATE_SWITCH 1 This causes the function to wrongly program some clock domains even when the Powerdomain is in ON state. Signed-off-by: Rajendra Nayak Cc: Paul Walmsley Acked-by: Kevin Hilman Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 49486f522dca..d48813fd62de 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -106,7 +106,7 @@ static void omap2_init_processor_devices(void) int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) { u32 cur_state; - int sleep_switch = 0; + int sleep_switch = -1; int ret = 0; if (pwrdm == NULL || IS_ERR(pwrdm)) From 9a2a3603cf1c57ed21adb045a771405ab27335c1 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 20:42:11 -0600 Subject: [PATCH 44/56] OMAP4: powerdomain data: Fix core mem states and missing cefuse flag Since ES2.0, the core ocmram does not support a different state than the main power domain anymore during both ON and RET power domain state. Since PM is not supported at all in ES1.0, update the common structure. LOWPOWERSTATECHANGE is supported by the cefuse power domain but the flag was missing. Add the PWRDM_HAS_LOWPOWERSTATECHANGE in flags field. Update the TI copyright date to 2011. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Cc: Santosh Shilimkar [paul@pwsan.com: moved the indentation changes to a different patch set] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/powerdomains44xx_data.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c index c4222c7036a5..631e45258de1 100644 --- a/arch/arm/mach-omap2/powerdomains44xx_data.c +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c @@ -1,7 +1,7 @@ /* * OMAP4 Power domains framework * - * Copyright (C) 2009-2010 Texas Instruments, Inc. + * Copyright (C) 2009-2011 Texas Instruments, Inc. * Copyright (C) 2009-2011 Nokia Corporation * * Abhijit Pagare (abhijitpagare@ti.com) @@ -41,14 +41,14 @@ static struct powerdomain core_44xx_pwrdm = { .banks = 5, .pwrsts_mem_ret = { [0] = PWRSTS_OFF, /* core_nret_bank */ - [1] = PWRSTS_OFF_RET, /* core_ocmram */ + [1] = PWRSTS_RET, /* core_ocmram */ [2] = PWRSTS_RET, /* core_other_bank */ [3] = PWRSTS_OFF_RET, /* ducati_l2ram */ [4] = PWRSTS_OFF_RET, /* ducati_unicache */ }, .pwrsts_mem_on = { [0] = PWRSTS_ON, /* core_nret_bank */ - [1] = PWRSTS_OFF_RET, /* core_ocmram */ + [1] = PWRSTS_ON, /* core_ocmram */ [2] = PWRSTS_ON, /* core_other_bank */ [3] = PWRSTS_ON, /* ducati_l2ram */ [4] = PWRSTS_ON, /* ducati_unicache */ @@ -318,6 +318,7 @@ static struct powerdomain cefuse_44xx_pwrdm = { .prcm_partition = OMAP4430_PRM_PARTITION, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_OFF_ON, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* From 93cac2ad0f9459422d0af79b6937d6e83ed3aec9 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Sat, 9 Jul 2011 20:42:59 -0600 Subject: [PATCH 45/56] OMAP4: clock data: Keep GPMC clocks always enabled and hardware managed On OMAP4, CPU accesses on unmapped addresses are redirected to GPMC by L3 interconnect. Because of CPU speculative nature, such accesses are possible which can lead to indirect access to GPMC and if it's clock is not running, it can result in hang/abort on the platform. Above makes access to GPMC unpredictable during the execution, so it's module mode needs to be kept under hardware control instead of software control. Since the auto gating is supported for GPMC, there isn't any power impact because of this change. The issue was un-covered with security middleware running along with HLOS. In this case GPMC had a valid MMU descriptor on secure side where as HLOS didn't map the GMPC because it isn't being used. Signed-off-by: Santosh Shilimkar [b-cousson@ti.com: Update subject and fix typos in the changelog] Signed-off-by: Benoit Cousson Cc: Kevin Hilman Cc: Rajendra Nayak Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock44xx_data.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 8c965671b4d4..72a3976d6c43 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -1694,6 +1694,7 @@ static struct clk gpmc_ick = { .ops = &clkops_omap2_dflt, .enable_reg = OMAP4430_CM_L3_2_GPMC_CLKCTRL, .enable_bit = OMAP4430_MODULEMODE_HWCTRL, + .flags = ENABLE_ON_INIT, .clkdm_name = "l3_2_clkdm", .parent = &l3_div_ck, .recalc = &followparent_recalc, From a57341f780660800e1463eaedb80ed152ad6b5de Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Sat, 9 Jul 2011 20:42:59 -0600 Subject: [PATCH 46/56] OMAP4: powerdomain data: Remove unsupported MPU powerdomain state On OMAP4430 devices, because of boot ROM code bug, MPU OFF state can't be attempted independently. When coming out of MPU OFF state, ROM code disables the clocks of IVAHD, TESLA which is not desirable. Hence the MPU OFF state is not usable on OMAP4430 devices. OMAP4460 onwards, MPU OFF state will be descoped completely because the DDR firewall falls in MPU power domain. When the MPU hit OFF state, DDR won't be accessible for other initiators. The deepest state supported is open switch retention (OSWR) just like CORE and PER PD on OMAP4430. So in summary MPU power domain OFF state is not supported on OMAP4 and onwards designs. Thanks to new PRCM design, device off mode can still be achieved with power domains hitting OSWR state. Signed-off-by: Santosh Shilimkar Signed-off-by: Rajendra Nayak [b-cousson@ti.com: Fix changelog typos] Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/powerdomains44xx_data.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c index c4222c7036a5..8f86e60399ac 100644 --- a/arch/arm/mach-omap2/powerdomains44xx_data.c +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c @@ -205,7 +205,7 @@ static struct powerdomain mpu_44xx_pwrdm = { .prcm_offs = OMAP4430_PRM_MPU_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts = PWRSTS_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 3, .pwrsts_mem_ret = { From da7cdfac1b0c58d6863532dd3b432c3fbc034978 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Sat, 9 Jul 2011 20:39:45 -0600 Subject: [PATCH 47/56] OMAP4: hwmod data: Change DSS main_clk scheme Currently using pm_runtime with DSS requires the DSS driver to enable the DSS functional clock before calling pm_runtime_get(). That makes it impossible to use pm_runtime in DSS as it is meant to be used, with pm_runtime callbacks. This patch changes the hwmod database for OMAP4 so that enabling the hwmod via pm_runtime will also enable the DSS functional clock, allowing us to use pm_runtime properly in DSS driver. The DSS HWMOD side is not really correct, not before nor after this patch, and getting DSS to retention will probably not work currently. However, it is not supported in the mainline kernel anyway, so this won't break anything. So this patch allows us to write the pm_runtime adaptation for the DSS driver the way it should be done, and the HWMOD/PM side can be fixed later. Signed-off-by: Tomi Valkeinen Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 28 +++++++++++----------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index a7fbe5cb81d3..b25ab836fbf0 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -1136,7 +1136,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = { static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = { .master = &omap44xx_l3_main_2_hwmod, .slave = &omap44xx_dss_hwmod, - .clk = "l3_div_ck", + .clk = "dss_fck", .addr = omap44xx_dss_dma_addrs, .user = OCP_USER_SDMA, }; @@ -1175,7 +1175,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { static struct omap_hwmod omap44xx_dss_hwmod = { .name = "dss_core", .class = &omap44xx_dss_hwmod_class, - .main_clk = "dss_fck", + .main_clk = "dss_dss_clk", .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, @@ -1238,7 +1238,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = { .master = &omap44xx_l3_main_2_hwmod, .slave = &omap44xx_dss_dispc_hwmod, - .clk = "l3_div_ck", + .clk = "dss_fck", .addr = omap44xx_dss_dispc_dma_addrs, .user = OCP_USER_SDMA, }; @@ -1279,7 +1279,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_dss_dispc_irqs, .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, - .main_clk = "dss_fck", + .main_clk = "dss_dss_clk", .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, @@ -1338,7 +1338,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = { .master = &omap44xx_l3_main_2_hwmod, .slave = &omap44xx_dss_dsi1_hwmod, - .clk = "l3_div_ck", + .clk = "dss_fck", .addr = omap44xx_dss_dsi1_dma_addrs, .user = OCP_USER_SDMA, }; @@ -1376,7 +1376,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .class = &omap44xx_dsi_hwmod_class, .mpu_irqs = omap44xx_dss_dsi1_irqs, .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, - .main_clk = "dss_fck", + .main_clk = "dss_dss_clk", .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, @@ -1414,7 +1414,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = { .master = &omap44xx_l3_main_2_hwmod, .slave = &omap44xx_dss_dsi2_hwmod, - .clk = "l3_div_ck", + .clk = "dss_fck", .addr = omap44xx_dss_dsi2_dma_addrs, .user = OCP_USER_SDMA, }; @@ -1452,7 +1452,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .class = &omap44xx_dsi_hwmod_class, .mpu_irqs = omap44xx_dss_dsi2_irqs, .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, - .main_clk = "dss_fck", + .main_clk = "dss_dss_clk", .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, @@ -1510,7 +1510,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = { .master = &omap44xx_l3_main_2_hwmod, .slave = &omap44xx_dss_hdmi_hwmod, - .clk = "l3_div_ck", + .clk = "dss_fck", .addr = omap44xx_dss_hdmi_dma_addrs, .user = OCP_USER_SDMA, }; @@ -1548,7 +1548,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .class = &omap44xx_hdmi_hwmod_class, .mpu_irqs = omap44xx_dss_hdmi_irqs, .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, - .main_clk = "dss_fck", + .main_clk = "dss_dss_clk", .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, @@ -1601,7 +1601,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = { .master = &omap44xx_l3_main_2_hwmod, .slave = &omap44xx_dss_rfbi_hwmod, - .clk = "l3_div_ck", + .clk = "dss_fck", .addr = omap44xx_dss_rfbi_dma_addrs, .user = OCP_USER_SDMA, }; @@ -1638,7 +1638,7 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { .name = "dss_rfbi", .class = &omap44xx_rfbi_hwmod_class, .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, - .main_clk = "dss_fck", + .main_clk = "dss_dss_clk", .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, @@ -1675,7 +1675,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = { static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = { .master = &omap44xx_l3_main_2_hwmod, .slave = &omap44xx_dss_venc_hwmod, - .clk = "l3_div_ck", + .clk = "dss_fck", .addr = omap44xx_dss_venc_dma_addrs, .user = OCP_USER_SDMA, }; @@ -1707,7 +1707,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = { static struct omap_hwmod omap44xx_dss_venc_hwmod = { .name = "dss_venc", .class = &omap44xx_venc_hwmod_class, - .main_clk = "dss_fck", + .main_clk = "dss_dss_clk", .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, From 3e6005221138bcfc08f1a35b6f9e43b53330e851 Mon Sep 17 00:00:00 2001 From: Andy Green Date: Sun, 10 Jul 2011 05:27:14 -0600 Subject: [PATCH 48/56] I2C: OMAP2+: Set hwmod flags to only allow 16-bit accesses to i2c Peter Maydell noticed when running under QEMU he was getting errors reporting 32-bit access to I2C peripheral unit registers that are documented to be 8 or 16-bit only[1][2] The I2C driver is blameless as it wraps its accesses in a function using __raw_writew and __raw_readw, it turned out it is the hwmod stuff. However the hwmod code already has a flag to force a perhipheral unit to only be accessed using 16-bit operations. This patch applies the 16-bit only flag to the 2430, OMAP3xxx and OMAP44xx hwmod structs. 2420 was already correctly marked up as 16-bit. The 2430 change will need testing by TI as arranged in the comments to the previous patch version. When the 16-bit flag is or-ed with other flags, it is placed first as requested in comments. [1] OMAP4430 Technical reference manual section 23.1.6.2 [2] OMAP3530 Techincal reference manual section 18.6 Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Signed-off-by: Kevin Hilman Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 ++ arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 3 +++ arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 8 ++++---- 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 2a52f025bd06..19ddf082144d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -1092,6 +1092,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { static struct omap_hwmod omap2430_i2c1_hwmod = { .name = "i2c1", + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = omap2_i2c1_sdma_reqs, .main_clk = "i2chs1_fck", @@ -1127,6 +1128,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { static struct omap_hwmod omap2430_i2c2_hwmod = { .name = "i2c2", + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = omap2_i2c2_sdma_reqs, .main_clk = "i2chs2_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 1a52716e48bf..542a11b19a99 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1615,6 +1615,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { static struct omap_hwmod omap3xxx_i2c1_hwmod = { .name = "i2c1", + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = omap2_i2c1_sdma_reqs, .main_clk = "i2c1_fck", @@ -1646,6 +1647,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { static struct omap_hwmod omap3xxx_i2c2_hwmod = { .name = "i2c2", + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = omap2_i2c2_sdma_reqs, .main_clk = "i2c2_fck", @@ -1688,6 +1690,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = { static struct omap_hwmod omap3xxx_i2c3_hwmod = { .name = "i2c3", + .flags = HWMOD_16BIT_REG, .mpu_irqs = i2c3_mpu_irqs, .sdma_reqs = i2c3_sdma_reqs, .main_clk = "i2c3_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index b25ab836fbf0..2ebccb8820c5 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -2201,7 +2201,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = { static struct omap_hwmod omap44xx_i2c1_hwmod = { .name = "i2c1", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c1_irqs, .sdma_reqs = omap44xx_i2c1_sdma_reqs, .main_clk = "i2c1_fck", @@ -2254,7 +2254,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = { static struct omap_hwmod omap44xx_i2c2_hwmod = { .name = "i2c2", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c2_irqs, .sdma_reqs = omap44xx_i2c2_sdma_reqs, .main_clk = "i2c2_fck", @@ -2307,7 +2307,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = { static struct omap_hwmod omap44xx_i2c3_hwmod = { .name = "i2c3", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c3_irqs, .sdma_reqs = omap44xx_i2c3_sdma_reqs, .main_clk = "i2c3_fck", @@ -2360,7 +2360,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = { static struct omap_hwmod omap44xx_i2c4_hwmod = { .name = "i2c4", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c4_irqs, .sdma_reqs = omap44xx_i2c4_sdma_reqs, .main_clk = "i2c4_fck", From 730027216079ef4ab9850a4367ef665554a6ef73 Mon Sep 17 00:00:00 2001 From: Andy Green Date: Sun, 10 Jul 2011 05:27:14 -0600 Subject: [PATCH 49/56] I2C: OMAP2+: increase omap_i2c_dev_attr flags from u8 to u32 As part of removing cpu_...() from the OMAP I2C driver, we need to convert the CPU tests into functionality flags that are set by hwmod class in the same way the IP revision is. More flags are needed than will fit in the existing u8 flags member of omap_i2c_dev_attr. These flags can refer to options inside the IP block but they are most needed for information about cpu implementation specific options that are not part of the IP block itself. For example, how the CPU data bus is wired to the IP block databus differs between OMAP cpus and affects how you must shift the address in the IP block, but is not a feature of the IP block itself. Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Signed-off-by: Kevin Hilman Signed-off-by: Paul Walmsley --- arch/arm/plat-omap/include/plat/i2c.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h index 878d632c4092..4c108f54c556 100644 --- a/arch/arm/plat-omap/include/plat/i2c.h +++ b/arch/arm/plat-omap/include/plat/i2c.h @@ -46,7 +46,7 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate, */ struct omap_i2c_dev_attr { u8 fifo_depth; - u8 flags; + u32 flags; }; void __init omap1_i2c_mux_pins(int bus_id); From d72fe7883f9f835011cb581aea13e91c6fa2e31d Mon Sep 17 00:00:00 2001 From: Andy Green Date: Sun, 10 Jul 2011 05:27:14 -0600 Subject: [PATCH 50/56] I2C: OMAP2+: Introduce I2C IP versioning constants These represent the two kinds of (incompatible) OMAP I2C peripheral unit in use so far. The constants are in linux/i2c-omap.h so the omap i2c driver can have them too. Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Signed-off-by: Kevin Hilman Signed-off-by: Paul Walmsley --- arch/arm/plat-omap/include/plat/i2c.h | 1 + include/linux/i2c-omap.h | 12 ++++++++++++ 2 files changed, 13 insertions(+) diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h index 4c108f54c556..fd75dadfa89c 100644 --- a/arch/arm/plat-omap/include/plat/i2c.h +++ b/arch/arm/plat-omap/include/plat/i2c.h @@ -22,6 +22,7 @@ #define __ASM__ARCH_OMAP_I2C_H #include +#include #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) extern int omap_register_i2c_bus(int bus_id, u32 clkrate, diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h index 7472449cbb74..701886da76c7 100644 --- a/include/linux/i2c-omap.h +++ b/include/linux/i2c-omap.h @@ -3,6 +3,18 @@ #include +/* + * Version 2 of the I2C peripheral unit has a different register + * layout and extra registers. The ID register in the V2 peripheral + * unit on the OMAP4430 reports the same ID as the V1 peripheral + * unit on the OMAP3530, so we must inform the driver which IP + * version we know it is running on from platform / cpu-specific + * code using these constants in the hwmod class definition. + */ + +#define OMAP_I2C_IP_VERSION_1 1 +#define OMAP_I2C_IP_VERSION_2 2 + struct omap_i2c_bus_platform_data { u32 clkrate; void (*set_mpu_wkup_lat)(struct device *dev, long set); From 5a9aaf0cf89dfb776f45b7ef878fd1508faadbf7 Mon Sep 17 00:00:00 2001 From: Andy Green Date: Sun, 10 Jul 2011 05:27:15 -0600 Subject: [PATCH 51/56] I2C: OMAP1/OMAP2+: create omap I2C functionality flags for each cpu_... test These represent the 8 kinds of implementation functionality that up until now were inferred by the 16 remaining cpu_...() tests in the omap i2c driver. Changed to use BIT() as suggested by Balaji T Krishnamoorthy. Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Signed-off-by: Kevin Hilman Signed-off-by: Paul Walmsley --- include/linux/i2c-omap.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h index 701886da76c7..0aa0cbd676f7 100644 --- a/include/linux/i2c-omap.h +++ b/include/linux/i2c-omap.h @@ -15,6 +15,21 @@ #define OMAP_I2C_IP_VERSION_1 1 #define OMAP_I2C_IP_VERSION_2 2 +/* struct omap_i2c_bus_platform_data .flags meanings */ + +#define OMAP_I2C_FLAG_NO_FIFO BIT(0) +#define OMAP_I2C_FLAG_SIMPLE_CLOCK BIT(1) +#define OMAP_I2C_FLAG_16BIT_DATA_REG BIT(2) +#define OMAP_I2C_FLAG_RESET_REGS_POSTIDLE BIT(3) +#define OMAP_I2C_FLAG_APPLY_ERRATA_I207 BIT(4) +#define OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK BIT(5) +#define OMAP_I2C_FLAG_FORCE_19200_INT_CLK BIT(6) +/* how the CPU address bus must be translated for I2C unit access */ +#define OMAP_I2C_FLAG_BUS_SHIFT_NONE 0 +#define OMAP_I2C_FLAG_BUS_SHIFT_1 BIT(7) +#define OMAP_I2C_FLAG_BUS_SHIFT_2 BIT(8) +#define OMAP_I2C_FLAG_BUS_SHIFT__SHIFT 7 + struct omap_i2c_bus_platform_data { u32 clkrate; void (*set_mpu_wkup_lat)(struct device *dev, long set); From db791a75299bb6212ec984bdbe4ab581dbc07902 Mon Sep 17 00:00:00 2001 From: Andy Green Date: Sun, 10 Jul 2011 05:27:15 -0600 Subject: [PATCH 52/56] I2C: OMAP2+: Tag all OMAP2+ hwmod defintions with I2C IP revision Since we cannot trust (or even reliably find) the OMAP I2C peripheral unit's own revision register, we must inform the OMAP i2c driver of which IP version it is running on. We do this by tagging the omap_hwmod_class for i2c on all the OMAP2+ platform / cpu specific hwmod init and passing it up to the driver (next patches). Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Signed-off-by: Kevin Hilman Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 1 + arch/arm/mach-omap2/omap_hwmod_2430_data.c | 1 + arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 1 + arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 1 + 4 files changed, 4 insertions(+) diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index f3901abf2c28..95f547cf35d8 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -1029,6 +1029,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = { static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &i2c_sysc, + .rev = OMAP_I2C_IP_VERSION_1, }; static struct omap_i2c_dev_attr i2c_dev_attr; diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 19ddf082144d..d7ed51b016e7 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -1078,6 +1078,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = { static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &i2c_sysc, + .rev = OMAP_I2C_IP_VERSION_1, }; static struct omap_i2c_dev_attr i2c_dev_attr = { diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 542a11b19a99..58ec1e220cb9 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1308,6 +1308,7 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &i2c_sysc, + .rev = OMAP_I2C_IP_VERSION_1, }; static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 2ebccb8820c5..1bed3b81d981 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -2160,6 +2160,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = { static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { .name = "i2c", .sysc = &omap44xx_i2c_sysc, + .rev = OMAP_I2C_IP_VERSION_2, }; /* i2c1 */ From 4d4441a6221ca3a30290045b7b696e5134646449 Mon Sep 17 00:00:00 2001 From: Andy Green Date: Sun, 10 Jul 2011 05:27:16 -0600 Subject: [PATCH 53/56] I2C: OMAP2+: add correct functionality flags to all omap2plus i2c dev_attr This adds the new functionality flags for omap i2c unit to all OMAP2 hwmod definitions Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Signed-off-by: Kevin Hilman Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 7 ++++++- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 3 +++ arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 9 +++++++++ arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 9 +++++++++ 4 files changed, 27 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 95f547cf35d8..7af251448a7e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -1032,7 +1032,12 @@ static struct omap_hwmod_class i2c_class = { .rev = OMAP_I2C_IP_VERSION_1, }; -static struct omap_i2c_dev_attr i2c_dev_attr; +static struct omap_i2c_dev_attr i2c_dev_attr = { + .flags = OMAP_I2C_FLAG_NO_FIFO | + OMAP_I2C_FLAG_SIMPLE_CLOCK | + OMAP_I2C_FLAG_16BIT_DATA_REG | + OMAP_I2C_FLAG_BUS_SHIFT_2, +}; /* I2C1 */ diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index d7ed51b016e7..405688ae265b 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -1083,6 +1083,9 @@ static struct omap_hwmod_class i2c_class = { static struct omap_i2c_dev_attr i2c_dev_attr = { .fifo_depth = 8, /* bytes */ + .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | + OMAP_I2C_FLAG_BUS_SHIFT_2 | + OMAP_I2C_FLAG_FORCE_19200_INT_CLK, }; /* I2C1 */ diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 58ec1e220cb9..c704ac8ca6bb 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1608,6 +1608,9 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = { static struct omap_i2c_dev_attr i2c1_dev_attr = { .fifo_depth = 8, /* bytes */ + .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | + OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | + OMAP_I2C_FLAG_BUS_SHIFT_2, }; static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { @@ -1640,6 +1643,9 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = { static struct omap_i2c_dev_attr i2c2_dev_attr = { .fifo_depth = 8, /* bytes */ + .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | + OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | + OMAP_I2C_FLAG_BUS_SHIFT_2, }; static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { @@ -1672,6 +1678,9 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = { static struct omap_i2c_dev_attr i2c3_dev_attr = { .fifo_depth = 64, /* bytes */ + .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | + OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | + OMAP_I2C_FLAG_BUS_SHIFT_2, }; static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 1bed3b81d981..55331df4e452 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -27,6 +27,7 @@ #include #include #include +#include #include "omap_hwmod_common_data.h" @@ -2163,6 +2164,10 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { .rev = OMAP_I2C_IP_VERSION_2, }; +static struct omap_i2c_dev_attr i2c_dev_attr = { + .flags = OMAP_I2C_FLAG_BUS_SHIFT_NONE, +}; + /* i2c1 */ static struct omap_hwmod omap44xx_i2c1_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { @@ -2213,6 +2218,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { }, .slaves = omap44xx_i2c1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_i2c1_slaves), + .dev_attr = &i2c_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -2266,6 +2272,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { }, .slaves = omap44xx_i2c2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_i2c2_slaves), + .dev_attr = &i2c_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -2319,6 +2326,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { }, .slaves = omap44xx_i2c3_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_i2c3_slaves), + .dev_attr = &i2c_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -2372,6 +2380,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { }, .slaves = omap44xx_i2c4_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_i2c4_slaves), + .dev_attr = &i2c_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; From 6d3c55fd4f0f94a9455d30df9414ddb0f755f402 Mon Sep 17 00:00:00 2001 From: "Avinash.H.M" Date: Sun, 10 Jul 2011 05:27:16 -0600 Subject: [PATCH 54/56] OMAP: hwmod: fix the i2c-reset timeout during bootup The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a special sequence to reset the module. The sequence is - Disable the I2C. - Write to SOFTRESET bit. - Enable the I2C. - Poll on the RESETDONE bit. The sequence is implemented as a function and the i2c_class is updated with the correct 'reset' pointer. omap_hwmod_softreset function is implemented which triggers the softreset by writing into sysconfig register. On following this sequence, i2c module resets properly and timeouts are not seen. Cc: Rajendra Nayak Cc: Paul Walmsley Cc: Benoit Cousson Cc: Kevin Hilman Signed-off-by: Avinash.H.M [paul@pwsan.com: combined this patch with a patch to remove HWMOD_INIT_NO_RESET from the 44xx hwmod flags; change register offset conditional code to use the IP block revision; minor code cleanup] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/i2c.c | 68 ++++++++++++++++++++ arch/arm/mach-omap2/omap_hwmod.c | 27 ++++++++ arch/arm/mach-omap2/omap_hwmod_2420_data.c | 1 + arch/arm/mach-omap2/omap_hwmod_2430_data.c | 1 + arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 7 +- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 10 +-- arch/arm/plat-omap/include/plat/i2c.h | 3 + arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + 8 files changed, 111 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c index 79c478c4cb1c..ace99944e96f 100644 --- a/arch/arm/mach-omap2/i2c.c +++ b/arch/arm/mach-omap2/i2c.c @@ -21,9 +21,19 @@ #include #include +#include +#include #include "mux.h" +/* In register I2C_CON, Bit 15 is the I2C enable bit */ +#define I2C_EN BIT(15) +#define OMAP2_I2C_CON_OFFSET 0x24 +#define OMAP4_I2C_CON_OFFSET 0xA4 + +/* Maximum microseconds to wait for OMAP module to softreset */ +#define MAX_MODULE_SOFTRESET_WAIT 10000 + void __init omap2_i2c_mux_pins(int bus_id) { char mux_name[sizeof("i2c2_scl.i2c2_scl")]; @@ -37,3 +47,61 @@ void __init omap2_i2c_mux_pins(int bus_id) sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id); omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); } + +/** + * omap_i2c_reset - reset the omap i2c module. + * @oh: struct omap_hwmod * + * + * The i2c moudle in omap2, omap3 had a special sequence to reset. The + * sequence is: + * - Disable the I2C. + * - Write to SOFTRESET bit. + * - Enable the I2C. + * - Poll on the RESETDONE bit. + * The sequence is implemented in below function. This is called for 2420, + * 2430 and omap3. + */ +int omap_i2c_reset(struct omap_hwmod *oh) +{ + u32 v; + u16 i2c_con; + int c = 0; + + if (oh->class->rev == OMAP_I2C_IP_VERSION_2) { + i2c_con = OMAP4_I2C_CON_OFFSET; + } else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) { + i2c_con = OMAP2_I2C_CON_OFFSET; + } else { + WARN(1, "Cannot reset I2C block %s: unsupported revision\n", + oh->name); + return -EINVAL; + } + + /* Disable I2C */ + v = omap_hwmod_read(oh, i2c_con); + v &= ~I2C_EN; + omap_hwmod_write(v, oh, i2c_con); + + /* Write to the SOFTRESET bit */ + omap_hwmod_softreset(oh); + + /* Enable I2C */ + v = omap_hwmod_read(oh, i2c_con); + v |= I2C_EN; + omap_hwmod_write(v, oh, i2c_con); + + /* Poll on RESETDONE bit */ + omap_test_timeout((omap_hwmod_read(oh, + oh->class->sysc->syss_offs) + & SYSS_RESETDONE_MASK), + MAX_MODULE_SOFTRESET_WAIT, c); + + if (c == MAX_MODULE_SOFTRESET_WAIT) + pr_warning("%s: %s: softreset failed (waited %d usec)\n", + __func__, oh->name, MAX_MODULE_SOFTRESET_WAIT); + else + pr_debug("%s: %s: softreset in %d usec\n", __func__, + oh->name, c); + + return 0; +} diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 7d242c9e2a2c..02b6016393a8 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1655,6 +1655,33 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) __raw_writel(v, oh->_mpu_rt_va + reg_offs); } +/** + * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit + * @oh: struct omap_hwmod * + * + * This is a public function exposed to drivers. Some drivers may need to do + * some settings before and after resetting the device. Those drivers after + * doing the necessary settings could use this function to start a reset by + * setting the SYSCONFIG.SOFTRESET bit. + */ +int omap_hwmod_softreset(struct omap_hwmod *oh) +{ + u32 v; + int ret; + + if (!oh || !(oh->_sysc_cache)) + return -EINVAL; + + v = oh->_sysc_cache; + ret = _set_softreset(oh, &v); + if (ret) + goto error; + _write_sysconfig(v, oh); + +error: + return ret; +} + /** * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode * @oh: struct omap_hwmod * diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 7af251448a7e..a015c69068f6 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -1030,6 +1030,7 @@ static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &i2c_sysc, .rev = OMAP_I2C_IP_VERSION_1, + .reset = &omap_i2c_reset, }; static struct omap_i2c_dev_attr i2c_dev_attr = { diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 405688ae265b..16743c7d6e8e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -1079,6 +1079,7 @@ static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &i2c_sysc, .rev = OMAP_I2C_IP_VERSION_1, + .reset = &omap_i2c_reset, }; static struct omap_i2c_dev_attr i2c_dev_attr = { diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index c704ac8ca6bb..25bf43b5a4ec 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1306,9 +1306,10 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { }; static struct omap_hwmod_class i2c_class = { - .name = "i2c", - .sysc = &i2c_sysc, - .rev = OMAP_I2C_IP_VERSION_1, + .name = "i2c", + .sysc = &i2c_sysc, + .rev = OMAP_I2C_IP_VERSION_1, + .reset = &omap_i2c_reset, }; static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 55331df4e452..5d5df49749df 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -22,6 +22,7 @@ #include #include +#include #include #include #include @@ -2162,6 +2163,7 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { .name = "i2c", .sysc = &omap44xx_i2c_sysc, .rev = OMAP_I2C_IP_VERSION_2, + .reset = &omap_i2c_reset, }; static struct omap_i2c_dev_attr i2c_dev_attr = { @@ -2207,7 +2209,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = { static struct omap_hwmod omap44xx_i2c1_hwmod = { .name = "i2c1", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap44xx_i2c1_irqs, .sdma_reqs = omap44xx_i2c1_sdma_reqs, .main_clk = "i2c1_fck", @@ -2261,7 +2263,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = { static struct omap_hwmod omap44xx_i2c2_hwmod = { .name = "i2c2", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap44xx_i2c2_irqs, .sdma_reqs = omap44xx_i2c2_sdma_reqs, .main_clk = "i2c2_fck", @@ -2315,7 +2317,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = { static struct omap_hwmod omap44xx_i2c3_hwmod = { .name = "i2c3", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap44xx_i2c3_irqs, .sdma_reqs = omap44xx_i2c3_sdma_reqs, .main_clk = "i2c3_fck", @@ -2369,7 +2371,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = { static struct omap_hwmod omap44xx_i2c4_hwmod = { .name = "i2c4", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap44xx_i2c4_irqs, .sdma_reqs = omap44xx_i2c4_sdma_reqs, .main_clk = "i2c4_fck", diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h index fd75dadfa89c..7c22b9e10dc3 100644 --- a/arch/arm/plat-omap/include/plat/i2c.h +++ b/arch/arm/plat-omap/include/plat/i2c.h @@ -53,4 +53,7 @@ struct omap_i2c_dev_attr { void __init omap1_i2c_mux_pins(int bus_id); void __init omap2_i2c_mux_pins(int bus_id); +struct omap_hwmod; +int omap_i2c_reset(struct omap_hwmod *oh); + #endif /* __ASM__ARCH_OMAP_I2C_H */ diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index ce06ac6a9709..fafdfe3c8d4e 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -566,6 +566,7 @@ void omap_hwmod_ocp_barrier(struct omap_hwmod *oh); void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs); u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs); +int omap_hwmod_softreset(struct omap_hwmod *oh); int omap_hwmod_count_resources(struct omap_hwmod *oh); int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res); From 354a183f536a8edf6cb80ee3e3f393736e278810 Mon Sep 17 00:00:00 2001 From: Russell King - ARM Linux Date: Sun, 10 Jul 2011 23:05:34 -0700 Subject: [PATCH 55/56] Convert OMAPs 32kHz clocksource implementation to use the generic MMIO clocksource support. This achieves several things: 1. It means we get rid of all these helper functions which frankly should never have been necessary. 2. It means omap_readl() inside these helper functions does not appear in ftrace output. Another plus is that we avoid the overhead of calculating the address to read each time, but a minus is that we use readl() which has a barrier. Signed-off-by: Russell King [tony@atomide.com: updated to use ioremap] Signed-off-by: Tony Lindgren --- arch/arm/Kconfig | 1 + arch/arm/plat-omap/counter_32k.c | 121 +++++++++---------------------- 2 files changed, 35 insertions(+), 87 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9adc278a22ab..c1795c952bfe 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -852,6 +852,7 @@ config ARCH_OMAP select HAVE_CLK select ARCH_REQUIRE_GPIOLIB select ARCH_HAS_CPUFREQ + select CLKSRC_MMIO select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select ARCH_HAS_HOLES_MEMORYMODEL diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c index c13bc3d3eb2c..a6cbb712da51 100644 --- a/arch/arm/plat-omap/counter_32k.c +++ b/arch/arm/plat-omap/counter_32k.c @@ -18,6 +18,7 @@ #include #include #include +#include #include @@ -26,87 +27,16 @@ #include - /* * 32KHz clocksource ... always available, on pretty most chips except * OMAP 730 and 1510. Other timers could be used as clocksources, with * higher resolution in free-running counter modes (e.g. 12 MHz xtal), * but systems won't necessarily want to spend resources that way. */ +static void __iomem *timer_32k_base; #define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410 -#include - -/* - * offset_32k holds the init time counter value. It is then subtracted - * from every counter read to achieve a counter that counts time from the - * kernel boot (needed for sched_clock()). - */ -static u32 offset_32k __read_mostly; - -#ifdef CONFIG_ARCH_OMAP16XX -static cycle_t notrace omap16xx_32k_read(struct clocksource *cs) -{ - return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k; -} -#else -#define omap16xx_32k_read NULL -#endif - -#ifdef CONFIG_SOC_OMAP2420 -static cycle_t notrace omap2420_32k_read(struct clocksource *cs) -{ - return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k; -} -#else -#define omap2420_32k_read NULL -#endif - -#ifdef CONFIG_SOC_OMAP2430 -static cycle_t notrace omap2430_32k_read(struct clocksource *cs) -{ - return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k; -} -#else -#define omap2430_32k_read NULL -#endif - -#ifdef CONFIG_ARCH_OMAP3 -static cycle_t notrace omap34xx_32k_read(struct clocksource *cs) -{ - return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k; -} -#else -#define omap34xx_32k_read NULL -#endif - -#ifdef CONFIG_ARCH_OMAP4 -static cycle_t notrace omap44xx_32k_read(struct clocksource *cs) -{ - return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k; -} -#else -#define omap44xx_32k_read NULL -#endif - -/* - * Kernel assumes that sched_clock can be called early but may not have - * things ready yet. - */ -static cycle_t notrace omap_32k_read_dummy(struct clocksource *cs) -{ - return 0; -} - -static struct clocksource clocksource_32k = { - .name = "32k_counter", - .rating = 250, - .read = omap_32k_read_dummy, - .mask = CLOCKSOURCE_MASK(32), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - /* * Returns current time from boot in nsecs. It's OK for this to wrap * around for now, as it's just a relative time stamp. @@ -122,7 +52,7 @@ static DEFINE_CLOCK_DATA(cd); static inline unsigned long long notrace _omap_32k_sched_clock(void) { - u32 cyc = clocksource_32k.read(&clocksource_32k); + u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0; return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT); } @@ -140,7 +70,7 @@ unsigned long long notrace omap_32k_sched_clock(void) static void notrace omap_update_sched_clock(void) { - u32 cyc = clocksource_32k.read(&clocksource_32k); + u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0; update_sched_clock(&cd, cyc, (u32)~0); } @@ -153,6 +83,7 @@ static void notrace omap_update_sched_clock(void) */ static struct timespec persistent_ts; static cycles_t cycles, last_cycles; +static unsigned int persistent_mult, persistent_shift; void read_persistent_clock(struct timespec *ts) { unsigned long long nsecs; @@ -160,11 +91,10 @@ void read_persistent_clock(struct timespec *ts) struct timespec *tsp = &persistent_ts; last_cycles = cycles; - cycles = clocksource_32k.read(&clocksource_32k); + cycles = timer_32k_base ? __raw_readl(timer_32k_base) : 0; delta = cycles - last_cycles; - nsecs = clocksource_cyc2ns(delta, - clocksource_32k.mult, clocksource_32k.shift); + nsecs = clocksource_cyc2ns(delta, persistent_mult, persistent_shift); timespec_add_ns(tsp, nsecs); *ts = *tsp; @@ -176,29 +106,46 @@ int __init omap_init_clocksource_32k(void) "%s: can't register clocksource!\n"; if (cpu_is_omap16xx() || cpu_class_is_omap2()) { + u32 pbase; + unsigned long size = SZ_4K; + void __iomem *base; struct clk *sync_32k_ick; - if (cpu_is_omap16xx()) - clocksource_32k.read = omap16xx_32k_read; - else if (cpu_is_omap2420()) - clocksource_32k.read = omap2420_32k_read; + if (cpu_is_omap16xx()) { + pbase = OMAP16XX_TIMER_32K_SYNCHRONIZED; + size = SZ_1K; + } else if (cpu_is_omap2420()) + pbase = OMAP2420_32KSYNCT_BASE + 0x10; else if (cpu_is_omap2430()) - clocksource_32k.read = omap2430_32k_read; + pbase = OMAP2430_32KSYNCT_BASE + 0x10; else if (cpu_is_omap34xx()) - clocksource_32k.read = omap34xx_32k_read; + pbase = OMAP3430_32KSYNCT_BASE + 0x10; else if (cpu_is_omap44xx()) - clocksource_32k.read = omap44xx_32k_read; + pbase = OMAP4430_32KSYNCT_BASE + 0x10; else return -ENODEV; + /* For this to work we must have a static mapping in io.c for this area */ + base = ioremap(pbase, size); + if (!base) + return -ENODEV; + sync_32k_ick = clk_get(NULL, "omap_32ksync_ick"); if (!IS_ERR(sync_32k_ick)) clk_enable(sync_32k_ick); - offset_32k = clocksource_32k.read(&clocksource_32k); + timer_32k_base = base; - if (clocksource_register_hz(&clocksource_32k, 32768)) - printk(err, clocksource_32k.name); + /* + * 120000 rough estimate from the calculations in + * __clocksource_updatefreq_scale. + */ + clocks_calc_mult_shift(&persistent_mult, &persistent_shift, + 32768, NSEC_PER_SEC, 120000); + + if (clocksource_mmio_init(base, "32k_counter", 32768, 250, 32, + clocksource_mmio_readl_up)) + printk(err, "32k_counter"); init_fixed_sched_clock(&cd, omap_update_sched_clock, 32, 32768, SC_MULT, SC_SHIFT); From 69d042d168ddc683fb51a3c56b90143a1bc49157 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 1 Jul 2011 08:52:25 +0000 Subject: [PATCH 56/56] ASoC: omap: McBSP: fix build breakage on OMAP1 After commits d13586574d373ef40acd4725c9a269daa355e412 ("OMAP: McBSP: implement functional clock switching via clock framework") and cf4c87abe238ec17cd0255b4e21abd949d7f811e ("OMAP: McBSP: implement McBSP CLKR and FSR signal muxing via mach-omap2/mcbsp.c"), any OMAP1 board (such as the AMS Delta) that uses the ASoC McBSP driver will no longer build: sound/built-in.o: In function `omap_mcbsp_dai_set_dai_sysclk': last.c:(.text+0x24ff8): undefined reference to `omap2_mcbsp1_mux_clkr_src' last.c:(.text+0x2500c): undefined reference to `omap2_mcbsp1_mux_fsr_src' make: *** [vmlinux] Error 1 Fix by defining three OMAP1-only dummy functions for omap2_mcbsp1_mux_clkr_src(), omap2_mcbsp1_mux_fsr_src(), and omap2_mcbsp_set_clks_src(). Normally, code that is OMAP SoC-revision-specific like this should go under the arch/arm/*omap* directories, and get abstracted away from drivers via struct platform_data function pointers. This doesn't work in this case since there doesn't appear to be any convenient way to access struct platform_data (or something like it) in the current design of the sound/soc/omap/omap-mcbsp.c driver. Reported by Janusz Krzysztofik and Tony Lindgren . Janusz also posted a patch to fix this at: http://www.spinics.net/lists/linux-omap/msg39560.html (among other places), but the following approach seems less dependent on compiler behavior. This patch passes build tests for ams_delta_defconfig and omap2plus_defconfig, but since I don't have an AMS Delta here, I can't boot test it on that platform. Signed-off-by: Paul Walmsley Cc: Janusz Krzysztofik Cc: Tony Lindgren Cc: Jarkko Nikula Cc: Peter Ujfalusi Cc: Mark Brown Cc: Liam Girdwood Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/mcbsp.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 3c1fbdc92468..6c62af108710 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -966,6 +966,33 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx) } EXPORT_SYMBOL(omap_mcbsp_stop); +/* + * The following functions are only required on an OMAP1-only build. + * mach-omap2/mcbsp.c contains the real functions + */ +#ifndef CONFIG_ARCH_OMAP2PLUS +int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) +{ + WARN(1, "%s: should never be called on an OMAP1-only kernel\n", + __func__); + return -EINVAL; +} + +void omap2_mcbsp1_mux_clkr_src(u8 mux) +{ + WARN(1, "%s: should never be called on an OMAP1-only kernel\n", + __func__); + return; +} + +void omap2_mcbsp1_mux_fsr_src(u8 mux) +{ + WARN(1, "%s: should never be called on an OMAP1-only kernel\n", + __func__); + return; +} +#endif + #ifdef CONFIG_ARCH_OMAP3 #define max_thres(m) (mcbsp->pdata->buffer_size) #define valid_threshold(m, val) ((val) <= max_thres(m))