From 2ff1bf77e4d437be502b79443906fcb23e09b81b Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 30 May 2016 19:05:09 +0200 Subject: [PATCH 01/16] soc: renesas: rcar-sysc: Document r8a7796 support Signed-off-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Acked-by: Rob Herring Signed-off-by: Simon Horman --- Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt index b74e4d4785ab..0725fb37a973 100644 --- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt +++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt @@ -14,6 +14,7 @@ Required properties: - "renesas,r8a7793-sysc" (R-Car M2-N) - "renesas,r8a7794-sysc" (R-Car E2) - "renesas,r8a7795-sysc" (R-Car H3) + - "renesas,r8a7796-sysc" (R-Car M3-W) - reg: Address start and address range for the device. - #power-domain-cells: Must be 1. From 74699228b99d293ec52682eed356f7b39ec644e4 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 30 May 2016 19:05:10 +0200 Subject: [PATCH 02/16] soc: renesas: Add r8a7796 SYSC PM Domain Binding Definitions Signed-off-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Signed-off-by: Simon Horman --- include/dt-bindings/power/r8a7796-sysc.h | 36 ++++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 include/dt-bindings/power/r8a7796-sysc.h diff --git a/include/dt-bindings/power/r8a7796-sysc.h b/include/dt-bindings/power/r8a7796-sysc.h new file mode 100644 index 000000000000..5b4daab44daa --- /dev/null +++ b/include/dt-bindings/power/r8a7796-sysc.h @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2016 Glider bvba + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + */ +#ifndef __DT_BINDINGS_POWER_R8A7796_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A7796_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISR, Interrupt Status Register) + */ + +#define R8A7796_PD_CA57_CPU0 0 +#define R8A7796_PD_CA57_CPU1 1 +#define R8A7796_PD_CA53_CPU0 5 +#define R8A7796_PD_CA53_CPU1 6 +#define R8A7796_PD_CA53_CPU2 7 +#define R8A7796_PD_CA53_CPU3 8 +#define R8A7796_PD_CA57_SCU 12 +#define R8A7796_PD_CR7 13 +#define R8A7796_PD_A3VC 14 +#define R8A7796_PD_3DG_A 17 +#define R8A7796_PD_3DG_B 18 +#define R8A7796_PD_CA53_SCU 21 +#define R8A7796_PD_A3IR 24 +#define R8A7796_PD_A2VC0 25 +#define R8A7796_PD_A2VC1 26 + +/* Always-on power area */ +#define R8A7796_PD_ALWAYS_ON 32 + +#endif /* __DT_BINDINGS_POWER_R8A7796_SYSC_H__ */ From e0c98b9171eecf1745eda08de86081db8ec41d51 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 30 May 2016 19:05:11 +0200 Subject: [PATCH 03/16] soc: renesas: rcar-sysc: Add support for R-Car M3-W power areas Signed-off-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Signed-off-by: Simon Horman --- drivers/soc/renesas/Makefile | 1 + drivers/soc/renesas/r8a7796-sysc.c | 48 ++++++++++++++++++++++++++++++ drivers/soc/renesas/rcar-sysc.c | 3 ++ drivers/soc/renesas/rcar-sysc.h | 1 + 4 files changed, 53 insertions(+) create mode 100644 drivers/soc/renesas/r8a7796-sysc.c diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile index 151fcd3f025b..cd85cd5e6a01 100644 --- a/drivers/soc/renesas/Makefile +++ b/drivers/soc/renesas/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_ARCH_R8A7791) += rcar-sysc.o r8a7791-sysc.o obj-$(CONFIG_ARCH_R8A7793) += rcar-sysc.o r8a7791-sysc.o obj-$(CONFIG_ARCH_R8A7794) += rcar-sysc.o r8a7794-sysc.o obj-$(CONFIG_ARCH_R8A7795) += rcar-sysc.o r8a7795-sysc.o +obj-$(CONFIG_ARCH_R8A7796) += rcar-sysc.o r8a7796-sysc.o diff --git a/drivers/soc/renesas/r8a7796-sysc.c b/drivers/soc/renesas/r8a7796-sysc.c new file mode 100644 index 000000000000..f700c842b9e1 --- /dev/null +++ b/drivers/soc/renesas/r8a7796-sysc.c @@ -0,0 +1,48 @@ +/* + * Renesas R-Car M3-W System Controller + * + * Copyright (C) 2016 Glider bvba + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + */ + +#include +#include + +#include + +#include "rcar-sysc.h" + +static const struct rcar_sysc_area r8a7796_areas[] __initconst = { + { "always-on", 0, 0, R8A7796_PD_ALWAYS_ON, -1, PD_ALWAYS_ON }, + { "ca57-scu", 0x1c0, 0, R8A7796_PD_CA57_SCU, R8A7796_PD_ALWAYS_ON, + PD_SCU }, + { "ca57-cpu0", 0x80, 0, R8A7796_PD_CA57_CPU0, R8A7796_PD_CA57_SCU, + PD_CPU_NOCR }, + { "ca57-cpu1", 0x80, 1, R8A7796_PD_CA57_CPU1, R8A7796_PD_CA57_SCU, + PD_CPU_NOCR }, + { "ca53-scu", 0x140, 0, R8A7796_PD_CA53_SCU, R8A7796_PD_ALWAYS_ON, + PD_SCU }, + { "ca53-cpu0", 0x200, 0, R8A7796_PD_CA53_CPU0, R8A7796_PD_CA53_SCU, + PD_CPU_NOCR }, + { "ca53-cpu1", 0x200, 1, R8A7796_PD_CA53_CPU1, R8A7796_PD_CA53_SCU, + PD_CPU_NOCR }, + { "ca53-cpu2", 0x200, 2, R8A7796_PD_CA53_CPU2, R8A7796_PD_CA53_SCU, + PD_CPU_NOCR }, + { "ca53-cpu3", 0x200, 3, R8A7796_PD_CA53_CPU3, R8A7796_PD_CA53_SCU, + PD_CPU_NOCR }, + { "cr7", 0x240, 0, R8A7796_PD_CR7, R8A7796_PD_ALWAYS_ON }, + { "a3vc", 0x380, 0, R8A7796_PD_A3VC, R8A7796_PD_ALWAYS_ON }, + { "a2vc0", 0x3c0, 0, R8A7796_PD_A2VC0, R8A7796_PD_A3VC }, + { "a2vc1", 0x3c0, 1, R8A7796_PD_A2VC1, R8A7796_PD_A3VC }, + { "3dg-a", 0x100, 0, R8A7796_PD_3DG_A, R8A7796_PD_ALWAYS_ON }, + { "3dg-b", 0x100, 1, R8A7796_PD_3DG_B, R8A7796_PD_3DG_A }, + { "a3ir", 0x180, 0, R8A7796_PD_A3IR, R8A7796_PD_ALWAYS_ON }, +}; + +const struct rcar_sysc_info r8a7796_sysc_info __initconst = { + .areas = r8a7796_areas, + .num_areas = ARRAY_SIZE(r8a7796_areas), +}; diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c index 79dbc770895f..fc997d4d2a4a 100644 --- a/drivers/soc/renesas/rcar-sysc.c +++ b/drivers/soc/renesas/rcar-sysc.c @@ -302,6 +302,9 @@ static const struct of_device_id rcar_sysc_matches[] = { #endif #ifdef CONFIG_ARCH_R8A7795 { .compatible = "renesas,r8a7795-sysc", .data = &r8a7795_sysc_info }, +#endif +#ifdef CONFIG_ARCH_R8A7796 + { .compatible = "renesas,r8a7796-sysc", .data = &r8a7796_sysc_info }, #endif { /* sentinel */ } }; diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h index 5e766174c2f4..4ac3d7bf7f38 100644 --- a/drivers/soc/renesas/rcar-sysc.h +++ b/drivers/soc/renesas/rcar-sysc.h @@ -55,4 +55,5 @@ extern const struct rcar_sysc_info r8a7790_sysc_info; extern const struct rcar_sysc_info r8a7791_sysc_info; extern const struct rcar_sysc_info r8a7794_sysc_info; extern const struct rcar_sysc_info r8a7795_sysc_info; +extern const struct rcar_sysc_info r8a7796_sysc_info; #endif /* __SOC_RENESAS_RCAR_SYSC_H__ */ From 7e49c845983e9aae86c70464786aa2ee191929a6 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sun, 12 Jun 2016 23:56:50 +0300 Subject: [PATCH 04/16] soc: renesas: rcar-sysc: add R8A7792 support Add support for R-Car V2H (R8A7792) SoC power areas to the SYSC driver. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- drivers/soc/renesas/Makefile | 1 + drivers/soc/renesas/r8a7792-sysc.c | 34 ++++++++++++++++++++++++++++++ drivers/soc/renesas/rcar-sysc.c | 3 +++ drivers/soc/renesas/rcar-sysc.h | 1 + 4 files changed, 39 insertions(+) create mode 100644 drivers/soc/renesas/r8a7792-sysc.c diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile index cd85cd5e6a01..623039c3514c 100644 --- a/drivers/soc/renesas/Makefile +++ b/drivers/soc/renesas/Makefile @@ -1,6 +1,7 @@ obj-$(CONFIG_ARCH_R8A7779) += rcar-sysc.o r8a7779-sysc.o obj-$(CONFIG_ARCH_R8A7790) += rcar-sysc.o r8a7790-sysc.o obj-$(CONFIG_ARCH_R8A7791) += rcar-sysc.o r8a7791-sysc.o +obj-$(CONFIG_ARCH_R8A7792) += rcar-sysc.o r8a7792-sysc.o # R-Car M2-N is identical to R-Car M2-W w.r.t. power domains. obj-$(CONFIG_ARCH_R8A7793) += rcar-sysc.o r8a7791-sysc.o obj-$(CONFIG_ARCH_R8A7794) += rcar-sysc.o r8a7794-sysc.o diff --git a/drivers/soc/renesas/r8a7792-sysc.c b/drivers/soc/renesas/r8a7792-sysc.c new file mode 100644 index 000000000000..ca7467d7b7ec --- /dev/null +++ b/drivers/soc/renesas/r8a7792-sysc.c @@ -0,0 +1,34 @@ +/* + * Renesas R-Car V2H (R8A7792) System Controller + * + * Copyright (C) 2016 Cogent Embedded Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + */ + +#include +#include +#include + +#include + +#include "rcar-sysc.h" + +static const struct rcar_sysc_area r8a7792_areas[] __initconst = { + { "always-on", 0, 0, R8A7792_PD_ALWAYS_ON, -1, PD_ALWAYS_ON }, + { "ca15-scu", 0x180, 0, R8A7792_PD_CA15_SCU, R8A7792_PD_ALWAYS_ON, + PD_SCU }, + { "ca15-cpu0", 0x40, 0, R8A7792_PD_CA15_CPU0, R8A7792_PD_CA15_SCU, + PD_CPU_NOCR }, + { "ca15-cpu1", 0x40, 1, R8A7792_PD_CA15_CPU1, R8A7792_PD_CA15_SCU, + PD_CPU_NOCR }, + { "sgx", 0xc0, 0, R8A7792_PD_SGX, R8A7792_PD_ALWAYS_ON }, + { "imp", 0x140, 0, R8A7792_PD_IMP, R8A7792_PD_ALWAYS_ON }, +}; + +const struct rcar_sysc_info r8a7792_sysc_info __initconst = { + .areas = r8a7792_areas, + .num_areas = ARRAY_SIZE(r8a7792_areas), +}; diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c index fc997d4d2a4a..a43ca24699be 100644 --- a/drivers/soc/renesas/rcar-sysc.c +++ b/drivers/soc/renesas/rcar-sysc.c @@ -293,6 +293,9 @@ static const struct of_device_id rcar_sysc_matches[] = { #ifdef CONFIG_ARCH_R8A7791 { .compatible = "renesas,r8a7791-sysc", .data = &r8a7791_sysc_info }, #endif +#ifdef CONFIG_ARCH_R8A7792 + { .compatible = "renesas,r8a7792-sysc", .data = &r8a7792_sysc_info }, +#endif #ifdef CONFIG_ARCH_R8A7793 /* R-Car M2-N is identical to R-Car M2-W w.r.t. power domains. */ { .compatible = "renesas,r8a7793-sysc", .data = &r8a7791_sysc_info }, diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h index 4ac3d7bf7f38..77dbe861473f 100644 --- a/drivers/soc/renesas/rcar-sysc.h +++ b/drivers/soc/renesas/rcar-sysc.h @@ -53,6 +53,7 @@ struct rcar_sysc_info { extern const struct rcar_sysc_info r8a7779_sysc_info; extern const struct rcar_sysc_info r8a7790_sysc_info; extern const struct rcar_sysc_info r8a7791_sysc_info; +extern const struct rcar_sysc_info r8a7792_sysc_info; extern const struct rcar_sysc_info r8a7794_sysc_info; extern const struct rcar_sysc_info r8a7795_sysc_info; extern const struct rcar_sysc_info r8a7796_sysc_info; From 1023578ec38ec1bae085917134ba985da755503e Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 28 Jun 2016 16:10:31 +0200 Subject: [PATCH 05/16] soc: renesas: rcar-sysc: Fix uninitialized error code in rcar_sysc_pd_init() On success, rcar_sysc_pd_init() returns an uninitialized error code. Use the return value of of_genpd_add_provider_onecell() to fix this. This went unnoticed, as early_initcall() doesn't care about the return value. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- drivers/soc/renesas/rcar-sysc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c index a43ca24699be..59a8152681a5 100644 --- a/drivers/soc/renesas/rcar-sysc.c +++ b/drivers/soc/renesas/rcar-sysc.c @@ -398,7 +398,7 @@ static int __init rcar_sysc_pd_init(void) domains->domains[area->isr_bit] = &pd->genpd; } - of_genpd_add_provider_onecell(np, &domains->onecell_data); + error = of_genpd_add_provider_onecell(np, &domains->onecell_data); out_put: of_node_put(np); From b1e52287a29cf0673e1a60210d55edccc756e44a Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 28 Jun 2016 16:10:32 +0200 Subject: [PATCH 06/16] soc: renesas: rcar-sysc: Make rcar_sysc_init() init the PM domains Let rcar_sysc_init() trigger initialization of the SYSC PM domains from DT if called before the early_initcall. On failure, it falls back to mapping the passed register block, as before. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- drivers/soc/renesas/rcar-sysc.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c index 59a8152681a5..68d6856c9d3c 100644 --- a/drivers/soc/renesas/rcar-sysc.c +++ b/drivers/soc/renesas/rcar-sysc.c @@ -164,15 +164,6 @@ static bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch) return false; } -void __iomem *rcar_sysc_init(phys_addr_t base) -{ - rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE); - if (!rcar_sysc_base) - panic("unable to ioremap R-Car SYSC hardware block\n"); - - return rcar_sysc_base; -} - struct rcar_sysc_pd { struct generic_pm_domain genpd; struct rcar_sysc_ch ch; @@ -328,6 +319,9 @@ static int __init rcar_sysc_pd_init(void) unsigned int i; int error; + if (rcar_sysc_base) + return 0; + np = of_find_matching_node_and_match(NULL, rcar_sysc_matches, &match); if (!np) return -ENODEV; @@ -405,3 +399,11 @@ out_put: return error; } early_initcall(rcar_sysc_pd_init); + +void __iomem * __init rcar_sysc_init(phys_addr_t base) +{ + if (rcar_sysc_pd_init()) + rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE); + + return rcar_sysc_base; +} From 053239987f89f9a6299e78610bad010764bccd71 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 28 Jun 2016 16:10:33 +0200 Subject: [PATCH 07/16] soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc driver On R-Car H1 and Gen2, the SYSC interrupt registers are always configured using hardcoded values in platform code. For R-Car Gen2, values are provided for H2 and M2-W only, other SoCs are not yet supported, and never will be. Move this configuration from SoC-specific platform code to the rcar_sysc_init() wrapper, so it can be skipped if the SYSC is configured from DT. This would be the case not only for H1, H2, and M2-W using a modern DTS, but also for other R-Car Gen2 SoCs not supported by the platform code, relying purely on DT. There is no longer a need to return the mapped register block, hence make the function return void. Signed-off-by: Geert Uytterhoeven Reviewed-by: Ulrich Hecht Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/pm-r8a7779.c | 6 +----- arch/arm/mach-shmobile/pm-rcar-gen2.c | 6 +----- drivers/soc/renesas/rcar-sysc.c | 12 ++++++++---- include/linux/soc/renesas/rcar-sysc.h | 2 +- 4 files changed, 11 insertions(+), 15 deletions(-) diff --git a/arch/arm/mach-shmobile/pm-r8a7779.c b/arch/arm/mach-shmobile/pm-r8a7779.c index 4174cbcbc467..5c9a93f5e650 100644 --- a/arch/arm/mach-shmobile/pm-r8a7779.c +++ b/arch/arm/mach-shmobile/pm-r8a7779.c @@ -23,11 +23,7 @@ static void __init r8a7779_sysc_init(void) { - void __iomem *base = rcar_sysc_init(0xffd85000); - - /* enable all interrupt sources, but do not use interrupt handler */ - iowrite32(0x0131000e, base + SYSCIER); - iowrite32(0, base + SYSCIMR); + rcar_sysc_init(0xffd85000, 0x0131000e); } #else /* CONFIG_PM || CONFIG_SMP */ diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c b/arch/arm/mach-shmobile/pm-rcar-gen2.c index 691ac166a277..7768fd1bce65 100644 --- a/arch/arm/mach-shmobile/pm-rcar-gen2.c +++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c @@ -37,11 +37,7 @@ static void __init rcar_gen2_sysc_init(u32 syscier) { - void __iomem *base = rcar_sysc_init(0xe6180000); - - /* enable all interrupt sources, but do not use interrupt handler */ - iowrite32(syscier, base + SYSCIER); - iowrite32(0, base + SYSCIMR); + rcar_sysc_init(0xe6180000, syscier); } #else /* CONFIG_SMP */ diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c index 68d6856c9d3c..22f0d646225c 100644 --- a/drivers/soc/renesas/rcar-sysc.c +++ b/drivers/soc/renesas/rcar-sysc.c @@ -400,10 +400,14 @@ out_put: } early_initcall(rcar_sysc_pd_init); -void __iomem * __init rcar_sysc_init(phys_addr_t base) +void __init rcar_sysc_init(phys_addr_t base, u32 syscier) { - if (rcar_sysc_pd_init()) - rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE); + if (!rcar_sysc_pd_init()) + return; - return rcar_sysc_base; + rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE); + + /* enable all interrupt sources, but do not use interrupt handler */ + iowrite32(syscier, rcar_sysc_base + SYSCIER); + iowrite32(0, rcar_sysc_base + SYSCIMR); } diff --git a/include/linux/soc/renesas/rcar-sysc.h b/include/linux/soc/renesas/rcar-sysc.h index 92fc613ab23d..7b8b280c181b 100644 --- a/include/linux/soc/renesas/rcar-sysc.h +++ b/include/linux/soc/renesas/rcar-sysc.h @@ -11,6 +11,6 @@ struct rcar_sysc_ch { int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch); int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch); -void __iomem *rcar_sysc_init(phys_addr_t base); +void rcar_sysc_init(phys_addr_t base, u32 syscier); #endif /* __LINUX_SOC_RENESAS_RCAR_SYSC_H__ */ From ced42730d19dd140a76f86c3761f646b83a35d09 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 28 Jun 2016 16:10:34 +0200 Subject: [PATCH 08/16] soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy wrapper Align SYSC interrupt configuration in the legacy wrapper with the DT version: - Mask SYSC interrupt sources before enabling them (doesn't matter much as they're disabled at the GIC level anyway), - Make sure not to clear reserved SYSCIMR bits that were set before. Signed-off-by: Geert Uytterhoeven Reviewed-by: Ulrich Hecht Signed-off-by: Simon Horman --- drivers/soc/renesas/rcar-sysc.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c index 22f0d646225c..65c8e1eb90c0 100644 --- a/drivers/soc/renesas/rcar-sysc.c +++ b/drivers/soc/renesas/rcar-sysc.c @@ -402,12 +402,25 @@ early_initcall(rcar_sysc_pd_init); void __init rcar_sysc_init(phys_addr_t base, u32 syscier) { + u32 syscimr; + if (!rcar_sysc_pd_init()) return; rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE); - /* enable all interrupt sources, but do not use interrupt handler */ + /* + * Mask all interrupt sources to prevent the CPU from receiving them. + * Make sure not to clear reserved bits that were set before. + */ + syscimr = ioread32(rcar_sysc_base + SYSCIMR); + syscimr |= syscier; + pr_debug("%s: syscimr = 0x%08x\n", __func__, syscimr); + iowrite32(syscimr, rcar_sysc_base + SYSCIMR); + + /* + * SYSC needs all interrupt sources enabled to control power. + */ + pr_debug("%s: syscier = 0x%08x\n", __func__, syscier); iowrite32(syscier, rcar_sysc_base + SYSCIER); - iowrite32(0, rcar_sysc_base + SYSCIMR); } From a57ac4c16b261d63b5c957353acdca92628b2ca5 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Mon, 13 Jun 2016 00:01:49 +0300 Subject: [PATCH 09/16] ARM: shmobile: r8a7792: basic SoC support Add minimal support for the R-Car V2H (R8A7792) SoC. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Kconfig | 4 +++ arch/arm/mach-shmobile/Makefile | 1 + arch/arm/mach-shmobile/setup-r8a7792.c | 35 ++++++++++++++++++++++++++ 3 files changed, 40 insertions(+) create mode 100644 arch/arm/mach-shmobile/setup-r8a7792.c diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index fe4ccb52f921..88e91583f3fb 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -86,6 +86,10 @@ config ARCH_R8A7791 select ARCH_RCAR_GEN2 select I2C +config ARCH_R8A7792 + bool "R-Car V2H (R8A77920)" + select ARCH_RCAR_GEN2 + config ARCH_R8A7793 bool "R-Car M2-N (R8A7793)" select ARCH_RCAR_GEN2 diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index fc95f7bd2dd9..3fc48b02eb4f 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o pm-r8a7779.o obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o +obj-$(CONFIG_ARCH_R8A7792) += setup-r8a7792.o obj-$(CONFIG_ARCH_R8A7793) += setup-r8a7793.o obj-$(CONFIG_ARCH_R8A7794) += setup-r8a7794.o obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o diff --git a/arch/arm/mach-shmobile/setup-r8a7792.c b/arch/arm/mach-shmobile/setup-r8a7792.c new file mode 100644 index 000000000000..a0910395da09 --- /dev/null +++ b/arch/arm/mach-shmobile/setup-r8a7792.c @@ -0,0 +1,35 @@ +/* + * r8a7792 processor support + * + * Copyright (C) 2014 Renesas Electronics Corporation + * Copyright (C) 2016 Cogent Embedded, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +#include + +#include "common.h" +#include "rcar-gen2.h" + +static const char * const r8a7792_boards_compat_dt[] __initconst = { + "renesas,r8a7792", + NULL, +}; + +DT_MACHINE_START(R8A7792_DT, "Generic R8A7792 (Flattened Device Tree)") + .init_early = shmobile_init_delay, + .init_late = shmobile_init_late, + .init_time = rcar_gen2_timer_init, + .reserve = rcar_gen2_reserve, + .dt_compat = r8a7792_boards_compat_dt, +MACHINE_END From 9f5ce39ddb8f68b30cd65ae33d32f3b47a58d350 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 13 Jun 2016 12:29:37 +0200 Subject: [PATCH 10/16] ARM: shmobile: rcar-gen2: Obtain extal frequency from DT On some R-Car Gen2 SoCs, the frequency of the ARM architecture timer depends on the frequency of the external clock crystal. Currently the latter is determined indirectly from the state of the mode pins, which is a relic predating DT. Obtain the external clock crystal frequency from DT instead, removing the dependency on the mode pins. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-rcar-gen2.c | 42 +++++++++++++----------- 1 file changed, 22 insertions(+), 20 deletions(-) diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index 1c6fd11c2f82..ea092d5dd475 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -46,6 +46,26 @@ u32 rcar_gen2_read_mode_pins(void) return mode; } +static unsigned int __init get_extal_freq(void) +{ + struct device_node *cpg, *extal; + u32 freq = 20000000; + + cpg = of_find_compatible_node(NULL, NULL, + "renesas,rcar-gen2-cpg-clocks"); + if (!cpg) + return freq; + + extal = of_parse_phandle(cpg, "clocks", 0); + of_node_put(cpg); + if (!extal) + return freq; + + of_property_read_u32(extal, "clock-frequency", &freq); + of_node_put(extal); + return freq; +} + #define CNTCR 0 #define CNTFID0 0x20 @@ -54,7 +74,6 @@ void __init rcar_gen2_timer_init(void) u32 mode = rcar_gen2_read_mode_pins(); #ifdef CONFIG_ARM_ARCH_TIMER void __iomem *base; - int extal_mhz = 0; u32 freq; if (of_machine_is_compatible("renesas,r8a7794")) { @@ -82,26 +101,9 @@ void __init rcar_gen2_timer_init(void) * with the counter disabled. Moreover, it may also report * a potentially incorrect fixed 13 MHz frequency. To be * correct these registers need to be updated to use the - * frequency EXTAL / 2 which can be determined by the MD pins. + * frequency EXTAL / 2. */ - - switch (mode & (MD(14) | MD(13))) { - case 0: - extal_mhz = 15; - break; - case MD(13): - extal_mhz = 20; - break; - case MD(14): - extal_mhz = 26; - break; - case MD(13) | MD(14): - extal_mhz = 30; - break; - } - - /* The arch timer frequency equals EXTAL / 2 */ - freq = extal_mhz * (1000000 / 2); + freq = get_extal_freq() / 2; } /* Remap "armgcnt address map" space */ From 2477a356dd245bbbde74c81edc5f16a6d8192023 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 13 Jun 2016 12:31:12 +0200 Subject: [PATCH 11/16] ARM: shmobile: rcar-gen2: Correct arch timer frequency on R-Car V2H According to the datasheet, the frequency of the ARM architecture timer on R-Car V2H depends on the frequency of the ZS clock, just like on R-Car E2. Signed-off-by: Geert Uytterhoeven Tested-by: Sergei Shtylyov Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-rcar-gen2.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index ea092d5dd475..afb9fdcd3d90 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -76,7 +76,8 @@ void __init rcar_gen2_timer_init(void) void __iomem *base; u32 freq; - if (of_machine_is_compatible("renesas,r8a7794")) { + if (of_machine_is_compatible("renesas,r8a7792") || + of_machine_is_compatible("renesas,r8a7794")) { freq = 260000000 / 8; /* ZS / 8 */ /* CNTVOFF has to be initialized either from non-secure * Hypervisor mode or secure Monitor mode with SCR.NS==1. From d3f3fb0cfdcf4cbf69af65e8bfdde65cedf4e53a Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 28 Jun 2016 16:10:35 +0200 Subject: [PATCH 12/16] ARM: shmobile: apmu: Move #ifdef CONFIG_SMP to cover more functions shmobile_smp_apmu_prepare_cpus() is used only if CONFIG_SMP=y. Hence move the #ifdef to cover shmobile_smp_apmu_prepare_cpus() and all functions only called by it (apmu_init_cpu() and apmu_parse_cfg()). Signed-off-by: Geert Uytterhoeven Reviewed-by: Ulrich Hecht Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/platsmp-apmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c index aba75c89f9c1..c1558ef0c590 100644 --- a/arch/arm/mach-shmobile/platsmp-apmu.c +++ b/arch/arm/mach-shmobile/platsmp-apmu.c @@ -74,6 +74,7 @@ static int __maybe_unused apmu_wrap(int cpu, int (*fn)(void __iomem *p, int cpu) return p ? fn(p, apmu_cpus[cpu].bit) : -EINVAL; } +#ifdef CONFIG_SMP static void apmu_init_cpu(struct resource *res, int cpu, int bit) { if ((cpu >= ARRAY_SIZE(apmu_cpus)) || apmu_cpus[cpu].iomem) @@ -128,7 +129,6 @@ void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus, apmu_parse_cfg(apmu_init_cpu, apmu_config, num); } -#ifdef CONFIG_SMP int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle) { /* For this particular CPU register boot vector */ From 5f3bca0db8ac01a73622361f6062939638bf4730 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Tue, 28 Jun 2016 16:10:36 +0200 Subject: [PATCH 13/16] ARM: shmobile: apmu: Add APMU DT support via Enable method Allow DT configuration of the APMU hardware in the case when the APMU is pointed out in the DTB via the enable-method. The ability to configure the APMU via C code is still kept intact to prevent DTB breakage for older SoCs that do not rely on the enable-method for SMP support. Signed-off-by: Magnus Damm [geert: Fix CONFIG_SMP=n build] Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/platsmp-apmu.c | 92 +++++++++++++++++++++++++-- 1 file changed, 88 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c index c1558ef0c590..0c6bb458b7a4 100644 --- a/arch/arm/mach-shmobile/platsmp-apmu.c +++ b/arch/arm/mach-shmobile/platsmp-apmu.c @@ -24,6 +24,7 @@ #include #include "common.h" #include "platsmp-apmu.h" +#include "rcar-gen2.h" static struct { void __iomem *iomem; @@ -118,14 +119,66 @@ static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit), } } +static const struct of_device_id apmu_ids[] = { + { .compatible = "renesas,apmu" }, + { /*sentinel*/ } +}; + +static void apmu_parse_dt(void (*fn)(struct resource *res, int cpu, int bit)) +{ + struct device_node *np_apmu, *np_cpu; + struct resource res; + int bit, index; + u32 id; + + for_each_matching_node(np_apmu, apmu_ids) { + /* only enable the cluster that includes the boot CPU */ + bool is_allowed = false; + + for (bit = 0; bit < CONFIG_NR_CPUS; bit++) { + np_cpu = of_parse_phandle(np_apmu, "cpus", bit); + if (np_cpu) { + if (!of_property_read_u32(np_cpu, "reg", &id)) { + if (id == cpu_logical_map(0)) { + is_allowed = true; + of_node_put(np_cpu); + break; + } + + } + of_node_put(np_cpu); + } + } + if (!is_allowed) + continue; + + for (bit = 0; bit < CONFIG_NR_CPUS; bit++) { + np_cpu = of_parse_phandle(np_apmu, "cpus", bit); + if (np_cpu) { + if (!of_property_read_u32(np_cpu, "reg", &id)) { + index = get_logical_index(id); + if ((index >= 0) && + !of_address_to_resource(np_apmu, + 0, &res)) + fn(&res, index, bit); + } + of_node_put(np_cpu); + } + } + } +} + +static void __init shmobile_smp_apmu_setup_boot(void) +{ + /* install boot code shared by all CPUs */ + shmobile_boot_fn = virt_to_phys(shmobile_smp_boot); +} + void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus, struct rcar_apmu_config *apmu_config, int num) { - /* install boot code shared by all CPUs */ - shmobile_boot_fn = virt_to_phys(shmobile_smp_boot); - - /* perform per-cpu setup */ + shmobile_smp_apmu_setup_boot(); apmu_parse_cfg(apmu_init_cpu, apmu_config, num); } @@ -136,7 +189,38 @@ int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle) return apmu_wrap(cpu, apmu_power_on); } + +static void __init shmobile_smp_apmu_prepare_cpus_dt(unsigned int max_cpus) +{ + shmobile_smp_apmu_setup_boot(); + apmu_parse_dt(apmu_init_cpu); + rcar_gen2_pm_init(); +} + +static int shmobile_smp_apmu_boot_secondary_md21(unsigned int cpu, + struct task_struct *idle) +{ + /* Error out when hardware debug mode is enabled */ + if (rcar_gen2_read_mode_pins() & BIT(21)) { + pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu); + return -ENOTSUPP; + } + + return shmobile_smp_apmu_boot_secondary(cpu, idle); +} + +static struct smp_operations apmu_smp_ops __initdata = { + .smp_prepare_cpus = shmobile_smp_apmu_prepare_cpus_dt, + .smp_boot_secondary = shmobile_smp_apmu_boot_secondary_md21, +#ifdef CONFIG_HOTPLUG_CPU + .cpu_can_disable = shmobile_smp_cpu_can_disable, + .cpu_die = shmobile_smp_apmu_cpu_die, + .cpu_kill = shmobile_smp_apmu_cpu_kill, #endif +}; + +CPU_METHOD_OF_DECLARE(shmobile_smp_apmu, "renesas,apmu", &apmu_smp_ops); +#endif /* CONFIG_SMP */ #if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_SUSPEND) /* nicked from arch/arm/mach-exynos/hotplug.c */ From c21af444eace56619e33df0b1fc67ec2e33481ac Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Tue, 28 Jun 2016 16:10:37 +0200 Subject: [PATCH 14/16] ARM: shmobile: smp: Add function to prioritize DT SMP Add a function to check if other DT based method is available, and if so return false to not hook up smp_ops from the machine vector. This results in that DT-based SMP support has priority over older C-based smp_ops code, and in case DT-based SMP support code does not exist in the DTB then the old smp_ops code will still work as-is. Signed-off-by: Magnus Damm Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/common.h | 1 + arch/arm/mach-shmobile/platsmp.c | 6 ++++++ 2 files changed, 7 insertions(+) diff --git a/arch/arm/mach-shmobile/common.h b/arch/arm/mach-shmobile/common.h index 3b562d87826d..1a8f7b3ab449 100644 --- a/arch/arm/mach-shmobile/common.h +++ b/arch/arm/mach-shmobile/common.h @@ -10,6 +10,7 @@ extern void shmobile_smp_sleep(void); extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn, unsigned long arg); extern bool shmobile_smp_cpu_can_disable(unsigned int cpu); +extern bool shmobile_smp_init_fallback_ops(void); extern void shmobile_boot_scu(void); extern void shmobile_smp_scu_prepare_cpus(phys_addr_t scu_base_phys, unsigned int max_cpus); diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c index b23378f3d7e1..f3dba6f356e2 100644 --- a/arch/arm/mach-shmobile/platsmp.c +++ b/arch/arm/mach-shmobile/platsmp.c @@ -36,3 +36,9 @@ bool shmobile_smp_cpu_can_disable(unsigned int cpu) return true; /* Hotplug of any CPU is supported */ } #endif + +bool __init shmobile_smp_init_fallback_ops(void) +{ + /* fallback on PSCI/smp_ops if no other DT based method is detected */ + return platform_can_secondary_boot() ? true : false; +} From f5d70b9cee2282ecbd98c60e5faf46a896c188a3 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Tue, 28 Jun 2016 16:10:38 +0200 Subject: [PATCH 15/16] ARM: shmobile: r8a7790: Prioritize DT APMU support Adjust the r8a7790 SoC support code to not configure any non-DT SMP code in case the DT-based enable-method has been installed already. Signed-off-by: Magnus Damm Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7790.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index 3a18af4922b4..3506327e0bed 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c @@ -28,6 +28,7 @@ static const char * const r8a7790_boards_compat_dt[] __initconst = { }; DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)") + .smp_init = shmobile_smp_init_fallback_ops, .smp = smp_ops(r8a7790_smp_ops), .init_early = shmobile_init_delay, .init_time = rcar_gen2_timer_init, From f89a51700d7ae0ef58956a8c8f0e2c68767bcdae Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Tue, 28 Jun 2016 16:10:39 +0200 Subject: [PATCH 16/16] ARM: shmobile: r8a7791: Prioritize DT APMU support Adjust the r8a7791 SoC support code to not configure any non-DT SMP code in case the DT-based enable-method has been installed already. Signed-off-by: Magnus Damm Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7791.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c index 3b8dbaf07777..110e8b588e56 100644 --- a/arch/arm/mach-shmobile/setup-r8a7791.c +++ b/arch/arm/mach-shmobile/setup-r8a7791.c @@ -29,6 +29,7 @@ static const char *const r8a7791_boards_compat_dt[] __initconst = { }; DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)") + .smp_init = shmobile_smp_init_fallback_ops, .smp = smp_ops(r8a7791_smp_ops), .init_early = shmobile_init_delay, .init_time = rcar_gen2_timer_init,