arm64: dts: marvell: armada-3720-espressobin: declare PCIe PHY

The PCIe node is wired to the second PHY of the COMPHY IP.

Suggested-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This commit is contained in:
Miquel Raynal 2019-01-08 17:24:38 +01:00 committed by Gregory CLEMENT
parent 2ef303f0fe
commit c38e13a2f8
1 changed files with 1 additions and 0 deletions

View File

@ -46,6 +46,7 @@
/* J9 */
&pcie0 {
status = "okay";
phys = <&comphy1 0>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
};