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DMA: Freescale: revise device tree binding document 

This patch updates the discription of each type of DMA controller and its
channels, it is preparation for adding another new DMA controller binding, it
also fixes some defects of indent for text alignment at the same time.

Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
Hongbo Zhang 2013-09-26 17:33:41 +08:00 committed by Vinod Koul
parent c3cc74b247
commit c3d68d8dd4
1 changed files with 31 additions and 37 deletions
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68
Documentation/devicetree/bindings/powerpc/fsl/dma.txt
View File

@ -1,33 +1,30 @@
* Freescale 83xx DMA Controller * Freescale DMA Controllers
Freescale PowerPC 83xx have on chip general purpose DMA controllers. ** Freescale Elo DMA Controller
This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
series chips such as mpc8315, mpc8349, mpc8379 etc.
Required properties: Required properties:
- compatible : compatible list, contains 2 entries, first is - compatible : must include "fsl,elo-dma"
"fsl,CHIP-dma", where CHIP is the processor - reg : DMA General Status Register, i.e. DGSR which contains
(mpc8349, mpc8360, etc.) and the second is status for all the 4 DMA channels
"fsl,elo-dma" - ranges : describes the mapping between the address space of the
- reg : <registers mapping for DMA general status reg> DMA channels and the address space of the DMA controller
- ranges : Should be defined as specified in 1) to describe the
DMA controller channels.
- cell-index : controller index. 0 for controller @ 0x8100 - cell-index : controller index. 0 for controller @ 0x8100
- interrupts : <interrupt mapping for DMA IRQ> - interrupts : interrupt specifier for DMA IRQ
- interrupt-parent : optional, if needed for interrupt mapping - interrupt-parent : optional, if needed for interrupt mapping
- DMA channel nodes: - DMA channel nodes:
- compatible : compatible list, contains 2 entries, first is - compatible : must include "fsl,elo-dma-channel"
"fsl,CHIP-dma-channel", where CHIP is the processor However, see note below.
(mpc8349, mpc8350, etc.) and the second is - reg : DMA channel specific registers
"fsl,elo-dma-channel". However, see note below. - cell-index : DMA channel index starts at 0.
- reg : <registers mapping for channel>
- cell-index : dma channel index starts at 0.
Optional properties: Optional properties:
- interrupts : <interrupt mapping for DMA channel IRQ> - interrupts : interrupt specifier for DMA channel IRQ
(on 83xx this is expected to be identical to (on 83xx this is expected to be identical to
the interrupts property of the parent node) the interrupts property of the parent node)
- interrupt-parent : optional, if needed for interrupt mapping - interrupt-parent : optional, if needed for interrupt mapping
Example: Example:
@ -70,30 +67,27 @@ Example:
}; };
}; };
* Freescale 85xx/86xx DMA Controller ** Freescale EloPlus DMA Controller
This is a 4-channel DMA controller with extended addresses and chaining,
Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers. mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as
mpc8540, mpc8641 p4080, bsc9131 etc.
Required properties: Required properties:
- compatible : compatible list, contains 2 entries, first is - compatible : must include "fsl,eloplus-dma"
"fsl,CHIP-dma", where CHIP is the processor - reg : DMA General Status Register, i.e. DGSR which contains
(mpc8540, mpc8540, etc.) and the second is status for all the 4 DMA channels
"fsl,eloplus-dma"
- reg : <registers mapping for DMA general status reg>
- cell-index : controller index. 0 for controller @ 0x21000, - cell-index : controller index. 0 for controller @ 0x21000,
1 for controller @ 0xc000 1 for controller @ 0xc000
- ranges : Should be defined as specified in 1) to describe the - ranges : describes the mapping between the address space of the
DMA controller channels. DMA channels and the address space of the DMA controller
- DMA channel nodes: - DMA channel nodes:
- compatible : compatible list, contains 2 entries, first is - compatible : must include "fsl,eloplus-dma-channel"
"fsl,CHIP-dma-channel", where CHIP is the processor However, see note below.
(mpc8540, mpc8560, etc.) and the second is - cell-index : DMA channel index starts at 0.
"fsl,eloplus-dma-channel". However, see note below. - reg : DMA channel specific registers
- cell-index : dma channel index starts at 0. - interrupts : interrupt specifier for DMA channel IRQ
- reg : <registers mapping for channel>
- interrupts : <interrupt mapping for DMA channel IRQ>
- interrupt-parent : optional, if needed for interrupt mapping - interrupt-parent : optional, if needed for interrupt mapping
Example: Example: