KVM/ARM Fixes for the Linux 3.11 release
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJSCF9GAAoJEEtpOizt6ddyQWYH/0tkZWu/wM3UZDmskyHBbeg1 b4K6ll9g6ZVofaifeIjZsUtQRjYOqHKP1EKq82z7/bGCF0WyovNz3c4Yqg1zcZRr DYf2SH6euGYRIfN5f4ijbKIXyBn2aUMkE2WpwqHM8Z04UmRsz5L9IlvEJzI43Sjc aV7qxx9l95wgwwPmaHHm4wYqhA6FEGtIhGU3hyWF1zDKNHBNACMPTl7Tl+E8RWT2 pjHMsOm9sRP8N+ElzhZ3mDHwA/u3ex2rUyHDO1/4oqzKEK+KxsA6HUNdu7Or0EN6 BgBmScwjE6cyo1wBND8FerDvwK/hYC55nnG7Wm9lrtUvSIhtxunmhpxbaZTrPXw= =9RBK -----END PGP SIGNATURE----- Merge tag 'kvm-arm-fixes-3.11' of git://git.linaro.org/people/cdall/linux-kvm-arm into kvm-master KVM/ARM Fixes for the Linux 3.11 release
This commit is contained in:
Paolo Bonzini
commit
c566ccfcb3
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@ -146,7 +146,11 @@ static bool pm_fake(struct kvm_vcpu *vcpu,
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#define access_pmintenclr pm_fake
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/* Architected CP15 registers.
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* Important: Must be sorted ascending by CRn, CRM, Op1, Op2
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* CRn denotes the primary register number, but is copied to the CRm in the
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* user space API for 64-bit register access in line with the terminology used
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* in the ARM ARM.
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* Important: Must be sorted ascending by CRn, CRM, Op1, Op2 and with 64-bit
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* registers preceding 32-bit ones.
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*/
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static const struct coproc_reg cp15_regs[] = {
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/* CSSELR: swapped by interrupt.S. */
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@ -154,8 +158,8 @@ static const struct coproc_reg cp15_regs[] = {
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NULL, reset_unknown, c0_CSSELR },
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/* TTBR0/TTBR1: swapped by interrupt.S. */
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{ CRm( 2), Op1( 0), is64, NULL, reset_unknown64, c2_TTBR0 },
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{ CRm( 2), Op1( 1), is64, NULL, reset_unknown64, c2_TTBR1 },
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{ CRm64( 2), Op1( 0), is64, NULL, reset_unknown64, c2_TTBR0 },
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{ CRm64( 2), Op1( 1), is64, NULL, reset_unknown64, c2_TTBR1 },
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/* TTBCR: swapped by interrupt.S. */
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{ CRn( 2), CRm( 0), Op1( 0), Op2( 2), is32,
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@ -182,7 +186,7 @@ static const struct coproc_reg cp15_regs[] = {
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NULL, reset_unknown, c6_IFAR },
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/* PAR swapped by interrupt.S */
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{ CRn( 7), Op1( 0), is64, NULL, reset_unknown64, c7_PAR },
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{ CRm64( 7), Op1( 0), is64, NULL, reset_unknown64, c7_PAR },
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/*
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* DC{C,I,CI}SW operations:
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@ -399,12 +403,13 @@ static bool index_to_params(u64 id, struct coproc_params *params)
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| KVM_REG_ARM_OPC1_MASK))
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return false;
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params->is_64bit = true;
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params->CRm = ((id & KVM_REG_ARM_CRM_MASK)
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/* CRm to CRn: see cp15_to_index for details */
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params->CRn = ((id & KVM_REG_ARM_CRM_MASK)
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>> KVM_REG_ARM_CRM_SHIFT);
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params->Op1 = ((id & KVM_REG_ARM_OPC1_MASK)
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>> KVM_REG_ARM_OPC1_SHIFT);
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params->Op2 = 0;
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params->CRn = 0;
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params->CRm = 0;
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return true;
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default:
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return false;
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@ -898,7 +903,14 @@ static u64 cp15_to_index(const struct coproc_reg *reg)
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if (reg->is_64) {
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val |= KVM_REG_SIZE_U64;
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val |= (reg->Op1 << KVM_REG_ARM_OPC1_SHIFT);
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val |= (reg->CRm << KVM_REG_ARM_CRM_SHIFT);
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/*
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* CRn always denotes the primary coproc. reg. nr. for the
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* in-kernel representation, but the user space API uses the
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* CRm for the encoding, because it is modelled after the
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* MRRC/MCRR instructions: see the ARM ARM rev. c page
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* B3-1445
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*/
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val |= (reg->CRn << KVM_REG_ARM_CRM_SHIFT);
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} else {
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val |= KVM_REG_SIZE_U32;
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val |= (reg->Op1 << KVM_REG_ARM_OPC1_SHIFT);
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@ -135,6 +135,8 @@ static inline int cmp_reg(const struct coproc_reg *i1,
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return -1;
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if (i1->CRn != i2->CRn)
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return i1->CRn - i2->CRn;
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if (i1->is_64 != i2->is_64)
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return i2->is_64 - i1->is_64;
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if (i1->CRm != i2->CRm)
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return i1->CRm - i2->CRm;
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if (i1->Op1 != i2->Op1)
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@ -145,6 +147,7 @@ static inline int cmp_reg(const struct coproc_reg *i1,
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#define CRn(_x) .CRn = _x
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#define CRm(_x) .CRm = _x
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#define CRm64(_x) .CRn = _x, .CRm = 0
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#define Op1(_x) .Op1 = _x
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#define Op2(_x) .Op2 = _x
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#define is64 .is_64 = true
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@ -114,7 +114,11 @@ static bool access_l2ectlr(struct kvm_vcpu *vcpu,
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/*
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* A15-specific CP15 registers.
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* Important: Must be sorted ascending by CRn, CRM, Op1, Op2
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* CRn denotes the primary register number, but is copied to the CRm in the
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* user space API for 64-bit register access in line with the terminology used
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* in the ARM ARM.
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* Important: Must be sorted ascending by CRn, CRM, Op1, Op2 and with 64-bit
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* registers preceding 32-bit ones.
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*/
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static const struct coproc_reg a15_regs[] = {
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/* MPIDR: we use VMPIDR for guest access. */
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@ -63,7 +63,8 @@ int kvm_handle_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run)
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static int decode_hsr(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
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struct kvm_exit_mmio *mmio)
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{
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unsigned long rt, len;
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unsigned long rt;
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int len;
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bool is_write, sign_extend;
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if (kvm_vcpu_dabt_isextabt(vcpu)) {
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@ -85,6 +85,12 @@ static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
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return p;
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}
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static bool page_empty(void *ptr)
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{
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struct page *ptr_page = virt_to_page(ptr);
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return page_count(ptr_page) == 1;
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}
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static void clear_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr)
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{
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pmd_t *pmd_table = pmd_offset(pud, 0);
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@ -103,12 +109,6 @@ static void clear_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr)
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put_page(virt_to_page(pmd));
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}
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static bool pmd_empty(pmd_t *pmd)
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{
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struct page *pmd_page = virt_to_page(pmd);
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return page_count(pmd_page) == 1;
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}
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static void clear_pte_entry(struct kvm *kvm, pte_t *pte, phys_addr_t addr)
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{
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if (pte_present(*pte)) {
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@ -118,12 +118,6 @@ static void clear_pte_entry(struct kvm *kvm, pte_t *pte, phys_addr_t addr)
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}
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}
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static bool pte_empty(pte_t *pte)
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{
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struct page *pte_page = virt_to_page(pte);
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return page_count(pte_page) == 1;
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}
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static void unmap_range(struct kvm *kvm, pgd_t *pgdp,
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unsigned long long start, u64 size)
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{
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@ -132,37 +126,37 @@ static void unmap_range(struct kvm *kvm, pgd_t *pgdp,
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pmd_t *pmd;
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pte_t *pte;
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unsigned long long addr = start, end = start + size;
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u64 range;
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u64 next;
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while (addr < end) {
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pgd = pgdp + pgd_index(addr);
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pud = pud_offset(pgd, addr);
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if (pud_none(*pud)) {
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addr += PUD_SIZE;
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addr = pud_addr_end(addr, end);
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continue;
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}
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pmd = pmd_offset(pud, addr);
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if (pmd_none(*pmd)) {
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addr += PMD_SIZE;
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addr = pmd_addr_end(addr, end);
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continue;
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}
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pte = pte_offset_kernel(pmd, addr);
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clear_pte_entry(kvm, pte, addr);
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range = PAGE_SIZE;
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next = addr + PAGE_SIZE;
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/* If we emptied the pte, walk back up the ladder */
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if (pte_empty(pte)) {
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if (page_empty(pte)) {
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clear_pmd_entry(kvm, pmd, addr);
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range = PMD_SIZE;
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if (pmd_empty(pmd)) {
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next = pmd_addr_end(addr, end);
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if (page_empty(pmd) && !page_empty(pud)) {
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clear_pud_entry(kvm, pud, addr);
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range = PUD_SIZE;
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next = pud_addr_end(addr, end);
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}
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}
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addr += range;
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addr = next;
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}
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}
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