Merge branch '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue
Jeff Kirsher says: ==================== 1GbE Intel Wired LAN Driver Updates 2017-01-06 This series contains updates/fixes to igb and e1000e. Joe fixes indentation and improper line wrapping in igb. David Singleton fixes an issue in e1000e where in systemd, where things are done in parallel and can create a condition where e1000_shutdown is called after e1000_close, hitting BUG_ON assert in free_msi_irqs. Cao Jin fixes a code comment on the wakeup status register. Also fixes a possible NULL pointer dereference by using igb_adapter->io_addr instead of e1000_hw->hw_addr in igb_configure_tx_ring(). Chris Arges works around a firmware issue, which can cause probe of i210 NIC to fail, so zero the page select register during igb_get_phy_id() to workaround the issue. Aaron Sierra adds also a check for this issue during the initialization of PHY parameters to ensure that this same issue happens after probe. Todd fixes a possible race condition in close/suspend by extending the rtnl_lock() to protect the call to netif_device_detach() and igb_clear_interrupt_scheme(). Also adds i211 to a known i210/i211 workaround. Hannu Lounento fixes inverted logic on a debug statement. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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commit
c5e7099137
@ -6276,8 +6276,8 @@ static int e1000e_pm_freeze(struct device *dev)
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/* Quiesce the device without resetting the hardware */
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e1000e_down(adapter, false);
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e1000_free_irq(adapter);
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e1000e_reset_interrupt_capability(adapter);
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}
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e1000e_reset_interrupt_capability(adapter);
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/* Allow time for pending master requests to run */
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e1000e_disable_pcie_master(&adapter->hw);
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@ -245,6 +245,17 @@ static s32 igb_init_phy_params_82575(struct e1000_hw *hw)
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hw->bus.func = (rd32(E1000_STATUS) & E1000_STATUS_FUNC_MASK) >>
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E1000_STATUS_FUNC_SHIFT;
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/* Make sure the PHY is in a good state. Several people have reported
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* firmware leaving the PHY's page select register set to something
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* other than the default of zero, which causes the PHY ID read to
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* access something other than the intended register.
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*/
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ret_val = hw->phy.ops.reset(hw);
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if (ret_val) {
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hw_dbg("Error resetting the PHY.\n");
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goto out;
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}
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/* Set phy->phy_addr and phy->id. */
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ret_val = igb_get_phy_id_82575(hw);
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if (ret_val)
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@ -699,9 +699,9 @@ static s32 igb_update_flash_i210(struct e1000_hw *hw)
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ret_val = igb_pool_flash_update_done_i210(hw);
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if (ret_val)
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hw_dbg("Flash update complete\n");
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else
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hw_dbg("Flash update time out\n");
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else
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hw_dbg("Flash update complete\n");
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out:
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return ret_val;
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@ -792,15 +792,13 @@ static s32 igb_set_default_fc(struct e1000_hw *hw)
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* control setting, then the variable hw->fc will
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* be initialized based on a value in the EEPROM.
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*/
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if (hw->mac.type == e1000_i350) {
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if (hw->mac.type == e1000_i350)
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lan_offset = NVM_82580_LAN_FUNC_OFFSET(hw->bus.func);
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ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG
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+ lan_offset, 1, &nvm_data);
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} else {
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ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG,
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1, &nvm_data);
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}
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else
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lan_offset = 0;
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ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG + lan_offset,
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1, &nvm_data);
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if (ret_val) {
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hw_dbg("NVM Read Error\n");
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goto out;
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@ -808,8 +806,7 @@ static s32 igb_set_default_fc(struct e1000_hw *hw)
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if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == 0)
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hw->fc.requested_mode = e1000_fc_none;
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else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) ==
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NVM_WORD0F_ASM_DIR)
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else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == NVM_WORD0F_ASM_DIR)
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hw->fc.requested_mode = e1000_fc_tx_pause;
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else
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hw->fc.requested_mode = e1000_fc_full;
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@ -77,6 +77,10 @@ s32 igb_get_phy_id(struct e1000_hw *hw)
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s32 ret_val = 0;
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u16 phy_id;
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/* ensure PHY page selection to fix misconfigured i210 */
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if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
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phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0);
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ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);
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if (ret_val)
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goto out;
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@ -320,7 +320,7 @@
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#define E1000_VT_CTL 0x0581C /* VMDq Control - RW */
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#define E1000_WUC 0x05800 /* Wakeup Control - RW */
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#define E1000_WUFC 0x05808 /* Wakeup Filter Control - RW */
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#define E1000_WUS 0x05810 /* Wakeup Status - RO */
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#define E1000_WUS 0x05810 /* Wakeup Status - R/W1C */
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#define E1000_MANC 0x05820 /* Management Control - RW */
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#define E1000_IPAV 0x05838 /* IP Address Valid - RW */
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#define E1000_WUPL 0x05900 /* Wakeup Packet Length - RW */
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@ -3275,7 +3275,9 @@ static int __igb_close(struct net_device *netdev, bool suspending)
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int igb_close(struct net_device *netdev)
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{
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return __igb_close(netdev, false);
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if (netif_device_present(netdev))
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return __igb_close(netdev, false);
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return 0;
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}
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/**
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@ -3394,7 +3396,7 @@ void igb_configure_tx_ring(struct igb_adapter *adapter,
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tdba & 0x00000000ffffffffULL);
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wr32(E1000_TDBAH(reg_idx), tdba >> 32);
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ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
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ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
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wr32(E1000_TDH(reg_idx), 0);
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writel(0, ring->tail);
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@ -3733,7 +3735,7 @@ void igb_configure_rx_ring(struct igb_adapter *adapter,
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ring->count * sizeof(union e1000_adv_rx_desc));
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/* initialize head and tail */
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ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
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ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
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wr32(E1000_RDH(reg_idx), 0);
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writel(0, ring->tail);
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@ -7564,6 +7566,7 @@ static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
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int retval = 0;
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#endif
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rtnl_lock();
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netif_device_detach(netdev);
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if (netif_running(netdev))
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@ -7572,6 +7575,7 @@ static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
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igb_ptp_suspend(adapter);
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igb_clear_interrupt_scheme(adapter);
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rtnl_unlock();
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#ifdef CONFIG_PM
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retval = pci_save_state(pdev);
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@ -7690,16 +7694,15 @@ static int igb_resume(struct device *dev)
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wr32(E1000_WUS, ~0);
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if (netdev->flags & IFF_UP) {
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rtnl_lock();
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rtnl_lock();
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if (!err && netif_running(netdev))
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err = __igb_open(netdev, true);
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rtnl_unlock();
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if (err)
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return err;
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}
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netif_device_attach(netdev);
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return 0;
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if (!err)
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netif_device_attach(netdev);
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rtnl_unlock();
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return err;
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}
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static int igb_runtime_idle(struct device *dev)
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@ -7898,6 +7901,11 @@ static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
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pci_enable_wake(pdev, PCI_D3hot, 0);
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pci_enable_wake(pdev, PCI_D3cold, 0);
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/* In case of PCI error, adapter lose its HW address
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* so we should re-assign it here.
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*/
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hw->hw_addr = adapter->io_addr;
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igb_reset(adapter);
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wr32(E1000_WUS, ~0);
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result = PCI_ERS_RESULT_RECOVERED;
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