r300: updates register header
This updates the R300 register names and allows the VAP_PVS_WAITIDLE register to be written. Signed-off-by: Dave Airlie <airlied@linux.ie>
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ddbee33328
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@ -148,15 +148,16 @@ void r300_init_reg_flags(void)
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/* these match cmducs() command in r300_driver/r300/r300_cmdbuf.c */
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ADD_RANGE(R300_SE_VPORT_XSCALE, 6);
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ADD_RANGE(0x2080, 1);
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ADD_RANGE(R300_VAP_CNTL, 1);
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ADD_RANGE(R300_SE_VTE_CNTL, 2);
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ADD_RANGE(0x2134, 2);
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ADD_RANGE(0x2140, 1);
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ADD_RANGE(R300_VAP_CNTL_STATUS, 1);
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ADD_RANGE(R300_VAP_INPUT_CNTL_0, 2);
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ADD_RANGE(0x21DC, 1);
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ADD_RANGE(0x221C, 1);
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ADD_RANGE(0x2220, 4);
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ADD_RANGE(0x2288, 1);
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ADD_RANGE(R300_VAP_UNKNOWN_221C, 1);
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ADD_RANGE(R300_VAP_CLIP_X_0, 4);
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ADD_RANGE(R300_VAP_PVS_WAITIDLE, 1);
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ADD_RANGE(R300_VAP_UNKNOWN_2288, 1);
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ADD_RANGE(R300_VAP_OUTPUT_VTX_FMT_0, 2);
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ADD_RANGE(R300_VAP_PVS_CNTL_1, 3);
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ADD_RANGE(R300_GB_ENABLE, 1);
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@ -168,13 +169,13 @@ void r300_init_reg_flags(void)
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ADD_RANGE(R300_RE_POINTSIZE, 1);
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ADD_RANGE(0x4230, 3);
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ADD_RANGE(R300_RE_LINE_CNT, 1);
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ADD_RANGE(0x4238, 1);
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ADD_RANGE(R300_RE_UNK4238, 1);
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ADD_RANGE(0x4260, 3);
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ADD_RANGE(0x4274, 4);
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ADD_RANGE(0x4288, 5);
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ADD_RANGE(0x42A0, 1);
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ADD_RANGE(R300_RE_SHADE, 4);
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ADD_RANGE(R300_RE_POLYGON_MODE, 5);
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ADD_RANGE(R300_RE_ZBIAS_CNTL, 1);
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ADD_RANGE(R300_RE_ZBIAS_T_FACTOR, 4);
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ADD_RANGE(0x42B4, 1);
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ADD_RANGE(R300_RE_OCCLUSION_CNTL, 1);
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ADD_RANGE(R300_RE_CULL_CNTL, 1);
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ADD_RANGE(0x42C0, 2);
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ADD_RANGE(R300_RS_CNTL_0, 2);
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@ -190,22 +191,22 @@ void r300_init_reg_flags(void)
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ADD_RANGE(R300_PFS_INSTR1_0, 64);
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ADD_RANGE(R300_PFS_INSTR2_0, 64);
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ADD_RANGE(R300_PFS_INSTR3_0, 64);
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ADD_RANGE(0x4BC0, 1);
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ADD_RANGE(0x4BC8, 3);
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ADD_RANGE(R300_RE_FOG_STATE, 1);
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ADD_RANGE(R300_FOG_COLOR_R, 3);
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ADD_RANGE(R300_PP_ALPHA_TEST, 2);
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ADD_RANGE(0x4BD8, 1);
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ADD_RANGE(R300_PFS_PARAM_0_X, 64);
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ADD_RANGE(0x4E00, 1);
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ADD_RANGE(R300_RB3D_CBLEND, 2);
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ADD_RANGE(R300_RB3D_COLORMASK, 1);
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ADD_RANGE(0x4E10, 3);
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ADD_RANGE(R300_RB3D_BLEND_COLOR, 3);
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ADD_RANGE_MARK(R300_RB3D_COLOROFFSET0, 1, MARK_CHECK_OFFSET); /* check offset */
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ADD_RANGE(R300_RB3D_COLORPITCH0, 1);
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ADD_RANGE(0x4E50, 9);
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ADD_RANGE(0x4E88, 1);
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ADD_RANGE(0x4EA0, 2);
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ADD_RANGE(R300_RB3D_ZSTENCIL_CNTL_0, 3);
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ADD_RANGE(0x4F10, 4);
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ADD_RANGE(R300_RB3D_ZSTENCIL_FORMAT, 4);
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ADD_RANGE_MARK(R300_RB3D_DEPTHOFFSET, 1, MARK_CHECK_OFFSET); /* check offset */
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ADD_RANGE(R300_RB3D_DEPTHPITCH, 1);
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ADD_RANGE(0x4F28, 1);
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@ -224,7 +225,7 @@ void r300_init_reg_flags(void)
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ADD_RANGE(R300_TX_BORDER_COLOR_0, 16);
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/* Sporadic registers used as primitives are emitted */
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ADD_RANGE(0x4f18, 1);
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ADD_RANGE(R300_RB3D_ZCACHE_CTLSTAT, 1);
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ADD_RANGE(R300_RB3D_DSTCACHE_CTLSTAT, 1);
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ADD_RANGE(R300_VAP_INPUT_ROUTE_0_0, 8);
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ADD_RANGE(R300_VAP_INPUT_ROUTE_1_0, 8);
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@ -692,9 +693,9 @@ static __inline__ void r300_pacify(drm_radeon_private_t *dev_priv)
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BEGIN_RING(6);
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OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
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OUT_RING(0xa);
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OUT_RING(CP_PACKET0(0x4f18, 0));
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OUT_RING(0x3);
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OUT_RING(R300_RB3D_DSTCACHE_UNKNOWN_0A);
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OUT_RING(CP_PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0));
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OUT_RING(R300_RB3D_ZCACHE_UNKNOWN_03);
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OUT_RING(CP_PACKET3(RADEON_CP_NOP, 0));
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OUT_RING(0x0);
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ADVANCE_RING();
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@ -766,8 +767,8 @@ static int r300_scratch(drm_radeon_private_t *dev_priv,
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}
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BEGIN_RING(2);
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OUT_RING(CP_PACKET0(RADEON_SCRATCH_REG0 + header.scratch.reg * 4, 0));
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OUT_RING(dev_priv->scratch_ages[header.scratch.reg]);
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OUT_RING( CP_PACKET0( RADEON_SCRATCH_REG0 + header.scratch.reg * 4, 0 ) );
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OUT_RING( dev_priv->scratch_ages[header.scratch.reg] );
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ADVANCE_RING();
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return 0;
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