clk: sunxi-ng: Add A31/A31s clocks

Add a new style driver for the clock control unit in Allwinner A31/A31s.

A few clocks are still missing:

    - MIPI PLL's HDMI mode support
    - EMAC clock

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Chen-Yu Tsai 2016-08-25 14:21:59 +08:00 committed by Maxime Ripard
parent 8adfb08605
commit c6e6c96d8f
7 changed files with 1613 additions and 1 deletions

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@ -2,7 +2,8 @@ Allwinner Clock Control Unit Binding
------------------------------------
Required properties :
- compatible: must contain one of the following compatible:
- compatible: must contain one of the following compatibles:
- "allwinner,sun6i-a31-ccu"
- "allwinner,sun8i-h3-ccu"
- reg: Must contain the registers base address and length

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@ -51,6 +51,16 @@ config SUNXI_CCU_MP
# SoC Drivers
config SUN6I_A31_CCU
bool "Support for the Allwinner A31/A31s CCU"
select SUNXI_CCU_DIV
select SUNXI_CCU_NK
select SUNXI_CCU_NKM
select SUNXI_CCU_NM
select SUNXI_CCU_MP
select SUNXI_CCU_PHASE
default MACH_SUN6I
config SUN8I_H3_CCU
bool "Support for the Allwinner H3 CCU"
select SUNXI_CCU_DIV

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@ -17,4 +17,5 @@ obj-$(CONFIG_SUNXI_CCU_NM) += ccu_nm.o
obj-$(CONFIG_SUNXI_CCU_MP) += ccu_mp.o
# SoC support
obj-$(CONFIG_SUN6I_A31_CCU) += ccu-sun6i-a31.o
obj-$(CONFIG_SUN8I_H3_CCU) += ccu-sun8i-h3.o

File diff suppressed because it is too large Load Diff

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@ -0,0 +1,72 @@
/*
* Copyright 2016 Chen-Yu Tsai
*
* Chen-Yu Tsai <wens@csie.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _CCU_SUN6I_A31_H_
#define _CCU_SUN6I_A31_H_
#include <dt-bindings/clock/sun6i-a31-ccu.h>
#include <dt-bindings/reset/sun6i-a31-ccu.h>
#define CLK_PLL_CPU 0
#define CLK_PLL_AUDIO_BASE 1
#define CLK_PLL_AUDIO 2
#define CLK_PLL_AUDIO_2X 3
#define CLK_PLL_AUDIO_4X 4
#define CLK_PLL_AUDIO_8X 5
#define CLK_PLL_VIDEO0 6
#define CLK_PLL_VIDEO0_2X 7
#define CLK_PLL_VE 8
#define CLK_PLL_DDR 9
/* The PLL_PERIPH clock is exported */
#define CLK_PLL_PERIPH_2X 11
#define CLK_PLL_VIDEO1 12
#define CLK_PLL_VIDEO1_2X 13
#define CLK_PLL_GPU 14
#define CLK_PLL_MIPI 15
#define CLK_PLL9 16
#define CLK_PLL10 17
/* The CPUX clock is exported */
#define CLK_AXI 19
#define CLK_AHB1 20
#define CLK_APB1 21
#define CLK_APB2 22
/* All the bus gates are exported */
/* The first bunch of module clocks are exported */
/* EMAC clock is not implemented */
#define CLK_MDFS 107
#define CLK_SDRAM0 108
#define CLK_SDRAM1 109
/* All the DRAM gates are exported */
/* Some more module clocks are exported */
#define CLK_MBUS0 141
#define CLK_MBUS1 142
/* Some more module clocks and external clock outputs are exported */
#define CLK_NUMBER (CLK_OUT_C + 1)
#endif /* _CCU_SUN6I_A31_H_ */

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@ -0,0 +1,187 @@
/*
* Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _DT_BINDINGS_CLK_SUN6I_A31_H_
#define _DT_BINDINGS_CLK_SUN6I_A31_H_
#define CLK_PLL_PERIPH 10
#define CLK_CPU 18
#define CLK_AHB1_MIPIDSI 23
#define CLK_AHB1_SS 24
#define CLK_AHB1_DMA 25
#define CLK_AHB1_MMC0 26
#define CLK_AHB1_MMC1 27
#define CLK_AHB1_MMC2 28
#define CLK_AHB1_MMC3 29
#define CLK_AHB1_NAND1 30
#define CLK_AHB1_NAND0 31
#define CLK_AHB1_SDRAM 32
#define CLK_AHB1_EMAC 33
#define CLK_AHB1_TS 34
#define CLK_AHB1_HSTIMER 35
#define CLK_AHB1_SPI0 36
#define CLK_AHB1_SPI1 37
#define CLK_AHB1_SPI2 38
#define CLK_AHB1_SPI3 39
#define CLK_AHB1_OTG 40
#define CLK_AHB1_EHCI0 41
#define CLK_AHB1_EHCI1 42
#define CLK_AHB1_OHCI0 43
#define CLK_AHB1_OHCI1 44
#define CLK_AHB1_OHCI2 45
#define CLK_AHB1_VE 46
#define CLK_AHB1_LCD0 47
#define CLK_AHB1_LCD1 48
#define CLK_AHB1_CSI 49
#define CLK_AHB1_HDMI 50
#define CLK_AHB1_BE0 51
#define CLK_AHB1_BE1 52
#define CLK_AHB1_FE0 53
#define CLK_AHB1_FE1 54
#define CLK_AHB1_MP 55
#define CLK_AHB1_GPU 56
#define CLK_AHB1_DEU0 57
#define CLK_AHB1_DEU1 58
#define CLK_AHB1_DRC0 59
#define CLK_AHB1_DRC1 60
#define CLK_APB1_CODEC 61
#define CLK_APB1_SPDIF 62
#define CLK_APB1_DIGITAL_MIC 63
#define CLK_APB1_PIO 64
#define CLK_APB1_DAUDIO0 65
#define CLK_APB1_DAUDIO1 66
#define CLK_APB2_I2C0 67
#define CLK_APB2_I2C1 68
#define CLK_APB2_I2C2 69
#define CLK_APB2_I2C3 70
#define CLK_APB2_UART0 71
#define CLK_APB2_UART1 72
#define CLK_APB2_UART2 73
#define CLK_APB2_UART3 74
#define CLK_APB2_UART4 75
#define CLK_APB2_UART5 76
#define CLK_NAND0 77
#define CLK_NAND1 78
#define CLK_MMC0 79
#define CLK_MMC0_SAMPLE 80
#define CLK_MMC0_OUTPUT 81
#define CLK_MMC1 82
#define CLK_MMC1_SAMPLE 83
#define CLK_MMC1_OUTPUT 84
#define CLK_MMC2 85
#define CLK_MMC2_SAMPLE 86
#define CLK_MMC2_OUTPUT 87
#define CLK_MMC3 88
#define CLK_MMC3_SAMPLE 89
#define CLK_MMC3_OUTPUT 90
#define CLK_TS 91
#define CLK_SS 92
#define CLK_SPI0 93
#define CLK_SPI1 94
#define CLK_SPI2 95
#define CLK_SPI3 96
#define CLK_DAUDIO0 97
#define CLK_DAUDIO1 98
#define CLK_SPDIF 99
#define CLK_USB_PHY0 100
#define CLK_USB_PHY1 101
#define CLK_USB_PHY2 102
#define CLK_USB_OHCI0 103
#define CLK_USB_OHCI1 104
#define CLK_USB_OHCI2 105
#define CLK_DRAM_VE 110
#define CLK_DRAM_CSI_ISP 111
#define CLK_DRAM_TS 112
#define CLK_DRAM_DRC0 113
#define CLK_DRAM_DRC1 114
#define CLK_DRAM_DEU0 115
#define CLK_DRAM_DEU1 116
#define CLK_DRAM_FE0 117
#define CLK_DRAM_FE1 118
#define CLK_DRAM_BE0 119
#define CLK_DRAM_BE1 120
#define CLK_DRAM_MP 121
#define CLK_BE0 122
#define CLK_BE1 123
#define CLK_FE0 124
#define CLK_FE1 125
#define CLK_MP 126
#define CLK_LCD0_CH0 127
#define CLK_LCD1_CH0 128
#define CLK_LCD0_CH1 129
#define CLK_LCD1_CH1 130
#define CLK_CSI0_SCLK 131
#define CLK_CSI0_MCLK 132
#define CLK_CSI1_MCLK 133
#define CLK_VE 134
#define CLK_CODEC 135
#define CLK_AVS 136
#define CLK_DIGITAL_MIC 137
#define CLK_HDMI 138
#define CLK_HDMI_DDC 139
#define CLK_PS 140
#define CLK_MIPI_DSI 143
#define CLK_MIPI_DSI_DPHY 144
#define CLK_MIPI_CSI_DPHY 145
#define CLK_IEP_DRC0 146
#define CLK_IEP_DRC1 147
#define CLK_IEP_DEU0 148
#define CLK_IEP_DEU1 149
#define CLK_GPU_CORE 150
#define CLK_GPU_MEMORY 151
#define CLK_GPU_HYD 152
#define CLK_ATS 153
#define CLK_TRACE 154
#define CLK_OUT_A 155
#define CLK_OUT_B 156
#define CLK_OUT_C 157
#endif /* _DT_BINDINGS_CLK_SUN6I_A31_H_ */

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@ -0,0 +1,106 @@
/*
* Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _DT_BINDINGS_RST_SUN6I_A31_H_
#define _DT_BINDINGS_RST_SUN6I_A31_H_
#define RST_USB_PHY0 0
#define RST_USB_PHY1 1
#define RST_USB_PHY2 2
#define RST_AHB1_MIPI_DSI 3
#define RST_AHB1_SS 4
#define RST_AHB1_DMA 5
#define RST_AHB1_MMC0 6
#define RST_AHB1_MMC1 7
#define RST_AHB1_MMC2 8
#define RST_AHB1_MMC3 9
#define RST_AHB1_NAND1 10
#define RST_AHB1_NAND0 11
#define RST_AHB1_SDRAM 12
#define RST_AHB1_EMAC 13
#define RST_AHB1_TS 14
#define RST_AHB1_HSTIMER 15
#define RST_AHB1_SPI0 16
#define RST_AHB1_SPI1 17
#define RST_AHB1_SPI2 18
#define RST_AHB1_SPI3 19
#define RST_AHB1_OTG 20
#define RST_AHB1_EHCI0 21
#define RST_AHB1_EHCI1 22
#define RST_AHB1_OHCI0 23
#define RST_AHB1_OHCI1 24
#define RST_AHB1_OHCI2 25
#define RST_AHB1_VE 26
#define RST_AHB1_LCD0 27
#define RST_AHB1_LCD1 28
#define RST_AHB1_CSI 29
#define RST_AHB1_HDMI 30
#define RST_AHB1_BE0 31
#define RST_AHB1_BE1 32
#define RST_AHB1_FE0 33
#define RST_AHB1_FE1 34
#define RST_AHB1_MP 35
#define RST_AHB1_GPU 36
#define RST_AHB1_DEU0 37
#define RST_AHB1_DEU1 38
#define RST_AHB1_DRC0 39
#define RST_AHB1_DRC1 40
#define RST_AHB1_LVDS 41
#define RST_APB1_CODEC 42
#define RST_APB1_SPDIF 43
#define RST_APB1_DIGITAL_MIC 44
#define RST_APB1_DAUDIO0 45
#define RST_APB1_DAUDIO1 46
#define RST_APB2_I2C0 47
#define RST_APB2_I2C1 48
#define RST_APB2_I2C2 49
#define RST_APB2_I2C3 50
#define RST_APB2_UART0 51
#define RST_APB2_UART1 52
#define RST_APB2_UART2 53
#define RST_APB2_UART3 54
#define RST_APB2_UART4 55
#define RST_APB2_UART5 56
#endif /* _DT_BINDINGS_RST_SUN6I_A31_H_ */