Merge remote-tracking branch 'lorenzo/pci/controller-fixes' into for-linus
- Fix DesignWare endpoint MSI-X address calculation bug (Gustavo Pimentel) - Fix Layerscape outbound window disable usage (Hou Zhiqiang) - Fix imx6 link up detection (Trent Piepho) * lorenzo/pci/controller-fixes: PCI: dwc: Fix MSI-X EP framework address calculation bug PCI: layerscape: Fix wrong invocation of outbound window disable accessor PCI: imx6: Fix link training status detection in link up check
This commit is contained in:
commit
c74eadf881
|
@ -81,8 +81,6 @@ struct imx6_pcie {
|
||||||
#define PCIE_PL_PFLR_FORCE_LINK (1 << 15)
|
#define PCIE_PL_PFLR_FORCE_LINK (1 << 15)
|
||||||
#define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28)
|
#define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28)
|
||||||
#define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c)
|
#define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c)
|
||||||
#define PCIE_PHY_DEBUG_R1_XMLH_LINK_IN_TRAINING (1 << 29)
|
|
||||||
#define PCIE_PHY_DEBUG_R1_XMLH_LINK_UP (1 << 4)
|
|
||||||
|
|
||||||
#define PCIE_PHY_CTRL (PL_OFFSET + 0x114)
|
#define PCIE_PHY_CTRL (PL_OFFSET + 0x114)
|
||||||
#define PCIE_PHY_CTRL_DATA_LOC 0
|
#define PCIE_PHY_CTRL_DATA_LOC 0
|
||||||
|
@ -711,12 +709,6 @@ static int imx6_pcie_host_init(struct pcie_port *pp)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int imx6_pcie_link_up(struct dw_pcie *pci)
|
|
||||||
{
|
|
||||||
return dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R1) &
|
|
||||||
PCIE_PHY_DEBUG_R1_XMLH_LINK_UP;
|
|
||||||
}
|
|
||||||
|
|
||||||
static const struct dw_pcie_host_ops imx6_pcie_host_ops = {
|
static const struct dw_pcie_host_ops imx6_pcie_host_ops = {
|
||||||
.host_init = imx6_pcie_host_init,
|
.host_init = imx6_pcie_host_init,
|
||||||
};
|
};
|
||||||
|
@ -749,7 +741,7 @@ static int imx6_add_pcie_port(struct imx6_pcie *imx6_pcie,
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct dw_pcie_ops dw_pcie_ops = {
|
static const struct dw_pcie_ops dw_pcie_ops = {
|
||||||
.link_up = imx6_pcie_link_up,
|
/* No special ops needed, but pcie-designware still expects this struct */
|
||||||
};
|
};
|
||||||
|
|
||||||
#ifdef CONFIG_PM_SLEEP
|
#ifdef CONFIG_PM_SLEEP
|
||||||
|
|
|
@ -88,7 +88,7 @@ static void ls_pcie_disable_outbound_atus(struct ls_pcie *pcie)
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
for (i = 0; i < PCIE_IATU_NUM; i++)
|
for (i = 0; i < PCIE_IATU_NUM; i++)
|
||||||
dw_pcie_disable_atu(pcie->pci, DW_PCIE_REGION_OUTBOUND, i);
|
dw_pcie_disable_atu(pcie->pci, i, DW_PCIE_REGION_OUTBOUND);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int ls1021_pcie_link_up(struct dw_pcie *pci)
|
static int ls1021_pcie_link_up(struct dw_pcie *pci)
|
||||||
|
|
|
@ -440,7 +440,6 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no,
|
||||||
tbl_offset = dw_pcie_readl_dbi(pci, reg);
|
tbl_offset = dw_pcie_readl_dbi(pci, reg);
|
||||||
bir = (tbl_offset & PCI_MSIX_TABLE_BIR);
|
bir = (tbl_offset & PCI_MSIX_TABLE_BIR);
|
||||||
tbl_offset &= PCI_MSIX_TABLE_OFFSET;
|
tbl_offset &= PCI_MSIX_TABLE_OFFSET;
|
||||||
tbl_offset >>= 3;
|
|
||||||
|
|
||||||
reg = PCI_BASE_ADDRESS_0 + (4 * bir);
|
reg = PCI_BASE_ADDRESS_0 + (4 * bir);
|
||||||
bar_addr_upper = 0;
|
bar_addr_upper = 0;
|
||||||
|
|
Loading…
Reference in New Issue