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dt-bindings: serial: lpuart: add ls1028a compatibility 

Add the LS1028A SoC compatibility string to the lpuart devicetree
bindings documentation.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200307091302.14881-1-michael@walle.cc
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Michael Walle 2020-03-07 10:13:01 +01:00 committed by Greg Kroah-Hartman
parent e33253f3b7
commit c75b1fddae
1 changed files with 6 additions and 4 deletions
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10
Documentation/devicetree/bindings/serial/fsl-lpuart.txt
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@ -6,6 +6,8 @@ Required properties:
on Vybrid vf610 SoC with 8-bit register organization
- "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated
on LS1021A SoC with 32-bit big-endian register organization
- "fsl,ls1028a-lpuart" for lpuart compatible with the one integrated
on LS1028A SoC with 32-bit little-endian register organization
- "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated
on i.MX7ULP SoC with 32-bit little-endian register organization
- "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated
@ -15,10 +17,10 @@ Required properties:
- reg : Address and length of the register set for the device
- interrupts : Should contain uart interrupt
- clocks : phandle + clock specifier pairs, one for each entry in clock-names
- clock-names : For vf610/ls1021a/imx7ulp, "ipg" clock is for uart bus/baud
clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used to access
lpuart controller registers, it also requires "baud" clock for module to
receive/transmit data.
- clock-names : For vf610/ls1021a/ls1028a/imx7ulp, "ipg" clock is for uart
bus/baud clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used
to access lpuart controller registers, it also requires "baud" clock for
module to receive/transmit data.
Optional properties:
- dmas: A list of two dma specifiers, one for each entry in dma-names.