Merge branch 'sh_eth-wol'
Niklas Söderlund says: ==================== sh_eth: add wake-on-lan support via magic packet This series adds support for Wake-on-Lan using Magic Packet for a few models of the sh_eth driver. Patch 1/6 fix a naming error, patch 2/6 adds generic support to control and support WoL while patches 3/6 - 6/6 enable different models. Based ontop of net-next master. Changes since v2. - Fix bookkeeping for "active_count" and "event_count" reported in /sys/kernel/debug/wakeup_sources. Thanks Geert for noticing this. - Add new patch 1/6 which corrects the name of ECMR_MPDE bit, suggested by Sergei. - s/sh7743/sh7734/ in patch 5/6. Thanks Geert for spotting this. - Spelling improvements suggested by Sergei and Geert. - Add Tested-by to 3/6 and 4/6. Changes since v1. - Split generic WoL functionality and device enablement to different patches. - Enable more devices then Gen2 after feedback from Geert and datasheets. - Do not set mdp->irq_enabled = false and remove specific MagicPacket interrupt clearing, instead let sh_eth_error() clear the interrupt as for other EMAC interrupts, thanks Sergei for the suggestion. - Use the original return logic in sh_eth_resume(). - Moved sh_eth_private variable *clk to top of data structure to avoid possible gaps due to alignment restrictions. - Make wol_enabled in sh_eth_private part of the already existing bitfield instead of a bool. - Do not initiate mdp->wol_enabled to 0, the struct is kzalloc'ed so it's already set to 0. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
c8584b3fdf
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@ -576,6 +576,7 @@ static struct sh_eth_cpu_data r8a7740_data = {
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.hw_checksum = 1,
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.hw_checksum = 1,
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.tsu = 1,
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.tsu = 1,
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.select_mii = 1,
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.select_mii = 1,
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.magic = 1,
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};
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};
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/* There is CPU dependent code */
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/* There is CPU dependent code */
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@ -622,8 +623,9 @@ static struct sh_eth_cpu_data r8a779x_data = {
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.register_type = SH_ETH_REG_FAST_RCAR,
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.register_type = SH_ETH_REG_FAST_RCAR,
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.ecsr_value = ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
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.ecsr_value = ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD | ECSR_MPD,
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.ecsipr_value = ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
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.ecsipr_value = ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP |
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ECSIPR_MPDIP,
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.eesipr_value = 0x01ff009f,
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.eesipr_value = 0x01ff009f,
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.tx_check = EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
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.tx_check = EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
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@ -638,6 +640,7 @@ static struct sh_eth_cpu_data r8a779x_data = {
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.tpauser = 1,
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.tpauser = 1,
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.hw_swap = 1,
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.hw_swap = 1,
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.rmiimode = 1,
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.rmiimode = 1,
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.magic = 1,
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};
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};
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#endif /* CONFIG_OF */
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#endif /* CONFIG_OF */
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@ -814,6 +817,7 @@ static struct sh_eth_cpu_data sh7734_data = {
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.tsu = 1,
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.tsu = 1,
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.hw_checksum = 1,
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.hw_checksum = 1,
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.select_mii = 1,
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.select_mii = 1,
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.magic = 1,
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};
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};
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/* SH7763 */
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/* SH7763 */
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@ -841,6 +845,7 @@ static struct sh_eth_cpu_data sh7763_data = {
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.no_ade = 1,
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.no_ade = 1,
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.tsu = 1,
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.tsu = 1,
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.irq_flags = IRQF_SHARED,
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.irq_flags = IRQF_SHARED,
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.magic = 1,
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};
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};
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static struct sh_eth_cpu_data sh7619_data = {
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static struct sh_eth_cpu_data sh7619_data = {
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@ -1550,6 +1555,8 @@ static void sh_eth_emac_interrupt(struct net_device *ndev)
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sh_eth_rcv_snd_enable(ndev);
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sh_eth_rcv_snd_enable(ndev);
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}
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}
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}
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}
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if (felic_stat & ECSR_MPD)
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pm_wakeup_event(&mdp->pdev->dev, 0);
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}
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}
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/* error control function */
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/* error control function */
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@ -2199,6 +2206,33 @@ static int sh_eth_set_ringparam(struct net_device *ndev,
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return 0;
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return 0;
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}
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}
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static void sh_eth_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
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{
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struct sh_eth_private *mdp = netdev_priv(ndev);
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wol->supported = 0;
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wol->wolopts = 0;
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if (mdp->cd->magic && mdp->clk) {
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wol->supported = WAKE_MAGIC;
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wol->wolopts = mdp->wol_enabled ? WAKE_MAGIC : 0;
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}
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}
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static int sh_eth_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
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{
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struct sh_eth_private *mdp = netdev_priv(ndev);
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if (!mdp->cd->magic || !mdp->clk || wol->wolopts & ~WAKE_MAGIC)
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return -EOPNOTSUPP;
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mdp->wol_enabled = !!(wol->wolopts & WAKE_MAGIC);
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device_set_wakeup_enable(&mdp->pdev->dev, mdp->wol_enabled);
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return 0;
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}
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static const struct ethtool_ops sh_eth_ethtool_ops = {
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static const struct ethtool_ops sh_eth_ethtool_ops = {
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.get_regs_len = sh_eth_get_regs_len,
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.get_regs_len = sh_eth_get_regs_len,
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.get_regs = sh_eth_get_regs,
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.get_regs = sh_eth_get_regs,
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@ -2213,6 +2247,8 @@ static const struct ethtool_ops sh_eth_ethtool_ops = {
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.set_ringparam = sh_eth_set_ringparam,
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.set_ringparam = sh_eth_set_ringparam,
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.get_link_ksettings = sh_eth_get_link_ksettings,
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.get_link_ksettings = sh_eth_get_link_ksettings,
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.set_link_ksettings = sh_eth_set_link_ksettings,
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.set_link_ksettings = sh_eth_set_link_ksettings,
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.get_wol = sh_eth_get_wol,
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.set_wol = sh_eth_set_wol,
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};
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};
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/* network device open function */
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/* network device open function */
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@ -3015,6 +3051,11 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
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goto out_release;
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goto out_release;
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}
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}
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/* Get clock, if not found that's OK but Wake-On-Lan is unavailable */
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mdp->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(mdp->clk))
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mdp->clk = NULL;
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ndev->base_addr = res->start;
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ndev->base_addr = res->start;
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spin_lock_init(&mdp->lock);
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spin_lock_init(&mdp->lock);
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@ -3109,6 +3150,9 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
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if (ret)
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if (ret)
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goto out_napi_del;
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goto out_napi_del;
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if (mdp->cd->magic && mdp->clk)
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device_set_wakeup_capable(&pdev->dev, 1);
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/* print device information */
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/* print device information */
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netdev_info(ndev, "Base address at 0x%x, %pM, IRQ %d.\n",
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netdev_info(ndev, "Base address at 0x%x, %pM, IRQ %d.\n",
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(u32)ndev->base_addr, ndev->dev_addr, ndev->irq);
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(u32)ndev->base_addr, ndev->dev_addr, ndev->irq);
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@ -3148,15 +3192,67 @@ static int sh_eth_drv_remove(struct platform_device *pdev)
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#ifdef CONFIG_PM
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#ifdef CONFIG_PM
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#ifdef CONFIG_PM_SLEEP
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#ifdef CONFIG_PM_SLEEP
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static int sh_eth_wol_setup(struct net_device *ndev)
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{
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struct sh_eth_private *mdp = netdev_priv(ndev);
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/* Only allow ECI interrupts */
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synchronize_irq(ndev->irq);
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napi_disable(&mdp->napi);
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sh_eth_write(ndev, DMAC_M_ECI, EESIPR);
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/* Enable MagicPacket */
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sh_eth_modify(ndev, ECMR, 0, ECMR_MPDE);
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/* Increased clock usage so device won't be suspended */
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clk_enable(mdp->clk);
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return enable_irq_wake(ndev->irq);
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}
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static int sh_eth_wol_restore(struct net_device *ndev)
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{
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struct sh_eth_private *mdp = netdev_priv(ndev);
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int ret;
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napi_enable(&mdp->napi);
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/* Disable MagicPacket */
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sh_eth_modify(ndev, ECMR, ECMR_MPDE, 0);
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/* The device needs to be reset to restore MagicPacket logic
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* for next wakeup. If we close and open the device it will
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* both be reset and all registers restored. This is what
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* happens during suspend and resume without WoL enabled.
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*/
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ret = sh_eth_close(ndev);
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if (ret < 0)
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return ret;
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ret = sh_eth_open(ndev);
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if (ret < 0)
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return ret;
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/* Restore clock usage count */
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clk_disable(mdp->clk);
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return disable_irq_wake(ndev->irq);
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}
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static int sh_eth_suspend(struct device *dev)
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static int sh_eth_suspend(struct device *dev)
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{
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{
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struct net_device *ndev = dev_get_drvdata(dev);
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struct net_device *ndev = dev_get_drvdata(dev);
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struct sh_eth_private *mdp = netdev_priv(ndev);
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int ret = 0;
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int ret = 0;
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if (netif_running(ndev)) {
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if (!netif_running(ndev))
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netif_device_detach(ndev);
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return 0;
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netif_device_detach(ndev);
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if (mdp->wol_enabled)
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ret = sh_eth_wol_setup(ndev);
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else
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ret = sh_eth_close(ndev);
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ret = sh_eth_close(ndev);
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}
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return ret;
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return ret;
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}
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}
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@ -3164,14 +3260,21 @@ static int sh_eth_suspend(struct device *dev)
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static int sh_eth_resume(struct device *dev)
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static int sh_eth_resume(struct device *dev)
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{
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{
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struct net_device *ndev = dev_get_drvdata(dev);
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struct net_device *ndev = dev_get_drvdata(dev);
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struct sh_eth_private *mdp = netdev_priv(ndev);
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int ret = 0;
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int ret = 0;
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if (netif_running(ndev)) {
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if (!netif_running(ndev))
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return 0;
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if (mdp->wol_enabled)
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ret = sh_eth_wol_restore(ndev);
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else
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ret = sh_eth_open(ndev);
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ret = sh_eth_open(ndev);
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if (ret < 0)
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return ret;
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if (ret < 0)
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netif_device_attach(ndev);
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return ret;
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}
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netif_device_attach(ndev);
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return ret;
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return ret;
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}
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}
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@ -339,7 +339,7 @@ enum FELIC_MODE_BIT {
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ECMR_DPAD = 0x00200000, ECMR_RZPF = 0x00100000,
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ECMR_DPAD = 0x00200000, ECMR_RZPF = 0x00100000,
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ECMR_ZPF = 0x00080000, ECMR_PFR = 0x00040000, ECMR_RXF = 0x00020000,
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ECMR_ZPF = 0x00080000, ECMR_PFR = 0x00040000, ECMR_RXF = 0x00020000,
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ECMR_TXF = 0x00010000, ECMR_MCT = 0x00002000, ECMR_PRCEF = 0x00001000,
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ECMR_TXF = 0x00010000, ECMR_MCT = 0x00002000, ECMR_PRCEF = 0x00001000,
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ECMR_PMDE = 0x00000200, ECMR_RE = 0x00000040, ECMR_TE = 0x00000020,
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ECMR_MPDE = 0x00000200, ECMR_RE = 0x00000040, ECMR_TE = 0x00000020,
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ECMR_RTM = 0x00000010, ECMR_ILB = 0x00000008, ECMR_ELB = 0x00000004,
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ECMR_RTM = 0x00000010, ECMR_ILB = 0x00000008, ECMR_ELB = 0x00000004,
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ECMR_DM = 0x00000002, ECMR_PRM = 0x00000001,
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ECMR_DM = 0x00000002, ECMR_PRM = 0x00000001,
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};
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};
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@ -492,6 +492,7 @@ struct sh_eth_cpu_data {
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unsigned select_mii:1; /* EtherC have RMII_MII (MII select register) */
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unsigned select_mii:1; /* EtherC have RMII_MII (MII select register) */
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unsigned rmiimode:1; /* EtherC has RMIIMODE register */
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unsigned rmiimode:1; /* EtherC has RMIIMODE register */
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unsigned rtrate:1; /* EtherC has RTRATE register */
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unsigned rtrate:1; /* EtherC has RTRATE register */
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unsigned magic:1; /* EtherC has ECMR.MPDE and ECSR.MPD */
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};
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};
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struct sh_eth_private {
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struct sh_eth_private {
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@ -500,6 +501,7 @@ struct sh_eth_private {
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const u16 *reg_offset;
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const u16 *reg_offset;
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void __iomem *addr;
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void __iomem *addr;
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void __iomem *tsu_addr;
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void __iomem *tsu_addr;
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struct clk *clk;
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u32 num_rx_ring;
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u32 num_rx_ring;
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u32 num_tx_ring;
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u32 num_tx_ring;
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dma_addr_t rx_desc_dma;
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dma_addr_t rx_desc_dma;
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@ -528,6 +530,7 @@ struct sh_eth_private {
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unsigned no_ether_link:1;
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unsigned no_ether_link:1;
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unsigned ether_link_active_low:1;
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unsigned ether_link_active_low:1;
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unsigned is_opened:1;
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unsigned is_opened:1;
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unsigned wol_enabled:1;
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};
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};
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static inline void sh_eth_soft_swap(char *src, int len)
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static inline void sh_eth_soft_swap(char *src, int len)
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