v3.10 DT updates for DaVinci

This set of patches adds support for PWMs and SPI
 controller present on DA850 and for SPI flash present on
 DA850 EVM.
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Merge tag 'davinci-for-v3.10/dt-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt2

From Sekhar Nori:
v3.10 DT updates for DaVinci

This set of patches adds support for PWMs and SPI
controller present on DA850 and for SPI flash present on
DA850 EVM.

* tag 'davinci-for-v3.10/dt-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: da850-evm: add SPI flash support
  ARM: davinci: da850: override SPI DT node device name
  ARM: davinci: da850: add SPI1 DT node
  spi/davinci: add DT binding documentation
  spi/davinci: no wildcards in DT compatible property
  ARM: davinci: da850: add EHRPWM & ECAP DT node
  ARM: davinci: da850: override mmc DT node device name
  ARM: davinci: da850: add mmc DT entries
  mmc: davinci_mmc: add DT support
  ARM: davinci: da850: add tps6507x regulator DT data
  ARM: regulator: add tps6507x device tree data
  ARM: davinci: remove test for undefined Kconfig macro
  ARM: davinci: mmc: derive version information from device name
  ARM: davinci: da850: add ECAP & EHRPWM clock nodes
  ARM: davinci: clk framework support for enable/disable functionality

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-04-17 23:50:06 -07:00
commit c8bf98a28f
30 changed files with 523 additions and 44 deletions

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@ -0,0 +1,33 @@
* TI Highspeed MMC host controller for DaVinci
The Highspeed MMC Host Controller on TI DaVinci family
provides an interface for MMC, SD and SDIO types of memory cards.
This file documents the properties used by the davinci_mmc driver.
Required properties:
- compatible:
Should be "ti,da830-mmc": for da830, da850, dm365
Should be "ti,dm355-mmc": for dm355, dm644x
Optional properties:
- bus-width: Number of data lines, can be <1>, <4>, or <8>, default <1>
- max-frequency: Maximum operating clock frequency, default 25MHz.
- dmas: List of DMA specifiers with the controller specific format
as described in the generic DMA client binding. A tx and rx
specifier is required.
- dma-names: RX and TX DMA request names. These strings correspond
1:1 with the DMA specifiers listed in dmas.
Example:
mmc0: mmc@1c40000 {
compatible = "ti,da830-mmc",
reg = <0x40000 0x1000>;
interrupts = <16>;
status = "okay";
bus-width = <4>;
max-frequency = <50000000>;
dmas = <&edma 16
&edma 17>;
dma-names = "rx", "tx";
};

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@ -0,0 +1,51 @@
Davinci SPI controller device bindings
Required properties:
- #address-cells: number of cells required to define a chip select
address on the SPI bus. Should be set to 1.
- #size-cells: should be zero.
- compatible:
- "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
- "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
- reg: Offset and length of SPI controller register space
- num-cs: Number of chip selects
- ti,davinci-spi-intr-line: interrupt line used to connect the SPI
IP to the interrupt controller within the SoC. Possible values
are 0 and 1. Manual says one of the two possible interrupt
lines can be tied to the interrupt controller. Set this
based on a specifc SoC configuration.
- interrupts: interrupt number mapped to CPU.
- clocks: spi clk phandle
Example of a NOR flash slave device (n25q032) connected to DaVinci
SPI controller device over the SPI bus.
spi0:spi@20BF0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "ti,dm6446-spi";
reg = <0x20BF0000 0x1000>;
num-cs = <4>;
ti,davinci-spi-intr-line = <0>;
interrupts = <338>;
clocks = <&clkspi>;
flash: n25q032@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32";
spi-max-frequency = <25000000>;
reg = <0>;
partition@0 {
label = "u-boot-spl";
reg = <0x0 0x80000>;
read-only;
};
partition@1 {
label = "test";
reg = <0x80000 0x380000>;
};
};
};

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@ -35,14 +35,124 @@
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
tps: tps@48 {
reg = <0x48>;
};
};
wdt: wdt@1c21000 {
status = "okay";
};
mmc0: mmc@1c40000 {
max-frequency = <50000000>;
bus-width = <4>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
};
spi1: spi@1f0e000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins &spi1_cs0_pin>;
flash: m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "m25p64";
spi-max-frequency = <30000000>;
reg = <0>;
partition@0 {
label = "U-Boot-SPL";
reg = <0x00000000 0x00010000>;
read-only;
};
partition@1 {
label = "U-Boot";
reg = <0x00010000 0x00080000>;
read-only;
};
partition@2 {
label = "U-Boot-Env";
reg = <0x00090000 0x00010000>;
read-only;
};
partition@3 {
label = "Kernel";
reg = <0x000a0000 0x00280000>;
};
partition@4 {
label = "Filesystem";
reg = <0x00320000 0x00400000>;
};
partition@5 {
label = "MAC-Address";
reg = <0x007f0000 0x00010000>;
read-only;
};
};
};
};
nand_cs3@62000000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nand_cs3_pins>;
};
vbat: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vbat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
};
};
/include/ "tps6507x.dtsi"
&tps {
vdcdc1_2-supply = <&vbat>;
vdcdc3-supply = <&vbat>;
vldo1_2-supply = <&vbat>;
regulators {
vdcdc1_reg: regulator@0 {
regulator-name = "VDCDC1_3.3V";
regulator-min-microvolt = <3150000>;
regulator-max-microvolt = <3450000>;
regulator-always-on;
regulator-boot-on;
};
vdcdc2_reg: regulator@1 {
regulator-name = "VDCDC2_3.3V";
regulator-min-microvolt = <1710000>;
regulator-max-microvolt = <3450000>;
regulator-always-on;
regulator-boot-on;
ti,defdcdc_default = <1>;
};
vdcdc3_reg: regulator@2 {
regulator-name = "VDCDC3_1.2V";
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on;
ti,defdcdc_default = <1>;
};
ldo1_reg: regulator@3 {
regulator-name = "LDO1_1.8V";
regulator-min-microvolt = <1710000>;
regulator-max-microvolt = <1890000>;
regulator-always-on;
regulator-boot-on;
};
ldo2_reg: regulator@4 {
regulator-name = "LDO2_1.2V";
regulator-min-microvolt = <1140000>;
regulator-max-microvolt = <1320000>;
regulator-always-on;
regulator-boot-on;
};
};
};

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@ -62,6 +62,69 @@
0x10 0x00002200 0x0000ff00
>;
};
mmc0_pins: pinmux_mmc_pins {
pinctrl-single,bits = <
/* MMCSD0_DAT[3] MMCSD0_DAT[2]
* MMCSD0_DAT[1] MMCSD0_DAT[0]
* MMCSD0_CMD MMCSD0_CLK
*/
0x28 0x00222222 0x00ffffff
>;
};
ehrpwm0a_pins: pinmux_ehrpwm0a_pins {
pinctrl-single,bits = <
/* EPWM0A */
0xc 0x00000002 0x0000000f
>;
};
ehrpwm0b_pins: pinmux_ehrpwm0b_pins {
pinctrl-single,bits = <
/* EPWM0B */
0xc 0x00000020 0x000000f0
>;
};
ehrpwm1a_pins: pinmux_ehrpwm1a_pins {
pinctrl-single,bits = <
/* EPWM1A */
0x14 0x00000002 0x0000000f
>;
};
ehrpwm1b_pins: pinmux_ehrpwm1b_pins {
pinctrl-single,bits = <
/* EPWM1B */
0x14 0x00000020 0x000000f0
>;
};
ecap0_pins: pinmux_ecap0_pins {
pinctrl-single,bits = <
/* ECAP0_APWM0 */
0x8 0x20000000 0xf0000000
>;
};
ecap1_pins: pinmux_ecap1_pins {
pinctrl-single,bits = <
/* ECAP1_APWM1 */
0x4 0x40000000 0xf0000000
>;
};
ecap2_pins: pinmux_ecap2_pins {
pinctrl-single,bits = <
/* ECAP2_APWM2 */
0x4 0x00000004 0x0000000f
>;
};
spi1_pins: pinmux_spi_pins {
pinctrl-single,bits = <
/* SIMO, SOMI, CLK */
0x14 0x00110100 0x00ff0f00
>;
};
spi1_cs0_pin: pinmux_spi1_cs0 {
pinctrl-single,bits = <
/* CS0 */
0x14 0x00000010 0x000000f0
>;
};
};
serial0: serial@1c42000 {
compatible = "ns16550a";
@ -107,6 +170,52 @@
reg = <0x21000 0x1000>;
status = "disabled";
};
mmc0: mmc@1c40000 {
compatible = "ti,da830-mmc";
reg = <0x40000 0x1000>;
interrupts = <16>;
status = "disabled";
};
ehrpwm0: ehrpwm@01f00000 {
compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x300000 0x2000>;
status = "disabled";
};
ehrpwm1: ehrpwm@01f02000 {
compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x302000 0x2000>;
status = "disabled";
};
ecap0: ecap@01f06000 {
compatible = "ti,da850-ecap", "ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x306000 0x80>;
status = "disabled";
};
ecap1: ecap@01f07000 {
compatible = "ti,da850-ecap", "ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x307000 0x80>;
status = "disabled";
};
ecap2: ecap@01f08000 {
compatible = "ti,da850-ecap", "ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x308000 0x80>;
status = "disabled";
};
spi1: spi@1f0e000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "ti,da830-spi";
reg = <0x30e000 0x1000>;
num-cs = <4>;
ti,davinci-spi-intr-line = <1>;
interrupts = <56>;
status = "disabled";
};
};
nand_cs3@62000000 {
compatible = "ti,davinci-nand";

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@ -0,0 +1,47 @@
/*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/*
* Integrated Power Management Chip
* http://www.ti.com/lit/ds/symlink/tps65070.pdf
*/
&tps {
compatible = "ti,tps6507x";
regulators {
#address-cells = <1>;
#size-cells = <0>;
vdcdc1_reg: regulator@0 {
reg = <0>;
regulator-compatible = "VDCDC1";
};
vdcdc2_reg: regulator@1 {
reg = <1>;
regulator-compatible = "VDCDC2";
};
vdcdc3_reg: regulator@2 {
reg = <2>;
regulator-compatible = "VDCDC3";
};
ldo1_reg: regulator@3 {
reg = <3>;
regulator-compatible = "LDO1";
};
ldo2_reg: regulator@4 {
reg = <4>;
regulator-compatible = "LDO2";
};
};
};

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@ -246,7 +246,6 @@ static struct davinci_mmc_config da830_evm_mmc_config = {
.wires = 8,
.max_freq = 50000000,
.caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
.version = MMC_CTLR_VERSION_2,
};
static inline void da830_evm_init_mmc(void)

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@ -802,7 +802,6 @@ static struct davinci_mmc_config da850_mmc_config = {
.wires = 4,
.max_freq = 50000000,
.caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
.version = MMC_CTLR_VERSION_2,
};
static const short da850_evm_mmcsd0_pins[] __initconst = {
@ -1372,7 +1371,6 @@ static struct davinci_mmc_config da850_wl12xx_mmc_config = {
.max_freq = 25000000,
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_NONREMOVABLE |
MMC_CAP_POWER_OFF_CARD,
.version = MMC_CTLR_VERSION_2,
};
static const short da850_wl12xx_pins[] __initconst = {

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@ -280,7 +280,6 @@ static struct davinci_mmc_config dm355evm_mmc_config = {
.wires = 4,
.max_freq = 50000000,
.caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
.version = MMC_CTLR_VERSION_1,
};
/* Don't connect anything to J10 unless you're only using USB host

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@ -253,7 +253,6 @@ static struct davinci_mmc_config dm365evm_mmc_config = {
.wires = 4,
.max_freq = 50000000,
.caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
.version = MMC_CTLR_VERSION_2,
};
static void dm365evm_emac_configure(void)

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@ -570,7 +570,6 @@ static struct davinci_mmc_config dm6446evm_mmc_config = {
.get_cd = dm6444evm_mmc_get_cd,
.get_ro = dm6444evm_mmc_get_ro,
.wires = 4,
.version = MMC_CTLR_VERSION_1
};
static struct i2c_board_info __initdata i2c_info[] = {

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@ -164,7 +164,6 @@ static void __init davinci_ntosd2_map_io(void)
static struct davinci_mmc_config davinci_ntosd2_mmc_config = {
.wires = 4,
.version = MMC_CTLR_VERSION_1
};

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@ -136,7 +136,6 @@ static struct davinci_mmc_config da850_mmc_config = {
.wires = 4,
.max_freq = 50000000,
.caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
.version = MMC_CTLR_VERSION_2,
};
static __init void omapl138_hawk_mmc_init(void)

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@ -85,7 +85,6 @@ static struct davinci_mmc_config mmc_config = {
.wires = 4,
.max_freq = 50000000,
.caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
.version = MMC_CTLR_VERSION_1,
};
static const short sdio1_pins[] __initconst = {

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@ -35,19 +35,26 @@ static void __clk_enable(struct clk *clk)
{
if (clk->parent)
__clk_enable(clk->parent);
if (clk->usecount++ == 0 && (clk->flags & CLK_PSC))
davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
true, clk->flags);
if (clk->usecount++ == 0) {
if (clk->flags & CLK_PSC)
davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
true, clk->flags);
else if (clk->clk_enable)
clk->clk_enable(clk);
}
}
static void __clk_disable(struct clk *clk)
{
if (WARN_ON(clk->usecount == 0))
return;
if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) &&
(clk->flags & CLK_PSC))
davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
false, clk->flags);
if (--clk->usecount == 0) {
if (!(clk->flags & CLK_PLL) && (clk->flags & CLK_PSC))
davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
false, clk->flags);
else if (clk->clk_disable)
clk->clk_disable(clk);
}
if (clk->parent)
__clk_disable(clk->parent);
}

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@ -104,6 +104,8 @@ struct clk {
int (*set_rate) (struct clk *clk, unsigned long rate);
int (*round_rate) (struct clk *clk, unsigned long rate);
int (*reset) (struct clk *clk, bool reset);
void (*clk_enable) (struct clk *clk);
void (*clk_disable) (struct clk *clk);
};
/* Clock flags: SoC-specific flags start at BIT(16) */

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@ -394,7 +394,7 @@ static struct clk_lookup da830_clks[] = {
CLK(NULL, "tpcc", &tpcc_clk),
CLK(NULL, "tptc0", &tptc0_clk),
CLK(NULL, "tptc1", &tptc1_clk),
CLK("davinci_mmc.0", NULL, &mmcsd_clk),
CLK("da830-mmc.0", NULL, &mmcsd_clk),
CLK(NULL, "uart0", &uart0_clk),
CLK(NULL, "uart1", &uart1_clk),
CLK(NULL, "uart2", &uart2_clk),

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@ -383,6 +383,49 @@ static struct clk dsp_clk = {
.flags = PSC_LRST | PSC_FORCE,
};
static struct clk ehrpwm_clk = {
.name = "ehrpwm",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_PWM,
.gpsc = 1,
.flags = DA850_CLK_ASYNC3,
};
#define DA8XX_EHRPWM_TBCLKSYNC BIT(12)
static void ehrpwm_tblck_enable(struct clk *clk)
{
u32 val;
val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
val |= DA8XX_EHRPWM_TBCLKSYNC;
writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
}
static void ehrpwm_tblck_disable(struct clk *clk)
{
u32 val;
val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
val &= ~DA8XX_EHRPWM_TBCLKSYNC;
writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
}
static struct clk ehrpwm_tbclk = {
.name = "ehrpwm_tbclk",
.parent = &ehrpwm_clk,
.clk_enable = ehrpwm_tblck_enable,
.clk_disable = ehrpwm_tblck_disable,
};
static struct clk ecap_clk = {
.name = "ecap",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_ECAP,
.gpsc = 1,
.flags = DA850_CLK_ASYNC3,
};
static struct clk_lookup da850_clks[] = {
CLK(NULL, "ref", &ref_clk),
CLK(NULL, "pll0", &pll0_clk),
@ -420,8 +463,8 @@ static struct clk_lookup da850_clks[] = {
CLK("davinci_emac.1", NULL, &emac_clk),
CLK("davinci-mcasp.0", NULL, &mcasp_clk),
CLK("da8xx_lcdc.0", "fck", &lcdc_clk),
CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
CLK("da830-mmc.0", NULL, &mmcsd0_clk),
CLK("da830-mmc.1", NULL, &mmcsd1_clk),
CLK(NULL, "aemif", &aemif_clk),
CLK(NULL, "usb11", &usb11_clk),
CLK(NULL, "usb20", &usb20_clk),
@ -430,6 +473,9 @@ static struct clk_lookup da850_clks[] = {
CLK("vpif", NULL, &vpif_clk),
CLK("ahci", NULL, &sata_clk),
CLK("davinci-rproc.0", NULL, &dsp_clk),
CLK("ehrpwm", "fck", &ehrpwm_clk),
CLK("ehrpwm", "tbclk", &ehrpwm_tbclk),
CLK("ecap", "fck", &ecap_clk),
CLK(NULL, NULL, NULL),
};

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@ -40,6 +40,13 @@ static void __init da8xx_init_irq(void)
struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("ti,davinci-i2c", 0x01c22000, "i2c_davinci.1", NULL),
OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "watchdog", NULL),
OF_DEV_AUXDATA("ti,da830-mmc", 0x01c40000, "da830-mmc.0", NULL),
OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f00000, "ehrpwm", NULL),
OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f02000, "ehrpwm", NULL),
OF_DEV_AUXDATA("ti,da850-ecap", 0x01f06000, "ecap", NULL),
OF_DEV_AUXDATA("ti,da850-ecap", 0x01f07000, "ecap", NULL),
OF_DEV_AUXDATA("ti,da850-ecap", 0x01f08000, "ecap", NULL),
OF_DEV_AUXDATA("ti,da830-spi", 0x01f0e000, "spi_davinci.1", NULL),
{}
};

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@ -664,7 +664,7 @@ static struct resource da8xx_mmcsd0_resources[] = {
};
static struct platform_device da8xx_mmcsd0_device = {
.name = "davinci_mmc",
.name = "da830-mmc",
.id = 0,
.num_resources = ARRAY_SIZE(da8xx_mmcsd0_resources),
.resource = da8xx_mmcsd0_resources,
@ -701,7 +701,7 @@ static struct resource da850_mmcsd1_resources[] = {
};
static struct platform_device da850_mmcsd1_device = {
.name = "davinci_mmc",
.name = "da830-mmc",
.id = 1,
.num_resources = ARRAY_SIZE(da850_mmcsd1_resources),
.resource = da850_mmcsd1_resources,

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@ -218,7 +218,7 @@ static u64 mmc1_dma_mask = DMA_BIT_MASK(32);
static struct platform_device mmc_devices[2] = {
{
.name = "davinci_mmc",
.name = "dm6441-mmc",
.id = 0,
.dev = {
.dma_mask = &mmc0_dma_mask,
@ -228,7 +228,7 @@ static struct platform_device mmc_devices[2] = {
.resource = mmc0_resources
},
{
.name = "davinci_mmc",
.name = "dm6441-mmc",
.id = 1,
.dev = {
.dma_mask = &mmc1_dma_mask,

View File

@ -150,7 +150,7 @@ static struct resource mmcsd0_resources[] = {
};
static struct platform_device davinci_mmcsd0_device = {
.name = "davinci_mmc",
.name = "dm6441-mmc",
.id = 0,
.dev = {
.dma_mask = &mmcsd0_dma_mask,
@ -187,7 +187,7 @@ static struct resource mmcsd1_resources[] = {
};
static struct platform_device davinci_mmcsd1_device = {
.name = "davinci_mmc",
.name = "dm6441-mmc",
.id = 1,
.dev = {
.dma_mask = &mmcsd1_dma_mask,
@ -235,6 +235,7 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
SZ_4K - 1;
mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
davinci_mmcsd1_device.name = "da830-mmc";
} else
break;
@ -256,6 +257,7 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
SZ_4K - 1;
mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
davinci_mmcsd0_device.name = "da830-mmc";
} else if (cpu_is_davinci_dm644x()) {
/* REVISIT: should this be in board-init code? */
/* Power-on 3.3V IO cells */

View File

@ -361,8 +361,8 @@ static struct clk_lookup dm355_clks[] = {
CLK("i2c_davinci.1", NULL, &i2c_clk),
CLK("davinci-mcbsp.0", NULL, &asp0_clk),
CLK("davinci-mcbsp.1", NULL, &asp1_clk),
CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
CLK("dm6441-mmc.0", NULL, &mmcsd0_clk),
CLK("dm6441-mmc.1", NULL, &mmcsd1_clk),
CLK("spi_davinci.0", NULL, &spi0_clk),
CLK("spi_davinci.1", NULL, &spi1_clk),
CLK("spi_davinci.2", NULL, &spi2_clk),

View File

@ -454,8 +454,8 @@ static struct clk_lookup dm365_clks[] = {
CLK(NULL, "uart0", &uart0_clk),
CLK(NULL, "uart1", &uart1_clk),
CLK("i2c_davinci.1", NULL, &i2c_clk),
CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
CLK("da830-mmc.0", NULL, &mmcsd0_clk),
CLK("da830-mmc.1", NULL, &mmcsd1_clk),
CLK("spi_davinci.0", NULL, &spi0_clk),
CLK("spi_davinci.1", NULL, &spi1_clk),
CLK("spi_davinci.2", NULL, &spi2_clk),

View File

@ -310,7 +310,7 @@ static struct clk_lookup dm644x_clks[] = {
CLK("i2c_davinci.1", NULL, &i2c_clk),
CLK("palm_bk3710", NULL, &ide_clk),
CLK("davinci-mcbsp", NULL, &asp_clk),
CLK("davinci_mmc.0", NULL, &mmcsd_clk),
CLK("dm6441-mmc.0", NULL, &mmcsd_clk),
CLK(NULL, "spi", &spi_clk),
CLK(NULL, "gpio", &gpio_clk),
CLK(NULL, "usb", &usb_clk),

View File

@ -55,6 +55,7 @@ extern unsigned int da850_max_speed;
#define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x))
#define DA8XX_JTAG_ID_REG 0x18
#define DA8XX_CFGCHIP0_REG 0x17c
#define DA8XX_CFGCHIP1_REG 0x180
#define DA8XX_CFGCHIP2_REG 0x184
#define DA8XX_CFGCHIP3_REG 0x188

View File

@ -24,8 +24,6 @@
#if defined(CONFIG_DEBUG_DAVINCI_DMx_UART0)
#define UART_BASE DAVINCI_UART0_BASE
#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART0)
#define UART_BASE DA8XX_UART0_BASE
#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART1)
#define UART_BASE DA8XX_UART1_BASE
#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART2)

View File

@ -272,7 +272,7 @@ static struct clk_lookup clks[] = {
CLK("tnetv107x-keypad.0", NULL, &clk_keypad),
CLK(NULL, "clk_gpio", &clk_gpio),
CLK(NULL, "clk_mdio", &clk_mdio),
CLK("davinci_mmc.0", NULL, &clk_sdio0),
CLK("dm6441-mmc.0", NULL, &clk_sdio0),
CLK(NULL, "uart0", &clk_uart0),
CLK(NULL, "uart1", &clk_uart1),
CLK(NULL, "timer0", &clk_timer0),
@ -292,7 +292,7 @@ static struct clk_lookup clks[] = {
CLK(NULL, "clk_system", &clk_system),
CLK(NULL, "clk_imcop", &clk_imcop),
CLK(NULL, "clk_spare", &clk_spare),
CLK("davinci_mmc.1", NULL, &clk_sdio1),
CLK("dm6441-mmc.1", NULL, &clk_sdio1),
CLK(NULL, "clk_ddr2_vrst", &clk_ddr2_vrst),
CLK(NULL, "clk_ddr2_vctl_rst", &clk_ddr2_vctl_rst),
CLK(NULL, NULL, NULL),

View File

@ -34,6 +34,8 @@
#include <linux/dma-mapping.h>
#include <linux/edma.h>
#include <linux/mmc/mmc.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_data/mmc-davinci.h>
@ -522,14 +524,16 @@ static int __init davinci_acquire_dma_channels(struct mmc_davinci_host *host)
dma_cap_set(DMA_SLAVE, mask);
host->dma_tx =
dma_request_channel(mask, edma_filter_fn, &host->txdma);
dma_request_slave_channel_compat(mask, edma_filter_fn,
&host->txdma, mmc_dev(host->mmc), "tx");
if (!host->dma_tx) {
dev_err(mmc_dev(host->mmc), "Can't get dma_tx channel\n");
return -ENODEV;
}
host->dma_rx =
dma_request_channel(mask, edma_filter_fn, &host->rxdma);
dma_request_slave_channel_compat(mask, edma_filter_fn,
&host->rxdma, mmc_dev(host->mmc), "rx");
if (!host->dma_rx) {
dev_err(mmc_dev(host->mmc), "Can't get dma_rx channel\n");
r = -ENODEV;
@ -1157,16 +1161,86 @@ static void __init init_mmcsd_host(struct mmc_davinci_host *host)
mmc_davinci_reset_ctrl(host, 0);
}
static struct platform_device_id davinci_mmc_devtype[] = {
{
.name = "dm6441-mmc",
.driver_data = MMC_CTLR_VERSION_1,
}, {
.name = "da830-mmc",
.driver_data = MMC_CTLR_VERSION_2,
},
{},
};
MODULE_DEVICE_TABLE(platform, davinci_mmc_devtype);
static const struct of_device_id davinci_mmc_dt_ids[] = {
{
.compatible = "ti,dm6441-mmc",
.data = &davinci_mmc_devtype[MMC_CTLR_VERSION_1],
},
{
.compatible = "ti,da830-mmc",
.data = &davinci_mmc_devtype[MMC_CTLR_VERSION_2],
},
{},
};
MODULE_DEVICE_TABLE(of, davinci_mmc_dt_ids);
static struct davinci_mmc_config
*mmc_parse_pdata(struct platform_device *pdev)
{
struct device_node *np;
struct davinci_mmc_config *pdata = pdev->dev.platform_data;
const struct of_device_id *match =
of_match_device(of_match_ptr(davinci_mmc_dt_ids), &pdev->dev);
u32 data;
np = pdev->dev.of_node;
if (!np)
return pdata;
pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata) {
dev_err(&pdev->dev, "Failed to allocate memory for struct davinci_mmc_config\n");
goto nodata;
}
if (match)
pdev->id_entry = match->data;
if (of_property_read_u32(np, "max-frequency", &pdata->max_freq))
dev_info(&pdev->dev, "'max-frequency' property not specified, defaulting to 25MHz\n");
of_property_read_u32(np, "bus-width", &data);
switch (data) {
case 1:
case 4:
case 8:
pdata->wires = data;
break;
default:
pdata->wires = 1;
dev_info(&pdev->dev, "Unsupported buswidth, defaulting to 1 bit\n");
}
nodata:
return pdata;
}
static int __init davinci_mmcsd_probe(struct platform_device *pdev)
{
struct davinci_mmc_config *pdata = pdev->dev.platform_data;
struct davinci_mmc_config *pdata = NULL;
struct mmc_davinci_host *host = NULL;
struct mmc_host *mmc = NULL;
struct resource *r, *mem = NULL;
int ret = 0, irq = 0;
size_t mem_size;
const struct platform_device_id *id_entry;
/* REVISIT: when we're fully converted, fail if pdata is NULL */
pdata = mmc_parse_pdata(pdev);
if (pdata == NULL) {
dev_err(&pdev->dev, "Couldn't get platform data\n");
return -ENOENT;
}
ret = -ENODEV;
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@ -1237,7 +1311,9 @@ static int __init davinci_mmcsd_probe(struct platform_device *pdev)
if (pdata && (pdata->wires == 8))
mmc->caps |= (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA);
host->version = pdata->version;
id_entry = platform_get_device_id(pdev);
if (id_entry)
host->version = id_entry->driver_data;
mmc->ops = &mmc_davinci_ops;
mmc->f_min = 312500;
@ -1406,8 +1482,10 @@ static struct platform_driver davinci_mmcsd_driver = {
.name = "davinci_mmc",
.owner = THIS_MODULE,
.pm = davinci_mmcsd_pm_ops,
.of_match_table = of_match_ptr(davinci_mmc_dt_ids),
},
.remove = __exit_p(davinci_mmcsd_remove),
.id_table = davinci_mmc_devtype,
};
static int __init davinci_mmcsd_init(void)

View File

@ -776,10 +776,10 @@ rx_dma_failed:
#if defined(CONFIG_OF)
static const struct of_device_id davinci_spi_of_match[] = {
{
.compatible = "ti,dm644x-spi",
.compatible = "ti,dm6441-spi",
},
{
.compatible = "ti,da8xx-spi",
.compatible = "ti,da830-spi",
.data = (void *)SPI_VERSION_2,
},
{ },

View File

@ -23,9 +23,6 @@ struct davinci_mmc_config {
/* any additional host capabilities: OR'd in to mmc->f_caps */
u32 caps;
/* Version of the MMC/SD controller */
u8 version;
/* Number of sg segments */
u8 nr_sg;
};