[IB] mthca: Always re-arm EQs in mthca_tavor_interrupt()
We should always re-arm an event queue's interrupt in mthca_tavor_interrupt() if the corresponding bit is set in the event cause register (ECR), even if we didn't find any entries in the EQ. If we don't, then there's a window where we miss an EQ entry and then get stuck because we don't get another EQ event. Signed-off-by: Roland Dreier <rolandd@cisco.com>
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@ -396,20 +396,21 @@ static irqreturn_t mthca_tavor_interrupt(int irq, void *dev_ptr, struct pt_regs
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writel(dev->eq_table.clr_mask, dev->eq_table.clr_int);
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ecr = readl(dev->eq_regs.tavor.ecr_base + 4);
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if (ecr) {
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writel(ecr, dev->eq_regs.tavor.ecr_base +
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MTHCA_ECR_CLR_BASE - MTHCA_ECR_BASE + 4);
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if (!ecr)
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return IRQ_NONE;
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for (i = 0; i < MTHCA_NUM_EQ; ++i)
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if (ecr & dev->eq_table.eq[i].eqn_mask &&
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mthca_eq_int(dev, &dev->eq_table.eq[i])) {
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writel(ecr, dev->eq_regs.tavor.ecr_base +
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MTHCA_ECR_CLR_BASE - MTHCA_ECR_BASE + 4);
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for (i = 0; i < MTHCA_NUM_EQ; ++i)
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if (ecr & dev->eq_table.eq[i].eqn_mask) {
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if (mthca_eq_int(dev, &dev->eq_table.eq[i]))
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tavor_set_eq_ci(dev, &dev->eq_table.eq[i],
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dev->eq_table.eq[i].cons_index);
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tavor_eq_req_not(dev, dev->eq_table.eq[i].eqn);
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}
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}
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tavor_eq_req_not(dev, dev->eq_table.eq[i].eqn);
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}
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return IRQ_RETVAL(ecr);
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return IRQ_HANDLED;
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}
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static irqreturn_t mthca_tavor_msi_x_interrupt(int irq, void *eq_ptr,
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