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IB/mlx5: Fix post send fence logic 

If the caller specified IB_SEND_FENCE in the send flags of the work
request and no previous work request stated that the successive one
should be fenced, the work request would be executed without a fence.
This could result in RDMA read or atomic operations failure due to a MR
being invalidated. Fix this by adding the mlx5 enumeration for fencing
RDMA/atomic operations and fix the logic to apply this.

Fixes: e126ba97db ('mlx5: Add driver for Mellanox Connect-IB adapters')
Signed-off-by: Eli Cohen <eli@mellanox.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Signed-off-by: Doug Ledford <dledford@redhat.com>
This commit is contained in:
Eli Cohen 2016-06-22 17:27:26 +03:00 committed by Doug Ledford
parent b57141c1ab
commit c9b254955b
2 changed files with 5 additions and 3 deletions
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7
drivers/infiniband/hw/mlx5/qp.c
View File

@ -3332,10 +3332,11 @@ static u8 get_fence(u8 fence, struct ib_send_wr *wr)
return MLX5_FENCE_MODE_SMALL_AND_FENCE;
else
return fence;
} else {
return 0;
} else if (unlikely(wr->send_flags & IB_SEND_FENCE)) {
return MLX5_FENCE_MODE_FENCE;
}
return 0;
}
static int begin_wqe(struct mlx5_ib_qp *qp, void **seg,

1
include/linux/mlx5/qp.h
View File

@ -172,6 +172,7 @@ enum {
enum {
MLX5_FENCE_MODE_NONE = 0 << 5,
MLX5_FENCE_MODE_INITIATOR_SMALL = 1 << 5,
MLX5_FENCE_MODE_FENCE = 2 << 5,
MLX5_FENCE_MODE_STRONG_ORDERING = 3 << 5,
MLX5_FENCE_MODE_SMALL_AND_FENCE = 4 << 5,
};