ath9k: Process FATAL interrupts at first
FATAL and WATCHDOG interrupts should be processed first followed by others. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -494,17 +494,6 @@ irqreturn_t ath_isr(int irq, void *dev)
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if (status & SCHED_INTR)
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if (status & SCHED_INTR)
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sched = true;
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sched = true;
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#ifdef CONFIG_PM_SLEEP
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if (status & ATH9K_INT_BMISS) {
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if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
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ath_dbg(common, ANY, "during WoW we got a BMISS\n");
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atomic_inc(&sc->wow_got_bmiss_intr);
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atomic_dec(&sc->wow_sleep_proc_intr);
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}
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ath_dbg(common, INTERRUPT, "beacon miss interrupt\n");
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}
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#endif
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/*
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/*
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* If a FATAL or RXORN interrupt is received, we have to reset the
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* If a FATAL or RXORN interrupt is received, we have to reset the
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* chip immediately.
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* chip immediately.
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@ -523,7 +512,15 @@ irqreturn_t ath_isr(int irq, void *dev)
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goto chip_reset;
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goto chip_reset;
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}
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}
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#ifdef CONFIG_PM_SLEEP
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if (status & ATH9K_INT_BMISS) {
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if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
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ath_dbg(common, ANY, "during WoW we got a BMISS\n");
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atomic_inc(&sc->wow_got_bmiss_intr);
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atomic_dec(&sc->wow_sleep_proc_intr);
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}
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}
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#endif
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if (status & ATH9K_INT_SWBA)
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if (status & ATH9K_INT_SWBA)
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tasklet_schedule(&sc->bcon_tasklet);
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tasklet_schedule(&sc->bcon_tasklet);
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