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mfd: hi655x: Add document for hi665x PMIC 

DT bindings for hisilicon HI655x PMIC chip.

Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Signed-off-by: Fei Wang <w.f@huawei.com>
Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com>
Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
Chen Feng 2016-02-14 14:29:19 +08:00 committed by Lee Jones
parent 7825dc0560
commit cbdd535d94
1 changed files with 27 additions and 0 deletions
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Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt Normal file
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Hisilicon Hi655x Power Management Integrated Circuit (PMIC)
The hardware layout for access PMIC Hi655x from AP SoC Hi6220.
Between PMIC Hi655x and Hi6220, the physical signal channel is SSI.
We can use memory-mapped I/O to communicate.
+----------------+ +-------------+
| | | |
| Hi6220 | SSI bus | Hi655x |
| |-------------| |
| |(REGMAP_MMIO)| |
+----------------+ +-------------+
Required properties:
- compatible: Should be "hisilicon,hi655x-pmic".
- reg: Base address of PMIC on Hi6220 SoC.
- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain).
- pmic-gpios: The GPIO used by PMIC IRQ.
Example:
pmic: pmic@f8000000 {
compatible = "hisilicon,hi655x-pmic";
reg = <0x0 0xf8000000 0x0 0x1000>;
interrupt-controller;
#interrupt-cells = <2>;
pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
}