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[POWERPC] 8xx: Fix CONFIG_PIN_TLB. 

1. Move CONSISTENT_START on 8xx so that it doesn't overlap the IMMR mapping.
2. The wrong register was being loaded into SPRN_MD_RPN.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Scott Wood 2007-07-16 11:28:18 -05:00 committed by Kumar Gala
parent d948a29ea7
commit ccf0d68e83
2 changed files with 3 additions and 2 deletions
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1
arch/powerpc/Kconfig
View File

@ -600,6 +600,7 @@ config CONSISTENT_START_BOOL
config CONSISTENT_START
hex "Base virtual address of consistent memory pool" if CONSISTENT_START_BOOL
default "0xfd000000" if (NOT_COHERENT_CACHE && 8xx)
default "0xff100000" if NOT_COHERENT_CACHE
config CONSISTENT_SIZE_BOOL

4
arch/powerpc/kernel/head_8xx.S
View File

@ -727,13 +727,13 @@ initial_mmu:
mtspr SPRN_MD_TWC, r9
li r11, MI_BOOTINIT /* Create RPN for address 0 */
addis r11, r11, 0x0080 /* Add 8M */
mtspr SPRN_MD_RPN, r8
mtspr SPRN_MD_RPN, r11
addis r8, r8, 0x0080 /* Add 8M */
mtspr SPRN_MD_EPN, r8
mtspr SPRN_MD_TWC, r9
addis r11, r11, 0x0080 /* Add 8M */
mtspr SPRN_MD_RPN, r8
mtspr SPRN_MD_RPN, r11
#endif
/* Since the cache is enabled according to the information we