OpenE2K
/
linux
6
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

i40e: add interrupt test 

Add a quick ethtool test for interrupts using the SW interrupt.
Also, change the loopback test (for now) to not report failure.

Change-Id: Id8ef154b82475e3163087a8d1df01dfec4d529fc
Signed-off-by: Shannon Nelson <shannon.nelson@intel.com>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Shannon Nelson 2013-11-16 10:00:44 +00:00 committed by Jeff Kirsher
parent 2759997b0c
commit cd92e72f2d
3 changed files with 14 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/net/ethernet/intel/i40e/i40e.h
View File

@ -250,6 +250,7 @@ struct i40e_pf {
u16 globr_count; /* Global reset count */
u16 empr_count; /* EMP reset count */
u16 pfr_count; /* PF reset count */
u16 sw_int_count; /* SW interrupt count */
struct mutex switch_mutex;
u16 lan_vsi; /* our default LAN VSI */

10
drivers/net/ethernet/intel/i40e/i40e_ethtool.c
View File

@ -734,14 +734,20 @@ static int i40e_eeprom_test(struct i40e_pf *pf, u64 *data)
static int i40e_intr_test(struct i40e_pf *pf, u64 *data)
{
*data = -ENOSYS;
u16 swc_old = pf->sw_int_count;
wr32(&pf->hw, I40E_PFINT_DYN_CTL0,
(I40E_PFINT_DYN_CTL0_INTENA_MASK |
I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK));
usleep_range(1000, 2000);
*data = (swc_old == pf->sw_int_count);
return *data;
}
static int i40e_loopback_test(struct i40e_pf *pf, u64 *data)
{
*data = -ENOSYS;
*data = 0;
return *data;
}

5
drivers/net/ethernet/intel/i40e/i40e_main.c
View File

@ -2752,6 +2752,11 @@ static irqreturn_t i40e_intr(int irq, void *data)
ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
/* if interrupt but no bits showing, must be SWINT */
if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
(icr0 & I40E_PFINT_ICR0_SWINT_MASK))
pf->sw_int_count++;
/* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {