clk: sunxi-ng: add support for PRCM CCUs
SoCs after A31 has a clock controller module in the PRCM part. Support the clock controller module on H3/5 and A64 now. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
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d4879bda91
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cdb8b80b60
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@ -150,4 +150,10 @@ config SUN9I_A80_CCU
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default MACH_SUN9I
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depends on MACH_SUN9I || COMPILE_TEST
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config SUN8I_R_CCU
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bool "Support for Allwinner SoCs' PRCM CCUs"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_GATE
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default MACH_SUN8I || (ARCH_SUNXI && ARM64)
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endif
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@ -25,6 +25,7 @@ obj-$(CONFIG_SUN8I_A23_CCU) += ccu-sun8i-a23.o
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obj-$(CONFIG_SUN8I_A33_CCU) += ccu-sun8i-a33.o
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obj-$(CONFIG_SUN8I_H3_CCU) += ccu-sun8i-h3.o
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obj-$(CONFIG_SUN8I_V3S_CCU) += ccu-sun8i-v3s.o
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obj-$(CONFIG_SUN8I_R_CCU) += ccu-sun8i-r.o
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obj-$(CONFIG_SUN9I_A80_CCU) += ccu-sun9i-a80.o
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obj-$(CONFIG_SUN9I_A80_CCU) += ccu-sun9i-a80-de.o
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obj-$(CONFIG_SUN9I_A80_CCU) += ccu-sun9i-a80-usb.o
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@ -0,0 +1,213 @@
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/*
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* Copyright (c) 2016 Icenowy Zheng <icenowy@aosc.xyz>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk-provider.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include "ccu_common.h"
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#include "ccu_reset.h"
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#include "ccu_div.h"
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#include "ccu_gate.h"
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#include "ccu_mp.h"
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#include "ccu_nm.h"
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#include "ccu-sun8i-r.h"
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static const char * const ar100_parents[] = { "osc32k", "osc24M",
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"pll-periph0", "iosc" };
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static struct ccu_div ar100_clk = {
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.div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
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.mux = {
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.shift = 16,
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.width = 2,
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.variable_prediv = {
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.index = 2,
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.shift = 8,
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.width = 5,
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},
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},
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.common = {
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.reg = 0x00,
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.features = CCU_FEATURE_VARIABLE_PREDIV,
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.hw.init = CLK_HW_INIT_PARENTS("ar100",
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ar100_parents,
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&ccu_div_ops,
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0),
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},
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};
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static CLK_FIXED_FACTOR(ahb0_clk, "ahb0", "ar100", 1, 1, 0);
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static struct ccu_div apb0_clk = {
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.div = _SUNXI_CCU_DIV_FLAGS(0, 2, CLK_DIVIDER_POWER_OF_TWO),
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.common = {
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.reg = 0x0c,
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.hw.init = CLK_HW_INIT("apb0",
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"ahb0",
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&ccu_div_ops,
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0),
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},
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};
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static SUNXI_CCU_GATE(apb0_pio_clk, "apb0-pio", "apb0",
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0x28, BIT(0), 0);
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static SUNXI_CCU_GATE(apb0_ir_clk, "apb0-ir", "apb0",
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0x28, BIT(1), 0);
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static SUNXI_CCU_GATE(apb0_timer_clk, "apb0-timer", "apb0",
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0x28, BIT(2), 0);
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static SUNXI_CCU_GATE(apb0_rsb_clk, "apb0-rsb", "apb0",
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0x28, BIT(3), 0);
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static SUNXI_CCU_GATE(apb0_uart_clk, "apb0-uart", "apb0",
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0x28, BIT(4), 0);
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static SUNXI_CCU_GATE(apb0_i2c_clk, "apb0-i2c", "apb0",
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0x28, BIT(6), 0);
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static SUNXI_CCU_GATE(apb0_twd_clk, "apb0-twd", "apb0",
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0x28, BIT(7), 0);
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static const char * const r_mod0_default_parents[] = { "osc32K", "osc24M" };
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static SUNXI_CCU_MP_WITH_MUX_GATE(ir_clk, "ir",
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r_mod0_default_parents, 0x54,
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0, 4, /* M */
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16, 2, /* P */
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24, 2, /* mux */
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BIT(31), /* gate */
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0);
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static struct ccu_common *sun8i_h3_r_ccu_clks[] = {
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&ar100_clk.common,
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&apb0_clk.common,
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&apb0_pio_clk.common,
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&apb0_ir_clk.common,
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&apb0_timer_clk.common,
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&apb0_uart_clk.common,
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&apb0_i2c_clk.common,
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&apb0_twd_clk.common,
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&ir_clk.common,
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};
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static struct ccu_common *sun50i_a64_r_ccu_clks[] = {
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&ar100_clk.common,
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&apb0_clk.common,
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&apb0_pio_clk.common,
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&apb0_ir_clk.common,
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&apb0_timer_clk.common,
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&apb0_rsb_clk.common,
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&apb0_uart_clk.common,
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&apb0_i2c_clk.common,
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&apb0_twd_clk.common,
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&ir_clk.common,
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};
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static struct clk_hw_onecell_data sun8i_h3_r_hw_clks = {
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.hws = {
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[CLK_AR100] = &ar100_clk.common.hw,
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[CLK_AHB0] = &ahb0_clk.hw,
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[CLK_APB0] = &apb0_clk.common.hw,
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[CLK_APB0_PIO] = &apb0_pio_clk.common.hw,
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[CLK_APB0_IR] = &apb0_ir_clk.common.hw,
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[CLK_APB0_TIMER] = &apb0_timer_clk.common.hw,
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[CLK_APB0_UART] = &apb0_uart_clk.common.hw,
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[CLK_APB0_I2C] = &apb0_i2c_clk.common.hw,
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[CLK_APB0_TWD] = &apb0_twd_clk.common.hw,
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[CLK_IR] = &ir_clk.common.hw,
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},
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.num = CLK_NUMBER,
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};
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static struct clk_hw_onecell_data sun50i_a64_r_hw_clks = {
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.hws = {
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[CLK_AR100] = &ar100_clk.common.hw,
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[CLK_AHB0] = &ahb0_clk.hw,
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[CLK_APB0] = &apb0_clk.common.hw,
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[CLK_APB0_PIO] = &apb0_pio_clk.common.hw,
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[CLK_APB0_IR] = &apb0_ir_clk.common.hw,
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[CLK_APB0_TIMER] = &apb0_timer_clk.common.hw,
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[CLK_APB0_RSB] = &apb0_rsb_clk.common.hw,
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[CLK_APB0_UART] = &apb0_uart_clk.common.hw,
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[CLK_APB0_I2C] = &apb0_i2c_clk.common.hw,
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[CLK_APB0_TWD] = &apb0_twd_clk.common.hw,
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[CLK_IR] = &ir_clk.common.hw,
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},
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.num = CLK_NUMBER,
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};
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static struct ccu_reset_map sun8i_h3_r_ccu_resets[] = {
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[RST_APB0_IR] = { 0xb0, BIT(1) },
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[RST_APB0_TIMER] = { 0xb0, BIT(2) },
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[RST_APB0_UART] = { 0xb0, BIT(4) },
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[RST_APB0_I2C] = { 0xb0, BIT(6) },
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};
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static struct ccu_reset_map sun50i_a64_r_ccu_resets[] = {
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[RST_APB0_IR] = { 0xb0, BIT(1) },
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[RST_APB0_TIMER] = { 0xb0, BIT(2) },
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[RST_APB0_RSB] = { 0xb0, BIT(3) },
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[RST_APB0_UART] = { 0xb0, BIT(4) },
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[RST_APB0_I2C] = { 0xb0, BIT(6) },
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};
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static const struct sunxi_ccu_desc sun8i_h3_r_ccu_desc = {
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.ccu_clks = sun8i_h3_r_ccu_clks,
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.num_ccu_clks = ARRAY_SIZE(sun8i_h3_r_ccu_clks),
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.hw_clks = &sun8i_h3_r_hw_clks,
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.resets = sun8i_h3_r_ccu_resets,
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.num_resets = ARRAY_SIZE(sun8i_h3_r_ccu_resets),
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};
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static const struct sunxi_ccu_desc sun50i_a64_r_ccu_desc = {
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.ccu_clks = sun50i_a64_r_ccu_clks,
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.num_ccu_clks = ARRAY_SIZE(sun50i_a64_r_ccu_clks),
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.hw_clks = &sun50i_a64_r_hw_clks,
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.resets = sun50i_a64_r_ccu_resets,
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.num_resets = ARRAY_SIZE(sun50i_a64_r_ccu_resets),
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};
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static void __init sunxi_r_ccu_init(struct device_node *node,
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const struct sunxi_ccu_desc *desc)
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{
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void __iomem *reg;
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reg = of_io_request_and_map(node, 0, of_node_full_name(node));
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if (IS_ERR(reg)) {
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pr_err("%s: Could not map the clock registers\n",
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of_node_full_name(node));
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return;
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}
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sunxi_ccu_probe(node, reg, desc);
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}
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static void __init sun8i_h3_r_ccu_setup(struct device_node *node)
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{
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sunxi_r_ccu_init(node, &sun8i_h3_r_ccu_desc);
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}
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CLK_OF_DECLARE(sun8i_h3_r_ccu, "allwinner,sun8i-h3-r-ccu",
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sun8i_h3_r_ccu_setup);
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static void __init sun50i_a64_r_ccu_setup(struct device_node *node)
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{
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sunxi_r_ccu_init(node, &sun50i_a64_r_ccu_desc);
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}
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CLK_OF_DECLARE(sun50i_a64_r_ccu, "allwinner,sun50i-a64-r-ccu",
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sun50i_a64_r_ccu_setup);
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@ -0,0 +1,27 @@
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/*
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* Copyright 2016 Icenowy <icenowy@aosc.xyz>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _CCU_SUN8I_R_H
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#define _CCU_SUN8I_R_H_
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#include <dt-bindings/clock/sun8i-r-ccu.h>
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#include <dt-bindings/reset/sun8i-r-ccu.h>
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/* AHB/APB bus clocks are not exported */
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#define CLK_AHB0 1
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#define CLK_APB0 2
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#define CLK_NUMBER (CLK_APB0_TWD + 1)
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#endif /* _CCU_SUN8I_R_H */
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@ -0,0 +1,59 @@
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/*
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* Copyright (c) 2016 Icenowy Zheng <icenowy@aosc.xyz>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _DT_BINDINGS_CLK_SUN8I_R_CCU_H_
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#define _DT_BINDINGS_CLK_SUN8I_R_CCU_H_
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#define CLK_AR100 0
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#define CLK_APB0_PIO 3
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#define CLK_APB0_IR 4
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#define CLK_APB0_TIMER 5
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#define CLK_APB0_RSB 6
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#define CLK_APB0_UART 7
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/* 8 is reserved for CLK_APB0_W1 on A31 */
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#define CLK_APB0_I2C 9
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#define CLK_APB0_TWD 10
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#define CLK_IR 11
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#endif /* _DT_BINDINGS_CLK_SUN8I_R_CCU_H_ */
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@ -0,0 +1,53 @@
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/*
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* Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
|
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* sell copies of the Software, and to permit persons to whom the
|
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _DT_BINDINGS_RST_SUN8I_R_CCU_H_
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#define _DT_BINDINGS_RST_SUN8I_R_CCU_H_
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#define RST_APB0_IR 0
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#define RST_APB0_TIMER 1
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#define RST_APB0_RSB 2
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#define RST_APB0_UART 3
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/* 4 is reserved for RST_APB0_W1 on A31 */
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#define RST_APB0_I2C 5
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#endif /* _DT_BINDINGS_RST_SUN8I_R_CCU_H_ */
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