ARM: shmobile: r8a7791: Add MSIOF clocks in device tree
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -394,6 +394,14 @@
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};
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/* Gate clocks */
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mstp0_clks: mstp0_clks@e6150130 {
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compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
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clocks = <&mp_clk>;
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#clock-cells = <1>;
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renesas,clock-indices = <R8A7791_CLK_MSIOF0>;
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clock-output-names = "msiof0";
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};
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mstp1_clks: mstp1_clks@e6150134 {
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compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
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@ -413,15 +421,16 @@
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compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
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clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
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<&mp_clk>;
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<&mp_clk>, <&mp_clk>, <&mp_clk>;
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#clock-cells = <1>;
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renesas,clock-indices = <
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R8A7791_CLK_SCIFA2 R8A7791_CLK_SCIFA1 R8A7791_CLK_SCIFA0
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R8A7791_CLK_SCIFB0 R8A7791_CLK_SCIFB1 R8A7791_CLK_SCIFB2
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R8A7791_CLK_MSIOF2 R8A7791_CLK_SCIFB0 R8A7791_CLK_SCIFB1
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R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2
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>;
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clock-output-names =
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"scifa2", "scifa1", "scifa0", "scifb0", "scifb1",
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"scifb2";
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"scifa2", "scifa1", "scifa0", "misof2", "scifb0",
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"scifb1", "msiof1", "scifb2";
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};
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mstp3_clks: mstp3_clks@e615013c {
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compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
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@ -21,6 +21,9 @@
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#define R8A7791_CLK_SD0 7
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#define R8A7791_CLK_Z 8
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/* MSTP0 */
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#define R8A7791_CLK_MSIOF0 0
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/* MSTP1 */
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#define R8A7791_CLK_TMU1 11
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#define R8A7791_CLK_TMU3 21
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@ -35,8 +38,10 @@
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#define R8A7791_CLK_SCIFA2 2
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#define R8A7791_CLK_SCIFA1 3
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#define R8A7791_CLK_SCIFA0 4
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#define R8A7791_CLK_MSIOF2 5
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#define R8A7791_CLK_SCIFB0 6
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#define R8A7791_CLK_SCIFB1 7
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#define R8A7791_CLK_MSIOF1 8
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#define R8A7791_CLK_SCIFB2 16
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#define R8A7791_CLK_DMAC 18
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