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ARM: cns3xxx: Add architecture definition for EHCI/OHCI controller 

This patch add plateform_device for EHCI and OHCI controller on CNS3XXX.
Power reference count (usb_pwr_ref) is used to control enabling and
disabling the single clock control for both EHCI and OHCI controller.

It also removes EHCI/OHCI unused virtual address definitions.

Signed-off-by: Mac Lin <mkl0301@gmail.com>
Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
This commit is contained in:
Mac Lin 2010-11-23 00:32:44 +08:00 committed by Anton Vorontsov
parent 38e64ba0f1
commit cf36797f35
4 changed files with 62 additions and 2 deletions
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54
arch/arm/mach-cns3xxx/cns3420vb.c
View File

@ -17,6 +17,7 @@
#include <linux/kernel.h>
#include <linux/compiler.h>
#include <linux/io.h>
#include <linux/dma-mapping.h>
#include <linux/serial_core.h>
#include <linux/serial_8250.h>
#include <linux/platform_device.h>
@ -107,11 +108,64 @@ static void __init cns3420_early_serial_setup(void)
#endif
}
/*
* USB
*/
static struct resource cns3xxx_usb_ehci_resources[] = {
[0] = {
.start = CNS3XXX_USB_BASE,
.end = CNS3XXX_USB_BASE + SZ_16M - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_CNS3XXX_USB_EHCI,
.flags = IORESOURCE_IRQ,
},
};
static u64 cns3xxx_usb_ehci_dma_mask = DMA_BIT_MASK(32);
static struct platform_device cns3xxx_usb_ehci_device = {
.name = "cns3xxx-ehci",
.num_resources = ARRAY_SIZE(cns3xxx_usb_ehci_resources),
.resource = cns3xxx_usb_ehci_resources,
.dev = {
.dma_mask = &cns3xxx_usb_ehci_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(32),
},
};
static struct resource cns3xxx_usb_ohci_resources[] = {
[0] = {
.start = CNS3XXX_USB_OHCI_BASE,
.end = CNS3XXX_USB_OHCI_BASE + SZ_16M - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_CNS3XXX_USB_OHCI,
.flags = IORESOURCE_IRQ,
},
};
static u64 cns3xxx_usb_ohci_dma_mask = DMA_BIT_MASK(32);
static struct platform_device cns3xxx_usb_ohci_device = {
.name = "cns3xxx-ohci",
.num_resources = ARRAY_SIZE(cns3xxx_usb_ohci_resources),
.resource = cns3xxx_usb_ohci_resources,
.dev = {
.dma_mask = &cns3xxx_usb_ohci_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(32),
},
};
/*
* Initialization
*/
static struct platform_device *cns3420_pdevs[] __initdata = {
&cns3420_nor_pdev,
&cns3xxx_usb_ehci_device,
&cns3xxx_usb_ohci_device,
};
static void __init cns3420_init(void)

2
arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
View File

@ -165,7 +165,6 @@
#define CNS3XXX_USBOTG_BASE_VIRT 0xFFF15000
#define CNS3XXX_USB_BASE 0x82000000 /* USB Host Control */
#define CNS3XXX_USB_BASE_VIRT 0xFFF16000
#define CNS3XXX_SATA2_BASE 0x83000000 /* SATA */
#define CNS3XXX_SATA2_SIZE SZ_16M
@ -184,7 +183,6 @@
#define CNS3XXX_2DG_BASE_VIRT 0xFFF1B000
#define CNS3XXX_USB_OHCI_BASE 0x88000000 /* USB OHCI */
#define CNS3XXX_USB_OHCI_BASE_VIRT 0xFFF1C000
#define CNS3XXX_L2C_BASE 0x92000000 /* L2 Cache Control */
#define CNS3XXX_L2C_BASE_VIRT 0xFFF27000

4
arch/arm/mach-cns3xxx/include/mach/pm.h
View File

@ -11,9 +11,13 @@
#ifndef __CNS3XXX_PM_H
#define __CNS3XXX_PM_H
#include <asm/atomic.h>
void cns3xxx_pwr_clk_en(unsigned int block);
void cns3xxx_pwr_clk_dis(unsigned int block);
void cns3xxx_pwr_power_up(unsigned int block);
void cns3xxx_pwr_power_down(unsigned int block);
extern atomic_t usb_pwr_ref;
#endif /* __CNS3XXX_PM_H */

4
arch/arm/mach-cns3xxx/pm.c
View File

@ -10,6 +10,7 @@
#include <linux/module.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <asm/atomic.h>
#include <mach/system.h>
#include <mach/cns3xxx.h>
#include <mach/pm.h>
@ -118,3 +119,6 @@ int cns3xxx_cpu_clock(void)
return cpu;
}
EXPORT_SYMBOL(cns3xxx_cpu_clock);
atomic_t usb_pwr_ref = ATOMIC_INIT(0);
EXPORT_SYMBOL(usb_pwr_ref);