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A handful of const updates for reset ops and a couple fixes to the 

newly introduced IPQ4019 clock driver.
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Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
 "A handful of const updates for reset ops and a couple fixes to the
  newly introduced IPQ4019 clock driver"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: qcom: ipq4019: add some fixed clocks for ddrppl and fepll
  clk: qcom: ipq4019: switch remaining defines to enums
  clk: qcom: Make reset_control_ops const
  clk: tegra: Make reset_control_ops const
  clk: sunxi: Make reset_control_ops const
  clk: atlas7: Make reset_control_ops const
  clk: rockchip: Make reset_control_ops const
  clk: mmp: Make reset_control_ops const
  clk: mediatek: Make reset_control_ops const
This commit is contained in:
Linus Torvalds 2016-04-01 19:57:13 -05:00
parent 1826907c1f 2aac7ddf9a
commit cf78031a65
11 changed files with 45 additions and 45 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/clk/mediatek/reset.c
View File

@ -57,7 +57,7 @@ static int mtk_reset(struct reset_controller_dev *rcdev,
return mtk_reset_deassert(rcdev, id);
}
static struct reset_control_ops mtk_reset_ops = {
static const struct reset_control_ops mtk_reset_ops = {
.assert = mtk_reset_assert,
.deassert = mtk_reset_deassert,
.reset = mtk_reset,

2
drivers/clk/mmp/reset.c
View File

@ -74,7 +74,7 @@ static int mmp_clk_reset_deassert(struct reset_controller_dev *rcdev,
return 0;
}
static struct reset_control_ops mmp_clk_reset_ops = {
static const struct reset_control_ops mmp_clk_reset_ops = {
.assert = mmp_clk_reset_assert,
.deassert = mmp_clk_reset_deassert,
};

70
drivers/clk/qcom/gcc-ipq4019.c
View File

@ -129,20 +129,10 @@ static const char * const gcc_xo_ddr_500_200[] = {
};
#define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }
#define P_XO 0
#define FE_PLL_200 1
#define FE_PLL_500 2
#define DDRC_PLL_666 3
#define DDRC_PLL_666_SDCC 1
#define FE_PLL_125_DLY 1
#define FE_PLL_WCSS2G 1
#define FE_PLL_WCSS5G 1
static const struct freq_tbl ftbl_gcc_audio_pwm_clk[] = {
F(48000000, P_XO, 1, 0, 0),
F(200000000, FE_PLL_200, 1, 0, 0),
F(200000000, P_FEPLL200, 1, 0, 0),
{ }
};
@ -334,15 +324,15 @@ static struct clk_branch gcc_blsp1_qup2_spi_apps_clk = {
};
static const struct freq_tbl ftbl_gcc_blsp1_uart1_2_apps_clk[] = {
F(1843200, FE_PLL_200, 1, 144, 15625),
F(3686400, FE_PLL_200, 1, 288, 15625),
F(7372800, FE_PLL_200, 1, 576, 15625),
F(14745600, FE_PLL_200, 1, 1152, 15625),
F(16000000, FE_PLL_200, 1, 2, 25),
F(1843200, P_FEPLL200, 1, 144, 15625),
F(3686400, P_FEPLL200, 1, 288, 15625),
F(7372800, P_FEPLL200, 1, 576, 15625),
F(14745600, P_FEPLL200, 1, 1152, 15625),
F(16000000, P_FEPLL200, 1, 2, 25),
F(24000000, P_XO, 1, 1, 2),
F(32000000, FE_PLL_200, 1, 4, 25),
F(40000000, FE_PLL_200, 1, 1, 5),
F(46400000, FE_PLL_200, 1, 29, 125),
F(32000000, P_FEPLL200, 1, 4, 25),
F(40000000, P_FEPLL200, 1, 1, 5),
F(46400000, P_FEPLL200, 1, 29, 125),
F(48000000, P_XO, 1, 0, 0),
{ }
};
@ -410,9 +400,9 @@ static struct clk_branch gcc_blsp1_uart2_apps_clk = {
};
static const struct freq_tbl ftbl_gcc_gp_clk[] = {
F(1250000, FE_PLL_200, 1, 16, 0),
F(2500000, FE_PLL_200, 1, 8, 0),
F(5000000, FE_PLL_200, 1, 4, 0),
F(1250000, P_FEPLL200, 1, 16, 0),
F(2500000, P_FEPLL200, 1, 8, 0),
F(5000000, P_FEPLL200, 1, 4, 0),
{ }
};
@ -512,11 +502,11 @@ static struct clk_branch gcc_gp3_clk = {
static const struct freq_tbl ftbl_gcc_sdcc1_apps_clk[] = {
F(144000, P_XO, 1, 3, 240),
F(400000, P_XO, 1, 1, 0),
F(20000000, FE_PLL_500, 1, 1, 25),
F(25000000, FE_PLL_500, 1, 1, 20),
F(50000000, FE_PLL_500, 1, 1, 10),
F(100000000, FE_PLL_500, 1, 1, 5),
F(193000000, DDRC_PLL_666_SDCC, 1, 0, 0),
F(20000000, P_FEPLL500, 1, 1, 25),
F(25000000, P_FEPLL500, 1, 1, 20),
F(50000000, P_FEPLL500, 1, 1, 10),
F(100000000, P_FEPLL500, 1, 1, 5),
F(193000000, P_DDRPLL, 1, 0, 0),
{ }
};
@ -536,9 +526,9 @@ static struct clk_rcg2 sdcc1_apps_clk_src = {
static const struct freq_tbl ftbl_gcc_apps_clk[] = {
F(48000000, P_XO, 1, 0, 0),
F(200000000, FE_PLL_200, 1, 0, 0),
F(500000000, FE_PLL_500, 1, 0, 0),
F(626000000, DDRC_PLL_666, 1, 0, 0),
F(200000000, P_FEPLL200, 1, 0, 0),
F(500000000, P_FEPLL500, 1, 0, 0),
F(626000000, P_DDRPLLAPSS, 1, 0, 0),
{ }
};
@ -557,7 +547,7 @@ static struct clk_rcg2 apps_clk_src = {
static const struct freq_tbl ftbl_gcc_apps_ahb_clk[] = {
F(48000000, P_XO, 1, 0, 0),
F(100000000, FE_PLL_200, 2, 0, 0),
F(100000000, P_FEPLL200, 2, 0, 0),
{ }
};
@ -940,7 +930,7 @@ static struct clk_branch gcc_usb2_mock_utmi_clk = {
};
static const struct freq_tbl ftbl_gcc_usb30_mock_utmi_clk[] = {
F(2000000, FE_PLL_200, 10, 0, 0),
F(2000000, P_FEPLL200, 10, 0, 0),
{ }
};
@ -1007,7 +997,7 @@ static struct clk_branch gcc_usb3_mock_utmi_clk = {
};
static const struct freq_tbl ftbl_gcc_fephy_dly_clk[] = {
F(125000000, FE_PLL_125_DLY, 1, 0, 0),
F(125000000, P_FEPLL125DLY, 1, 0, 0),
{ }
};
@ -1027,7 +1017,7 @@ static struct clk_rcg2 fephy_125m_dly_clk_src = {
static const struct freq_tbl ftbl_gcc_wcss2g_clk[] = {
F(48000000, P_XO, 1, 0, 0),
F(250000000, FE_PLL_WCSS2G, 1, 0, 0),
F(250000000, P_FEPLLWCSS2G, 1, 0, 0),
{ }
};
@ -1097,7 +1087,7 @@ static struct clk_branch gcc_wcss2g_rtc_clk = {
static const struct freq_tbl ftbl_gcc_wcss5g_clk[] = {
F(48000000, P_XO, 1, 0, 0),
F(250000000, FE_PLL_WCSS5G, 1, 0, 0),
F(250000000, P_FEPLLWCSS5G, 1, 0, 0),
{ }
};
@ -1325,6 +1315,16 @@ MODULE_DEVICE_TABLE(of, gcc_ipq4019_match_table);
static int gcc_ipq4019_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
clk_register_fixed_rate(dev, "fepll125", "xo", 0, 200000000);
clk_register_fixed_rate(dev, "fepll125dly", "xo", 0, 200000000);
clk_register_fixed_rate(dev, "fepllwcss2g", "xo", 0, 200000000);
clk_register_fixed_rate(dev, "fepllwcss5g", "xo", 0, 200000000);
clk_register_fixed_rate(dev, "fepll200", "xo", 0, 200000000);
clk_register_fixed_rate(dev, "fepll500", "xo", 0, 200000000);
clk_register_fixed_rate(dev, "ddrpllapss", "xo", 0, 666000000);
return qcom_cc_probe(pdev, &gcc_ipq4019_desc);
}

2
drivers/clk/qcom/reset.c
View File

@ -55,7 +55,7 @@ qcom_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id)
return regmap_update_bits(rst->regmap, map->reg, mask, 0);
}
struct reset_control_ops qcom_reset_ops = {
const struct reset_control_ops qcom_reset_ops = {
.reset = qcom_reset,
.assert = qcom_reset_assert,
.deassert = qcom_reset_deassert,

2
drivers/clk/qcom/reset.h
View File

@ -32,6 +32,6 @@ struct qcom_reset_controller {
#define to_qcom_reset_controller(r) \
container_of(r, struct qcom_reset_controller, rcdev);
extern struct reset_control_ops qcom_reset_ops;
extern const struct reset_control_ops qcom_reset_ops;
#endif

2
drivers/clk/rockchip/softrst.c
View File

@ -81,7 +81,7 @@ static int rockchip_softrst_deassert(struct reset_controller_dev *rcdev,
return 0;
}
static struct reset_control_ops rockchip_softrst_ops = {
static const struct reset_control_ops rockchip_softrst_ops = {
.assert = rockchip_softrst_assert,
.deassert = rockchip_softrst_deassert,
};

2
drivers/clk/sirf/clk-atlas7.c
View File

@ -1423,7 +1423,7 @@ static int atlas7_reset_module(struct reset_controller_dev *rcdev,
return 0;
}
static struct reset_control_ops atlas7_rst_ops = {
static const struct reset_control_ops atlas7_rst_ops = {
.reset = atlas7_reset_module,
};

2
drivers/clk/sunxi/clk-a10-ve.c
View File

@ -85,7 +85,7 @@ static int sunxi_ve_of_xlate(struct reset_controller_dev *rcdev,
return 0;
}
static struct reset_control_ops sunxi_ve_reset_ops = {
static const struct reset_control_ops sunxi_ve_reset_ops = {
.assert = sunxi_ve_reset_assert,
.deassert = sunxi_ve_reset_deassert,
};

2
drivers/clk/sunxi/clk-sun9i-mmc.c
View File

@ -83,7 +83,7 @@ static int sun9i_mmc_reset_deassert(struct reset_controller_dev *rcdev,
return 0;
}
static struct reset_control_ops sun9i_mmc_reset_ops = {
static const struct reset_control_ops sun9i_mmc_reset_ops = {
.assert = sun9i_mmc_reset_assert,
.deassert = sun9i_mmc_reset_deassert,
};

2
drivers/clk/sunxi/clk-usb.c
View File

@ -76,7 +76,7 @@ static int sunxi_usb_reset_deassert(struct reset_controller_dev *rcdev,
return 0;
}
static struct reset_control_ops sunxi_usb_reset_ops = {
static const struct reset_control_ops sunxi_usb_reset_ops = {
.assert = sunxi_usb_reset_assert,
.deassert = sunxi_usb_reset_deassert,
};

2
drivers/clk/tegra/clk.c
View File

@ -271,7 +271,7 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl,
}
}
static struct reset_control_ops rst_ops = {
static const struct reset_control_ops rst_ops = {
.assert = tegra_clk_rst_assert,
.deassert = tegra_clk_rst_deassert,
};