Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, pci, mrst: Add extra sanity check in walking the PCI extended cap chain x86: Fix x2apic preenabled system with kexec x86: Force HPET readback_cmp for all ATI chipsets
This commit is contained in:
commit
d0c6f62584
|
@ -921,7 +921,7 @@ void disable_local_APIC(void)
|
||||||
unsigned int value;
|
unsigned int value;
|
||||||
|
|
||||||
/* APIC hasn't been mapped yet */
|
/* APIC hasn't been mapped yet */
|
||||||
if (!apic_phys)
|
if (!x2apic_mode && !apic_phys)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
clear_local_APIC();
|
clear_local_APIC();
|
||||||
|
|
|
@ -18,6 +18,7 @@
|
||||||
#include <asm/apic.h>
|
#include <asm/apic.h>
|
||||||
#include <asm/iommu.h>
|
#include <asm/iommu.h>
|
||||||
#include <asm/gart.h>
|
#include <asm/gart.h>
|
||||||
|
#include <asm/hpet.h>
|
||||||
|
|
||||||
static void __init fix_hypertransport_config(int num, int slot, int func)
|
static void __init fix_hypertransport_config(int num, int slot, int func)
|
||||||
{
|
{
|
||||||
|
@ -191,6 +192,21 @@ static void __init ati_bugs_contd(int num, int slot, int func)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Force the read back of the CMP register in hpet_next_event()
|
||||||
|
* to work around the problem that the CMP register write seems to be
|
||||||
|
* delayed. See hpet_next_event() for details.
|
||||||
|
*
|
||||||
|
* We do this on all SMBUS incarnations for now until we have more
|
||||||
|
* information about the affected chipsets.
|
||||||
|
*/
|
||||||
|
static void __init ati_hpet_bugs(int num, int slot, int func)
|
||||||
|
{
|
||||||
|
#ifdef CONFIG_HPET_TIMER
|
||||||
|
hpet_readback_cmp = 1;
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
#define QFLAG_APPLY_ONCE 0x1
|
#define QFLAG_APPLY_ONCE 0x1
|
||||||
#define QFLAG_APPLIED 0x2
|
#define QFLAG_APPLIED 0x2
|
||||||
#define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED)
|
#define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED)
|
||||||
|
@ -220,6 +236,8 @@ static struct chipset early_qrk[] __initdata = {
|
||||||
PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs },
|
PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs },
|
||||||
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
|
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
|
||||||
PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
|
PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
|
||||||
|
{ PCI_VENDOR_ID_ATI, PCI_ANY_ID,
|
||||||
|
PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_hpet_bugs },
|
||||||
{}
|
{}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -498,15 +498,10 @@ void force_hpet_resume(void)
|
||||||
* See erratum #27 (Misinterpreted MSI Requests May Result in
|
* See erratum #27 (Misinterpreted MSI Requests May Result in
|
||||||
* Corrupted LPC DMA Data) in AMD Publication #46837,
|
* Corrupted LPC DMA Data) in AMD Publication #46837,
|
||||||
* "SB700 Family Product Errata", Rev. 1.0, March 2010.
|
* "SB700 Family Product Errata", Rev. 1.0, March 2010.
|
||||||
*
|
|
||||||
* Also force the read back of the CMP register in hpet_next_event()
|
|
||||||
* to work around the problem that the CMP register write seems to be
|
|
||||||
* delayed. See hpet_next_event() for details.
|
|
||||||
*/
|
*/
|
||||||
static void force_disable_hpet_msi(struct pci_dev *unused)
|
static void force_disable_hpet_msi(struct pci_dev *unused)
|
||||||
{
|
{
|
||||||
hpet_msi_disable = 1;
|
hpet_msi_disable = 1;
|
||||||
hpet_readback_cmp = 1;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
|
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
|
||||||
|
|
|
@ -66,8 +66,9 @@ static int fixed_bar_cap(struct pci_bus *bus, unsigned int devfn)
|
||||||
devfn, pos, 4, &pcie_cap))
|
devfn, pos, 4, &pcie_cap))
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
if (pcie_cap == 0xffffffff)
|
if (PCI_EXT_CAP_ID(pcie_cap) == 0x0000 ||
|
||||||
return 0;
|
PCI_EXT_CAP_ID(pcie_cap) == 0xffff)
|
||||||
|
break;
|
||||||
|
|
||||||
if (PCI_EXT_CAP_ID(pcie_cap) == PCI_EXT_CAP_ID_VNDR) {
|
if (PCI_EXT_CAP_ID(pcie_cap) == PCI_EXT_CAP_ID_VNDR) {
|
||||||
raw_pci_ext_ops->read(pci_domain_nr(bus), bus->number,
|
raw_pci_ext_ops->read(pci_domain_nr(bus), bus->number,
|
||||||
|
@ -76,7 +77,7 @@ static int fixed_bar_cap(struct pci_bus *bus, unsigned int devfn)
|
||||||
return pos;
|
return pos;
|
||||||
}
|
}
|
||||||
|
|
||||||
pos = pcie_cap >> 20;
|
pos = PCI_EXT_CAP_NEXT(pcie_cap);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
Loading…
Reference in New Issue