Blackfin arch: Move write to VR_CTL closer to IDLE
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -63,12 +63,14 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
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{
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unsigned long flags, iwr;
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bfin_write16(VR_CTL, val);
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__builtin_bfin_ssync();
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/* Enable the PLL Wakeup bit in SIC IWR */
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iwr = bfin_read32(SIC_IWR);
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/* Only allow PPL Wakeup) */
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bfin_write32(SIC_IWR, IWR_ENABLE(0));
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bfin_write16(VR_CTL, val);
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__builtin_bfin_ssync();
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local_irq_save(flags);
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asm("IDLE;");
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local_irq_restore(flags);
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@ -51,12 +51,14 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
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{
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unsigned long flags, iwr;
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bfin_write16(VR_CTL, val);
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__builtin_bfin_ssync();
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/* Enable the PLL Wakeup bit in SIC IWR */
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iwr = bfin_read32(SIC_IWR);
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/* Only allow PPL Wakeup) */
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bfin_write32(SIC_IWR, IWR_ENABLE(0));
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bfin_write16(VR_CTL, val);
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__builtin_bfin_ssync();
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local_irq_save(flags);
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asm("IDLE;");
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local_irq_restore(flags);
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@ -59,12 +59,14 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
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{
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unsigned long flags, iwr;
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bfin_write16(VR_CTL, val);
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__builtin_bfin_ssync();
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/* Enable the PLL Wakeup bit in SIC IWR */
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iwr = bfin_read32(SICA_IWR0);
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/* Only allow PPL Wakeup) */
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bfin_write32(SICA_IWR0, IWR_ENABLE(0));
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bfin_write16(VR_CTL, val);
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__builtin_bfin_ssync();
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local_irq_save(flags);
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asm("IDLE;");
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local_irq_restore(flags);
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