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ARM: SoC fixes 

A few fixes who have come in near or during the merge window:
 
  - Removal of a VLA usage in Marvell mpp platform code
  - Enable some IPMI options for ARM64 servers by default, helps testing
  - Enable PREEMPT on 32-bit ARMv7 defconfig
  - Minor fix for stm32 DT (removal of an unused DMA property)
  - Bugfix for TI OMAP1-based ams-delta (-EINVAL -> IRQ_NOTCONNECTED)
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "A few fixes who have come in near or during the merge window:

   - Removal of a VLA usage in Marvell mpp platform code

   - Enable some IPMI options for ARM64 servers by default, helps
     testing

   - Enable PREEMPT on 32-bit ARMv7 defconfig

   - Minor fix for stm32 DT (removal of an unused DMA property)

   - Bugfix for TI OMAP1-based ams-delta (-EINVAL -> IRQ_NOTCONNECTED)"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: dts: stm32: update HASH1 dmas property on stm32mp157c
  ARM: orion: avoid VLA in orion_mpp_conf
  ARM: defconfig: Update multi_v7 to use PREEMPT
  arm64: defconfig: Enable some IPMI configs
  soc: ti: QMSS: Fix usage of irq_set_affinity_hint
  ARM: OMAP1: ams-delta: Fix impossible .irq < 0
This commit is contained in:
Linus Torvalds 2018-11-03 12:13:57 -07:00
parent 83650fd58a 8008cc78d3
commit d2ff0ff2c2
8 changed files with 35 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/stm32mp157c.dtsi
View File

@ -923,7 +923,7 @@
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc HASH1>;
resets = <&rcc HASH1_R>;
dmas = <&mdma1 31 0x10 0x1000A02 0x0 0x0 0x0>;
dmas = <&mdma1 31 0x10 0x1000A02 0x0 0x0>;
dma-names = "in";
dma-maxburst = <2>;
status = "disabled";

1
arch/arm/configs/multi_v7_defconfig
View File

@ -1,6 +1,7 @@
CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_CGROUPS=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EMBEDDED=y

8
arch/arm/mach-omap1/board-ams-delta.c
View File

@ -773,7 +773,7 @@ static struct plat_serial8250_port ams_delta_modem_ports[] = {
{
.membase = IOMEM(MODEM_VIRT),
.mapbase = MODEM_PHYS,
.irq = -EINVAL, /* changed later */
.irq = IRQ_NOTCONNECTED, /* changed later */
.flags = UPF_BOOT_AUTOCONF,
.irqflags = IRQF_TRIGGER_RISING,
.iotype = UPIO_MEM,
@ -864,8 +864,7 @@ static int __init modem_nreset_init(void)
/*
* This function expects MODEM IRQ number already assigned to the port
* and fails if it's not.
* This function expects MODEM IRQ number already assigned to the port.
* The MODEM device requires its RESET# pin kept high during probe.
* That requirement can be fulfilled in several ways:
* - with a descriptor of already functional modem_nreset regulator
@ -888,9 +887,6 @@ static int __init ams_delta_modem_init(void)
if (!machine_is_ams_delta())
return -ENODEV;
if (ams_delta_modem_ports[0].irq < 0)
return ams_delta_modem_ports[0].irq;
omap_cfg_reg(M14_1510_GPIO2);
/* Initialize the modem_nreset regulator consumer before use */

7
arch/arm/plat-orion/mpp.c
View File

@ -28,10 +28,15 @@ void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask,
unsigned int mpp_max, void __iomem *dev_bus)
{
unsigned int mpp_nr_regs = (1 + mpp_max/8);
u32 mpp_ctrl[mpp_nr_regs];
u32 mpp_ctrl[8];
int i;
printk(KERN_DEBUG "initial MPP regs:");
if (mpp_nr_regs > ARRAY_SIZE(mpp_ctrl)) {
printk(KERN_ERR "orion_mpp_conf: invalid mpp_max\n");
return;
}
for (i = 0; i < mpp_nr_regs; i++) {
mpp_ctrl[i] = readl(mpp_ctrl_addr(i, dev_bus));
printk(" %08x", mpp_ctrl[i]);

3
arch/arm64/configs/defconfig
View File

@ -308,6 +308,9 @@ CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
CONFIG_SERIAL_MVEBU_UART=y
CONFIG_SERIAL_DEV_BUS=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_IPMI_HANDLER=m
CONFIG_IPMI_DEVICE_INTERFACE=m
CONFIG_IPMI_SI=m
CONFIG_TCG_TPM=y
CONFIG_TCG_TIS_I2C_INFINEON=y
CONFIG_I2C_CHARDEV=y

4
drivers/soc/ti/knav_qmss.h
View File

@ -329,8 +329,8 @@ struct knav_range_ops {
};
struct knav_irq_info {
int irq;
u32 cpu_map;
int irq;
struct cpumask *cpu_mask;
};
struct knav_range_info {

10
drivers/soc/ti/knav_qmss_acc.c
View File

@ -205,18 +205,18 @@ static int knav_range_setup_acc_irq(struct knav_range_info *range,
{
struct knav_device *kdev = range->kdev;
struct knav_acc_channel *acc;
unsigned long cpu_map;
struct cpumask *cpu_mask;
int ret = 0, irq;
u32 old, new;
if (range->flags & RANGE_MULTI_QUEUE) {
acc = range->acc;
irq = range->irqs[0].irq;
cpu_map = range->irqs[0].cpu_map;
cpu_mask = range->irqs[0].cpu_mask;
} else {
acc = range->acc + queue;
irq = range->irqs[queue].irq;
cpu_map = range->irqs[queue].cpu_map;
cpu_mask = range->irqs[queue].cpu_mask;
}
old = acc->open_mask;
@ -239,8 +239,8 @@ static int knav_range_setup_acc_irq(struct knav_range_info *range,
acc->name, acc->name);
ret = request_irq(irq, knav_acc_int_handler, 0, acc->name,
range);
if (!ret && cpu_map) {
ret = irq_set_affinity_hint(irq, to_cpumask(&cpu_map));
if (!ret && cpu_mask) {
ret = irq_set_affinity_hint(irq, cpu_mask);
if (ret) {
dev_warn(range->kdev->dev,
"Failed to set IRQ affinity\n");

22
drivers/soc/ti/knav_qmss_queue.c
View File

@ -118,19 +118,17 @@ static int knav_queue_setup_irq(struct knav_range_info *range,
struct knav_queue_inst *inst)
{
unsigned queue = inst->id - range->queue_base;
unsigned long cpu_map;
int ret = 0, irq;
if (range->flags & RANGE_HAS_IRQ) {
irq = range->irqs[queue].irq;
cpu_map = range->irqs[queue].cpu_map;
ret = request_irq(irq, knav_queue_int_handler, 0,
inst->irq_name, inst);
if (ret)
return ret;
disable_irq(irq);
if (cpu_map) {
ret = irq_set_affinity_hint(irq, to_cpumask(&cpu_map));
if (range->irqs[queue].cpu_mask) {
ret = irq_set_affinity_hint(irq, range->irqs[queue].cpu_mask);
if (ret) {
dev_warn(range->kdev->dev,
"Failed to set IRQ affinity\n");
@ -1262,9 +1260,19 @@ static int knav_setup_queue_range(struct knav_device *kdev,
range->num_irqs++;
if (IS_ENABLED(CONFIG_SMP) && oirq.args_count == 3)
range->irqs[i].cpu_map =
(oirq.args[2] & 0x0000ff00) >> 8;
if (IS_ENABLED(CONFIG_SMP) && oirq.args_count == 3) {
unsigned long mask;
int bit;
range->irqs[i].cpu_mask = devm_kzalloc(dev,
cpumask_size(), GFP_KERNEL);
if (!range->irqs[i].cpu_mask)
return -ENOMEM;
mask = (oirq.args[2] & 0x0000ff00) >> 8;
for_each_set_bit(bit, &mask, BITS_PER_LONG)
cpumask_set_cpu(bit, range->irqs[i].cpu_mask);
}
}
range->num_irqs = min(range->num_irqs, range->num_queues);