clocksource/drivers/h8300: Use ioread / iowrite
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This commit is contained in:
Yoshinori Sato
Daniel Lezcano
parent
6f2b611db2
commit
d33f250af4
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@ -19,6 +19,9 @@
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#define TCR 0
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#define TCNT 2
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#define bset(b, a) iowrite8(ioread8(a) | (1 << (b)), (a))
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#define bclr(b, a) iowrite8(ioread8(a) & ~(1 << (b)), (a))
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struct timer16_priv {
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struct clocksource cs;
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unsigned long total_cycles;
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@ -28,23 +31,22 @@ struct timer16_priv {
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unsigned char enb;
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unsigned char ovf;
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unsigned char ovie;
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struct clk *clk;
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};
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static unsigned long timer16_get_counter(struct timer16_priv *p)
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{
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unsigned long v1, v2, v3;
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int o1, o2;
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unsigned short v1, v2, v3;
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unsigned char o1, o2;
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o1 = readb(p->mapcommon + TISRC) & p->ovf;
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o1 = ioread8(p->mapcommon + TISRC) & p->ovf;
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/* Make sure the timer value is stable. Stolen from acpi_pm.c */
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do {
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o2 = o1;
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v1 = readw(p->mapbase + TCNT);
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v2 = readw(p->mapbase + TCNT);
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v3 = readw(p->mapbase + TCNT);
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o1 = readb(p->mapcommon + TISRC) & p->ovf;
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v1 = ioread16be(p->mapbase + TCNT);
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v2 = ioread16be(p->mapbase + TCNT);
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v3 = ioread16be(p->mapbase + TCNT);
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o1 = ioread8(p->mapcommon + TISRC) & p->ovf;
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} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
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|| (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
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@ -59,8 +61,7 @@ static irqreturn_t timer16_interrupt(int irq, void *dev_id)
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{
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struct timer16_priv *p = (struct timer16_priv *)dev_id;
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writeb(readb(p->mapcommon + TISRC) & ~p->ovf,
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p->mapcommon + TISRC);
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bclr(p->ovf, p->mapcommon + TISRC);
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p->total_cycles += 0x10000;
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return IRQ_HANDLED;
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@ -89,12 +90,10 @@ static int timer16_enable(struct clocksource *cs)
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WARN_ON(p->cs_enabled);
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p->total_cycles = 0;
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writew(0x0000, p->mapbase + TCNT);
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writeb(0x83, p->mapbase + TCR);
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writeb(readb(p->mapcommon + TSTR) | p->enb,
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p->mapcommon + TSTR);
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writeb(readb(p->mapcommon + TISRC) | p->ovie,
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p->mapcommon + TSTR);
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iowrite16be(0x0000, p->mapbase + TCNT);
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iowrite8(0x83, p->mapbase + TCR);
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bset(p->ovie, p->mapcommon + TISRC);
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bset(p->enb, p->mapcommon + TSTR);
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p->cs_enabled = true;
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return 0;
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@ -106,8 +105,8 @@ static void timer16_disable(struct clocksource *cs)
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WARN_ON(!p->cs_enabled);
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writeb(readb(p->mapcommon + TSTR) & ~p->enb,
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p->mapcommon + TSTR);
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bclr(p->ovie, p->mapcommon + TISRC);
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bclr(p->enb, p->mapcommon + TSTR);
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p->cs_enabled = false;
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}
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@ -162,9 +161,9 @@ static void __init h8300_16timer_init(struct device_node *node)
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timer16_priv.mapbase = base[REG_CH];
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timer16_priv.mapcommon = base[REG_COMM];
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timer16_priv.enb = 1 << ch;
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timer16_priv.ovf = 1 << ch;
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timer16_priv.ovie = 1 << (4 + ch);
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timer16_priv.enb = ch;
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timer16_priv.ovf = ch;
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timer16_priv.ovie = 4 + ch;
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ret = request_irq(irq, timer16_interrupt,
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IRQF_TIMER, timer16_priv.cs.name, &timer16_priv);
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@ -174,7 +173,7 @@ static void __init h8300_16timer_init(struct device_node *node)
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}
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clocksource_register_hz(&timer16_priv.cs,
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clk_get_rate(timer16_priv.clk) / 8);
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clk_get_rate(clk) / 8);
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return;
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unmap_comm:
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@ -24,10 +24,16 @@
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#define TCORB 6
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#define _8TCNT 8
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#define CMIEA 6
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#define CMFA 6
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#define FLAG_STARTED (1 << 3)
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#define SCALE 64
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#define bset(b, a) iowrite8(ioread8(a) | (1 << (b)), (a))
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#define bclr(b, a) iowrite8(ioread8(a) & ~(1 << (b)), (a))
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struct timer8_priv {
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struct clock_event_device ced;
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void __iomem *mapbase;
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@ -40,12 +46,11 @@ static irqreturn_t timer8_interrupt(int irq, void *dev_id)
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struct timer8_priv *p = dev_id;
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if (clockevent_state_oneshot(&p->ced))
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writew(0x0000, p->mapbase + _8TCR);
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iowrite16be(0x0000, p->mapbase + _8TCR);
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p->ced.event_handler(&p->ced);
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writeb(readb(p->mapbase + _8TCSR) & ~0x40,
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p->mapbase + _8TCSR);
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bclr(CMFA, p->mapbase + _8TCSR);
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return IRQ_HANDLED;
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}
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@ -54,17 +59,18 @@ static void timer8_set_next(struct timer8_priv *p, unsigned long delta)
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{
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if (delta >= 0x10000)
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pr_warn("delta out of range\n");
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writeb(readb(p->mapbase + _8TCR) & ~0x40, p->mapbase + _8TCR);
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writew(0, p->mapbase + _8TCNT);
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writew(delta, p->mapbase + TCORA);
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writeb(readb(p->mapbase + _8TCR) | 0x40, p->mapbase + _8TCR);
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bclr(CMIEA, p->mapbase + _8TCR);
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iowrite16be(delta, p->mapbase + TCORA);
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iowrite16be(0x0000, p->mapbase + _8TCNT);
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bclr(CMFA, p->mapbase + _8TCSR);
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bset(CMIEA, p->mapbase + _8TCR);
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}
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static int timer8_enable(struct timer8_priv *p)
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{
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writew(0xffff, p->mapbase + TCORA);
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writew(0x0000, p->mapbase + _8TCNT);
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writew(0x0c02, p->mapbase + _8TCR);
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iowrite16be(0xffff, p->mapbase + TCORA);
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iowrite16be(0x0000, p->mapbase + _8TCNT);
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iowrite16be(0x0c02, p->mapbase + _8TCR);
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return 0;
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}
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@ -85,7 +91,7 @@ static int timer8_start(struct timer8_priv *p)
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static void timer8_stop(struct timer8_priv *p)
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{
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writew(0x0000, p->mapbase + _8TCR);
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iowrite16be(0x0000, p->mapbase + _8TCR);
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}
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static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced)
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@ -19,6 +19,8 @@
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#define TSR 0x5
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#define TCNT 0x6
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#define TCFV 0x10
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struct tpu_priv {
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struct clocksource cs;
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void __iomem *mapbase1;
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@ -31,8 +33,8 @@ static inline unsigned long read_tcnt32(struct tpu_priv *p)
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{
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unsigned long tcnt;
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tcnt = readw(p->mapbase1 + TCNT) << 16;
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tcnt |= readw(p->mapbase2 + TCNT);
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tcnt = ioread16be(p->mapbase1 + TCNT) << 16;
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tcnt |= ioread16be(p->mapbase2 + TCNT);
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return tcnt;
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}
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@ -41,7 +43,7 @@ static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val)
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unsigned long v1, v2, v3;
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int o1, o2;
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o1 = readb(p->mapbase1 + TSR) & 0x10;
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o1 = ioread8(p->mapbase1 + TSR) & TCFV;
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/* Make sure the timer value is stable. Stolen from acpi_pm.c */
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do {
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@ -49,7 +51,7 @@ static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val)
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v1 = read_tcnt32(p);
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v2 = read_tcnt32(p);
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v3 = read_tcnt32(p);
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o1 = readb(p->mapbase1 + TSR) & 0x10;
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o1 = ioread8(p->mapbase1 + TSR) & TCFV;
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} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
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|| (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
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@ -82,10 +84,10 @@ static int tpu_clocksource_enable(struct clocksource *cs)
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WARN_ON(p->cs_enabled);
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writew(0, p->mapbase1 + TCNT);
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writew(0, p->mapbase2 + TCNT);
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writeb(0x0f, p->mapbase1 + TCR);
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writeb(0x03, p->mapbase2 + TCR);
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iowrite16be(0, p->mapbase1 + TCNT);
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iowrite16be(0, p->mapbase2 + TCNT);
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iowrite8(0x0f, p->mapbase1 + TCR);
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iowrite8(0x03, p->mapbase2 + TCR);
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p->cs_enabled = true;
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return 0;
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@ -97,8 +99,8 @@ static void tpu_clocksource_disable(struct clocksource *cs)
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WARN_ON(!p->cs_enabled);
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writeb(0, p->mapbase1 + TCR);
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writeb(0, p->mapbase2 + TCR);
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iowrite8(0, p->mapbase1 + TCR);
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iowrite8(0, p->mapbase2 + TCR);
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p->cs_enabled = false;
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}
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