pinctrl: samsung: Use one GPIO chip per pin bank
This patch modifies the pinctrl-samsung driver to register one GPIO chip
per pin bank, instead of a single chip for all pin banks of the
controller.
It simplifies GPIO accesses a lot (constant time instead of looping
through the list of banks to find the right one) and should have a good
effect on performance of any bit-banging driver.
In addition it allows to reference GPIO pins by a phandle to the bank
node and a local pin offset inside of the bank (similar to previous
gpiolib driver), which is more clear and readable than using indices
relative to the whole pin controller.
Example:
device {
/* ... */
gpios = <&gpk0 4 0>;
/* ... */
};
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Tomasz Figa
Linus Walleij
parent
595be7268a
commit
d3a7b9e3a1
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@ -48,6 +48,11 @@ struct pin_config {
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static unsigned int pin_base = 0;
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static inline struct samsung_pin_bank *gc_to_pin_bank(struct gpio_chip *gc)
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{
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return container_of(gc, struct samsung_pin_bank, gpio_chip);
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}
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/* check if the selector is a valid pin group selector */
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static int samsung_get_group_count(struct pinctrl_dev *pctldev)
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{
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@ -333,9 +338,12 @@ static int samsung_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
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void __iomem *reg;
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u32 data, pin_offset, mask, shift;
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bank = gc_to_pin_bank(range->gc);
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drvdata = pinctrl_dev_get_drvdata(pctldev);
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pin_to_reg_bank(drvdata, offset, ®, &pin_offset, &bank);
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pin_offset = offset - bank->pin_base;
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reg = drvdata->virt_base + bank->pctl_offset;
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mask = (1 << bank->func_width) - 1;
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shift = pin_offset * bank->func_width;
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@ -469,17 +477,16 @@ static struct pinconf_ops samsung_pinconf_ops = {
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/* gpiolib gpio_set callback function */
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static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
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{
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struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
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void __iomem *reg;
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u32 pin_offset, data;
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struct samsung_pinctrl_drv_data *drvdata;
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u32 data;
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drvdata = dev_get_drvdata(gc->dev);
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reg = bank->drvdata->virt_base + bank->pctl_offset;
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pin_to_reg_bank(drvdata, offset, ®, &pin_offset, NULL);
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data = readl(reg + DAT_REG);
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data &= ~(1 << pin_offset);
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data &= ~(1 << offset);
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if (value)
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data |= 1 << pin_offset;
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data |= 1 << offset;
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writel(data, reg + DAT_REG);
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}
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@ -487,14 +494,13 @@ static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
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static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
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{
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void __iomem *reg;
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u32 pin_offset, data;
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struct samsung_pinctrl_drv_data *drvdata;
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u32 data;
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struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
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drvdata = dev_get_drvdata(gc->dev);
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reg = bank->drvdata->virt_base + bank->pctl_offset;
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pin_to_reg_bank(drvdata, offset, ®, &pin_offset, NULL);
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data = readl(reg + DAT_REG);
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data >>= pin_offset;
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data >>= offset;
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data &= 1;
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return data;
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}
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@ -724,12 +730,16 @@ static int __init samsung_pinctrl_register(struct platform_device *pdev,
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return -EINVAL;
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}
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drvdata->grange.name = "samsung-pctrl-gpio-range";
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drvdata->grange.id = 0;
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drvdata->grange.base = drvdata->ctrl->base;
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drvdata->grange.npins = drvdata->ctrl->nr_pins;
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drvdata->grange.gc = drvdata->gc;
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pinctrl_add_gpio_range(drvdata->pctl_dev, &drvdata->grange);
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for (bank = 0; bank < drvdata->ctrl->nr_banks; ++bank) {
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pin_bank = &drvdata->ctrl->pin_banks[bank];
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pin_bank->grange.name = pin_bank->name;
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pin_bank->grange.id = bank;
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pin_bank->grange.pin_base = pin_bank->pin_base;
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pin_bank->grange.base = pin_bank->gpio_chip.base;
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pin_bank->grange.npins = pin_bank->gpio_chip.ngpio;
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pin_bank->grange.gc = &pin_bank->gpio_chip;
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pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange);
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}
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ret = samsung_pinctrl_parse_dt(pdev, drvdata);
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if (ret) {
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@ -740,49 +750,68 @@ static int __init samsung_pinctrl_register(struct platform_device *pdev,
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return 0;
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}
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static const struct gpio_chip samsung_gpiolib_chip = {
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.set = samsung_gpio_set,
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.get = samsung_gpio_get,
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.direction_input = samsung_gpio_direction_input,
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.direction_output = samsung_gpio_direction_output,
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.owner = THIS_MODULE,
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};
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/* register the gpiolib interface with the gpiolib subsystem */
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static int __init samsung_gpiolib_register(struct platform_device *pdev,
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struct samsung_pinctrl_drv_data *drvdata)
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{
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struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
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struct samsung_pin_bank *bank = ctrl->pin_banks;
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struct gpio_chip *gc;
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int ret;
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int i;
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gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
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if (!gc) {
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dev_err(&pdev->dev, "mem alloc for gpio_chip failed\n");
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return -ENOMEM;
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}
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for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
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bank->gpio_chip = samsung_gpiolib_chip;
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drvdata->gc = gc;
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gc->base = drvdata->ctrl->base;
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gc->ngpio = drvdata->ctrl->nr_pins;
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gc->dev = &pdev->dev;
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gc->set = samsung_gpio_set;
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gc->get = samsung_gpio_get;
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gc->direction_input = samsung_gpio_direction_input;
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gc->direction_output = samsung_gpio_direction_output;
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gc->label = drvdata->ctrl->label;
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gc->owner = THIS_MODULE;
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ret = gpiochip_add(gc);
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if (ret) {
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dev_err(&pdev->dev, "failed to register gpio_chip %s, error "
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"code: %d\n", gc->label, ret);
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return ret;
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gc = &bank->gpio_chip;
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gc->base = ctrl->base + bank->pin_base;
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gc->ngpio = bank->nr_pins;
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gc->dev = &pdev->dev;
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gc->of_node = bank->of_node;
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gc->label = bank->name;
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ret = gpiochip_add(gc);
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if (ret) {
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dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n",
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gc->label, ret);
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goto fail;
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}
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}
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return 0;
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fail:
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for (--i, --bank; i >= 0; --i, --bank)
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if (gpiochip_remove(&bank->gpio_chip))
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dev_err(&pdev->dev, "gpio chip %s remove failed\n",
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bank->gpio_chip.label);
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return ret;
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}
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/* unregister the gpiolib interface with the gpiolib subsystem */
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static int __init samsung_gpiolib_unregister(struct platform_device *pdev,
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struct samsung_pinctrl_drv_data *drvdata)
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{
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int ret = gpiochip_remove(drvdata->gc);
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if (ret) {
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struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
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struct samsung_pin_bank *bank = ctrl->pin_banks;
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int ret = 0;
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int i;
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for (i = 0; !ret && i < ctrl->nr_banks; ++i, ++bank)
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ret = gpiochip_remove(&bank->gpio_chip);
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if (ret)
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dev_err(&pdev->dev, "gpio chip remove failed\n");
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return ret;
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}
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return 0;
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return ret;
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}
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static const struct of_device_id samsung_pinctrl_dt_match[];
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@ -23,6 +23,8 @@
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#include <linux/pinctrl/consumer.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/gpio.h>
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/* register offsets within a pin bank */
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#define DAT_REG 0x4
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#define PUD_REG 0x8
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@ -113,6 +115,8 @@ struct samsung_pinctrl_drv_data;
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* @of_node: OF node of the bank.
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* @drvdata: link to controller driver data
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* @irq_domain: IRQ domain of the bank.
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* @gpio_chip: GPIO chip of the bank.
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* @grange: linux gpio pin range supported by this bank.
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*/
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struct samsung_pin_bank {
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u32 pctl_offset;
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@ -129,6 +133,8 @@ struct samsung_pin_bank {
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struct device_node *of_node;
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struct samsung_pinctrl_drv_data *drvdata;
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struct irq_domain *irq_domain;
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struct gpio_chip gpio_chip;
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struct pinctrl_gpio_range grange;
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};
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/**
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@ -186,8 +192,6 @@ struct samsung_pin_ctrl {
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* @nr_groups: number of such pin groups.
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* @pmx_functions: list of pin functions available to the driver.
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* @nr_function: number of such pin functions.
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* @gc: gpio_chip instance registered with gpiolib.
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* @grange: linux gpio pin range supported by this controller.
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*/
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struct samsung_pinctrl_drv_data {
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void __iomem *virt_base;
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@ -204,9 +208,6 @@ struct samsung_pinctrl_drv_data {
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unsigned int nr_functions;
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struct irq_domain *wkup_irqd;
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struct gpio_chip *gc;
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struct pinctrl_gpio_range grange;
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};
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/**
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