No barrier needed on au1x.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -50,11 +50,6 @@
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int (*board_pci_idsel)(unsigned int devsel, int assert);
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/* CP0 hazard avoidance. */
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#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \
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"nop; nop; nop; nop;\t" \
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".set reorder\n\t")
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void mod_wired_entry(int entry, unsigned long entrylo0,
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unsigned long entrylo1, unsigned long entryhi,
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unsigned long pagemask)
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@ -66,16 +61,12 @@ void mod_wired_entry(int entry, unsigned long entrylo0,
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old_ctx = read_c0_entryhi() & 0xff;
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old_pagemask = read_c0_pagemask();
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write_c0_index(entry);
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BARRIER;
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write_c0_pagemask(pagemask);
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write_c0_entryhi(entryhi);
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write_c0_entrylo0(entrylo0);
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write_c0_entrylo1(entrylo1);
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BARRIER;
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tlb_write_indexed();
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BARRIER;
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write_c0_entryhi(old_ctx);
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BARRIER;
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write_c0_pagemask(old_pagemask);
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}
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