ARM: SAMSUNG: Use spin_lock_{irqsave,irqrestore} in clk_set_rate
The spinlock clocks_lock can be held during ISR, hence it is not safe to hold that lock with disabling interrupts. It fixes following potential deadlock. ========================================================= [ INFO: possible irq lock inversion dependency detected ] 3.6.0-rc4+ #2 Not tainted --------------------------------------------------------- swapper/0/1 just changed the state of lock: (&(&host->lock)->rlock){-.....}, at: [<c027fb0d>] sdhci_irq+0x15/0x564 but this lock took another, HARDIRQ-unsafe lock in the past: (clocks_lock){+.+...} and interrupts could create inverse lock ordering between them. other info that might help us debug this: Possible interrupt unsafe locking scenario: CPU0 CPU1 ---- ---- lock(clocks_lock); local_irq_disable(); lock(&(&host->lock)->rlock); lock(clocks_lock); <Interrupt> lock(&(&host->lock)->rlock); *** DEADLOCK *** Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -144,6 +144,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
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int clk_set_rate(struct clk *clk, unsigned long rate)
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int clk_set_rate(struct clk *clk, unsigned long rate)
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{
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{
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unsigned long flags;
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int ret;
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int ret;
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if (IS_ERR(clk))
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if (IS_ERR(clk))
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@ -159,9 +160,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
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if (clk->ops == NULL || clk->ops->set_rate == NULL)
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if (clk->ops == NULL || clk->ops->set_rate == NULL)
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return -EINVAL;
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return -EINVAL;
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spin_lock(&clocks_lock);
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spin_lock_irqsave(&clocks_lock, flags);
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ret = (clk->ops->set_rate)(clk, rate);
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ret = (clk->ops->set_rate)(clk, rate);
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spin_unlock(&clocks_lock);
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spin_unlock_irqrestore(&clocks_lock, flags);
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return ret;
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return ret;
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}
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}
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