Merge branches 'cxgb4', 'ipoib' and 'mlx4' into for-next
This commit is contained in:
commit
d72623b665
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@ -752,6 +752,9 @@ void ipoib_cm_send(struct net_device *dev, struct sk_buff *skb, struct ipoib_cm_
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dev->trans_start = jiffies;
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++tx->tx_head;
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skb_orphan(skb);
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skb_dst_drop(skb);
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if (++priv->tx_outstanding == ipoib_sendq_size) {
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ipoib_dbg(priv, "TX ring 0x%x full, stopping kernel net queue\n",
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tx->qp->qp_num);
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@ -615,8 +615,9 @@ void ipoib_send(struct net_device *dev, struct sk_buff *skb,
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address->last_send = priv->tx_head;
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++priv->tx_head;
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skb_orphan(skb);
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skb_orphan(skb);
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skb_dst_drop(skb);
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}
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if (unlikely(priv->tx_outstanding > MAX_SEND_CQE))
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@ -1338,6 +1338,7 @@ int mlx4_QUERY_HCA(struct mlx4_dev *dev,
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{
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struct mlx4_cmd_mailbox *mailbox;
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__be32 *outbox;
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u32 dword_field;
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int err;
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u8 byte_field;
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@ -1372,10 +1373,18 @@ int mlx4_QUERY_HCA(struct mlx4_dev *dev,
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MLX4_GET(param->rdmarc_base, outbox, INIT_HCA_RDMARC_BASE_OFFSET);
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MLX4_GET(param->log_rd_per_qp, outbox, INIT_HCA_LOG_RD_OFFSET);
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MLX4_GET(dword_field, outbox, INIT_HCA_FLAGS_OFFSET);
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if (dword_field & (1 << INIT_HCA_DEVICE_MANAGED_FLOW_STEERING_EN)) {
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param->steering_mode = MLX4_STEERING_MODE_DEVICE_MANAGED;
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} else {
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MLX4_GET(byte_field, outbox, INIT_HCA_UC_STEERING_OFFSET);
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if (byte_field & 0x8)
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param->steering_mode = MLX4_STEERING_MODE_B0;
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else
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param->steering_mode = MLX4_STEERING_MODE_A0;
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}
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/* steering attributes */
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if (dev->caps.steering_mode ==
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MLX4_STEERING_MODE_DEVICE_MANAGED) {
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if (param->steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) {
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MLX4_GET(param->mc_base, outbox, INIT_HCA_FS_BASE_OFFSET);
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MLX4_GET(param->log_mc_entry_sz, outbox,
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INIT_HCA_FS_LOG_ENTRY_SZ_OFFSET);
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@ -172,6 +172,7 @@ struct mlx4_init_hca_param {
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u8 log_uar_sz;
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u8 uar_page_sz; /* log pg sz in 4k chunks */
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u8 fs_hash_enable_bits;
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u8 steering_mode; /* for QUERY_HCA */
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u64 dev_cap_enabled;
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};
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@ -85,15 +85,15 @@ static int probe_vf;
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module_param(probe_vf, int, 0644);
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MODULE_PARM_DESC(probe_vf, "number of vfs to probe by pf driver (num_vfs > 0)");
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int mlx4_log_num_mgm_entry_size = 10;
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int mlx4_log_num_mgm_entry_size = MLX4_DEFAULT_MGM_LOG_ENTRY_SIZE;
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module_param_named(log_num_mgm_entry_size,
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mlx4_log_num_mgm_entry_size, int, 0444);
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MODULE_PARM_DESC(log_num_mgm_entry_size, "log mgm size, that defines the num"
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" of qp per mcg, for example:"
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" 10 gives 248.range: 9<="
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" 10 gives 248.range: 7 <="
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" log_num_mgm_entry_size <= 12."
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" Not in use with device managed"
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" flow steering");
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" To activate device managed"
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" flow steering when available, set to -1");
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static bool enable_64b_cqe_eqe;
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module_param(enable_64b_cqe_eqe, bool, 0444);
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@ -281,28 +281,6 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
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dev->caps.max_gso_sz = dev_cap->max_gso_sz;
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dev->caps.max_rss_tbl_sz = dev_cap->max_rss_tbl_sz;
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if (dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_FS_EN) {
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dev->caps.steering_mode = MLX4_STEERING_MODE_DEVICE_MANAGED;
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dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry;
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dev->caps.fs_log_max_ucast_qp_range_size =
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dev_cap->fs_log_max_ucast_qp_range_size;
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} else {
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if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER &&
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dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) {
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dev->caps.steering_mode = MLX4_STEERING_MODE_B0;
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} else {
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dev->caps.steering_mode = MLX4_STEERING_MODE_A0;
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if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER ||
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dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER)
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mlx4_warn(dev, "Must have UC_STEER and MC_STEER flags "
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"set to use B0 steering. Falling back to A0 steering mode.\n");
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}
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dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev);
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}
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mlx4_dbg(dev, "Steering mode is: %s\n",
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mlx4_steering_mode_str(dev->caps.steering_mode));
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/* Sense port always allowed on supported devices for ConnectX-1 and -2 */
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if (mlx4_priv(dev)->pci_dev_data & MLX4_PCI_DEV_FORCE_SENSE_PORT)
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dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT;
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@ -493,6 +471,23 @@ int mlx4_is_slave_active(struct mlx4_dev *dev, int slave)
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}
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EXPORT_SYMBOL(mlx4_is_slave_active);
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static void slave_adjust_steering_mode(struct mlx4_dev *dev,
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struct mlx4_dev_cap *dev_cap,
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struct mlx4_init_hca_param *hca_param)
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{
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dev->caps.steering_mode = hca_param->steering_mode;
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if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) {
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dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry;
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dev->caps.fs_log_max_ucast_qp_range_size =
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dev_cap->fs_log_max_ucast_qp_range_size;
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} else
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dev->caps.num_qp_per_mgm =
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4 * ((1 << hca_param->log_mc_entry_sz)/16 - 2);
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mlx4_dbg(dev, "Steering mode is: %s\n",
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mlx4_steering_mode_str(dev->caps.steering_mode));
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}
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static int mlx4_slave_cap(struct mlx4_dev *dev)
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{
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int err;
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@ -635,6 +630,8 @@ static int mlx4_slave_cap(struct mlx4_dev *dev)
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dev->caps.cqe_size = 32;
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}
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slave_adjust_steering_mode(dev, &dev_cap, &hca_param);
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return 0;
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err_mem:
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@ -1321,6 +1318,59 @@ static void mlx4_parav_master_pf_caps(struct mlx4_dev *dev)
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}
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}
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static int choose_log_fs_mgm_entry_size(int qp_per_entry)
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{
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int i = MLX4_MIN_MGM_LOG_ENTRY_SIZE;
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for (i = MLX4_MIN_MGM_LOG_ENTRY_SIZE; i <= MLX4_MAX_MGM_LOG_ENTRY_SIZE;
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i++) {
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if (qp_per_entry <= 4 * ((1 << i) / 16 - 2))
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break;
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}
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return (i <= MLX4_MAX_MGM_LOG_ENTRY_SIZE) ? i : -1;
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}
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static void choose_steering_mode(struct mlx4_dev *dev,
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struct mlx4_dev_cap *dev_cap)
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{
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if (mlx4_log_num_mgm_entry_size == -1 &&
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dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_FS_EN &&
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(!mlx4_is_mfunc(dev) ||
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(dev_cap->fs_max_num_qp_per_entry >= (num_vfs + 1))) &&
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choose_log_fs_mgm_entry_size(dev_cap->fs_max_num_qp_per_entry) >=
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MLX4_MIN_MGM_LOG_ENTRY_SIZE) {
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dev->oper_log_mgm_entry_size =
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choose_log_fs_mgm_entry_size(dev_cap->fs_max_num_qp_per_entry);
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dev->caps.steering_mode = MLX4_STEERING_MODE_DEVICE_MANAGED;
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dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry;
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dev->caps.fs_log_max_ucast_qp_range_size =
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dev_cap->fs_log_max_ucast_qp_range_size;
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} else {
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if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER &&
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dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER)
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dev->caps.steering_mode = MLX4_STEERING_MODE_B0;
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else {
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dev->caps.steering_mode = MLX4_STEERING_MODE_A0;
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if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER ||
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dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER)
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mlx4_warn(dev, "Must have both UC_STEER and MC_STEER flags "
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"set to use B0 steering. Falling back to A0 steering mode.\n");
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}
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dev->oper_log_mgm_entry_size =
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mlx4_log_num_mgm_entry_size > 0 ?
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mlx4_log_num_mgm_entry_size :
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MLX4_DEFAULT_MGM_LOG_ENTRY_SIZE;
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dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev);
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}
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mlx4_dbg(dev, "Steering mode is: %s, oper_log_mgm_entry_size = %d, "
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"modparam log_num_mgm_entry_size = %d\n",
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mlx4_steering_mode_str(dev->caps.steering_mode),
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dev->oper_log_mgm_entry_size,
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mlx4_log_num_mgm_entry_size);
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}
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static int mlx4_init_hca(struct mlx4_dev *dev)
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{
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struct mlx4_priv *priv = mlx4_priv(dev);
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@ -1360,6 +1410,8 @@ static int mlx4_init_hca(struct mlx4_dev *dev)
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goto err_stop_fw;
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}
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choose_steering_mode(dev, &dev_cap);
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if (mlx4_is_master(dev))
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mlx4_parav_master_pf_caps(dev);
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@ -2452,6 +2504,17 @@ static int __init mlx4_verify_params(void)
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port_type_array[0] = true;
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}
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if (mlx4_log_num_mgm_entry_size != -1 &&
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(mlx4_log_num_mgm_entry_size < MLX4_MIN_MGM_LOG_ENTRY_SIZE ||
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mlx4_log_num_mgm_entry_size > MLX4_MAX_MGM_LOG_ENTRY_SIZE)) {
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pr_warning("mlx4_core: mlx4_log_num_mgm_entry_size (%d) not "
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"in legal range (-1 or %d..%d)\n",
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mlx4_log_num_mgm_entry_size,
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MLX4_MIN_MGM_LOG_ENTRY_SIZE,
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MLX4_MAX_MGM_LOG_ENTRY_SIZE);
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return -1;
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}
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return 0;
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}
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@ -54,12 +54,7 @@ struct mlx4_mgm {
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int mlx4_get_mgm_entry_size(struct mlx4_dev *dev)
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{
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if (dev->caps.steering_mode ==
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MLX4_STEERING_MODE_DEVICE_MANAGED)
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return 1 << MLX4_FS_MGM_LOG_ENTRY_SIZE;
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else
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return min((1 << mlx4_log_num_mgm_entry_size),
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MLX4_MAX_MGM_ENTRY_SIZE);
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return 1 << dev->oper_log_mgm_entry_size;
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}
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int mlx4_get_qp_per_mgm(struct mlx4_dev *dev)
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@ -94,8 +94,10 @@ enum {
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};
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enum {
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MLX4_MAX_MGM_ENTRY_SIZE = 0x1000,
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MLX4_MAX_QP_PER_MGM = 4 * (MLX4_MAX_MGM_ENTRY_SIZE / 16 - 2),
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MLX4_DEFAULT_MGM_LOG_ENTRY_SIZE = 10,
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MLX4_MIN_MGM_LOG_ENTRY_SIZE = 7,
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MLX4_MAX_MGM_LOG_ENTRY_SIZE = 12,
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MLX4_MAX_QP_PER_MGM = 4 * ((1 << MLX4_MAX_MGM_LOG_ENTRY_SIZE) / 16 - 2),
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MLX4_MTT_ENTRY_PER_SEG = 8,
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};
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@ -3071,6 +3071,7 @@ int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave,
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struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
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struct list_head *rlist = &tracker->slave_list[slave].res_list[RES_MAC];
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int err;
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int qpn;
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struct mlx4_net_trans_rule_hw_ctrl *ctrl;
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struct _rule_hw *rule_header;
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int header_id;
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@ -3080,13 +3081,21 @@ int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave,
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return -EOPNOTSUPP;
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ctrl = (struct mlx4_net_trans_rule_hw_ctrl *)inbox->buf;
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qpn = be32_to_cpu(ctrl->qpn) & 0xffffff;
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err = get_res(dev, slave, qpn, RES_QP, NULL);
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if (err) {
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pr_err("Steering rule with qpn 0x%x rejected.\n", qpn);
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return err;
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}
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rule_header = (struct _rule_hw *)(ctrl + 1);
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header_id = map_hw_to_sw_id(be16_to_cpu(rule_header->id));
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switch (header_id) {
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case MLX4_NET_TRANS_RULE_ID_ETH:
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if (validate_eth_header_mac(slave, rule_header, rlist))
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return -EINVAL;
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if (validate_eth_header_mac(slave, rule_header, rlist)) {
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err = -EINVAL;
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goto err_put;
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}
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break;
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case MLX4_NET_TRANS_RULE_ID_IB:
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break;
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@ -3094,14 +3103,17 @@ int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave,
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case MLX4_NET_TRANS_RULE_ID_TCP:
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case MLX4_NET_TRANS_RULE_ID_UDP:
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pr_warn("Can't attach FS rule without L2 headers, adding L2 header.\n");
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if (add_eth_header(dev, slave, inbox, rlist, header_id))
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return -EINVAL;
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if (add_eth_header(dev, slave, inbox, rlist, header_id)) {
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err = -EINVAL;
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goto err_put;
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}
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vhcr->in_modifier +=
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sizeof(struct mlx4_net_trans_rule_hw_eth) >> 2;
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break;
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default:
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pr_err("Corrupted mailbox.\n");
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return -EINVAL;
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err = -EINVAL;
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goto err_put;
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}
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err = mlx4_cmd_imm(dev, inbox->dma, &vhcr->out_param,
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@ -3109,16 +3121,18 @@ int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave,
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MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
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MLX4_CMD_NATIVE);
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if (err)
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return err;
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goto err_put;
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err = add_res_range(dev, slave, vhcr->out_param, 1, RES_FS_RULE, 0);
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if (err) {
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mlx4_err(dev, "Fail to add flow steering resources.\n ");
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/* detach rule*/
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mlx4_cmd(dev, vhcr->out_param, 0, 0,
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MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
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MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
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MLX4_CMD_NATIVE);
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}
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err_put:
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put_res(dev, slave, qpn, RES_QP);
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return err;
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}
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|
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|
@ -625,6 +625,7 @@ struct mlx4_dev {
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u8 rev_id;
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char board_id[MLX4_BOARD_ID_LEN];
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int num_vfs;
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int oper_log_mgm_entry_size;
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u64 regid_promisc_array[MLX4_MAX_PORTS + 1];
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u64 regid_allmulti_array[MLX4_MAX_PORTS + 1];
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};
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