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sh-pfc: Replace first_gpio and last_gpio with nr_gpios 

The SoC information first_gpio field is always equal to 0, and the
last_gpio field is the index of the last entry in the pinmux_gpios
array. Replace the first_gpio and last_gpio fields by a nr_gpios field,
and initialize it to ARRAY_SIZE(pinmux_gpios).

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Laurent Pinchart 2012-11-28 17:51:00 +01:00
parent 35ad42719e
commit d7a7ca5781
20 changed files with 43 additions and 68 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/pinctrl/sh-pfc/core.c
View File

@ -260,7 +260,7 @@ static void sh_pfc_setup_data_regs(struct sh_pfc *pfc)
struct pinmux_data_reg *drp;
int k;
for (k = pfc->info->first_gpio; k <= pfc->info->last_gpio; k++)
for (k = 0; k < pfc->info->nr_gpios; k++)
sh_pfc_setup_data_reg(pfc, k);
k = 0;

11
drivers/pinctrl/sh-pfc/gpio.c
View File

@ -130,12 +130,10 @@ static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip)
gc->set = sh_gpio_set;
gc->to_irq = sh_gpio_to_irq;
WARN_ON(pfc->info->first_gpio != 0); /* needs testing */
gc->label = pfc->info->name;
gc->owner = THIS_MODULE;
gc->base = pfc->info->first_gpio;
gc->ngpio = (pfc->info->last_gpio - pfc->info->first_gpio) + 1;
gc->base = 0;
gc->ngpio = pfc->info->nr_gpios;
}
int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
@ -157,9 +155,8 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
pfc->gpio = chip;
pr_info("%s handling gpio %d -> %d\n",
pfc->info->name, pfc->info->first_gpio,
pfc->info->last_gpio);
pr_info("%s handling gpio 0 -> %u\n",
pfc->info->name, pfc->info->nr_gpios - 1);
return 0;
}

5
drivers/pinctrl/sh-pfc/pfc-r8a7740.c
View File

@ -2597,10 +2597,9 @@ struct sh_pfc_soc_info r8a7740_pinmux_info = {
.function = { PINMUX_FUNCTION_BEGIN,
PINMUX_FUNCTION_END },
.first_gpio = GPIO_PORT0,
.last_gpio = GPIO_FN_TRACEAUD_FROM_MEMC,
.gpios = pinmux_gpios,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

5
drivers/pinctrl/sh-pfc/pfc-r8a7779.c
View File

@ -2612,10 +2612,9 @@ struct sh_pfc_soc_info r8a7779_pinmux_info = {
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_GP_0_0,
.last_gpio = GPIO_FN_SCK4_B,
.gpios = pinmux_gpios,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

5
drivers/pinctrl/sh-pfc/pfc-sh7203.c
View File

@ -1580,10 +1580,9 @@ struct sh_pfc_soc_info sh7203_pinmux_info = {
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_PA7,
.last_gpio = GPIO_FN_LCD_DATA0,
.gpios = pinmux_gpios,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

5
drivers/pinctrl/sh-pfc/pfc-sh7264.c
View File

@ -2119,10 +2119,9 @@ struct sh_pfc_soc_info sh7264_pinmux_info = {
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_PA3,
.last_gpio = GPIO_FN_LCD_M_DISP,
.gpios = pinmux_gpios,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

5
drivers/pinctrl/sh-pfc/pfc-sh7269.c
View File

@ -2822,10 +2822,9 @@ struct sh_pfc_soc_info sh7269_pinmux_info = {
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_PA1,
.last_gpio = GPIO_FN_LCD_M_DISP,
.gpios = pinmux_gpios,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

5
drivers/pinctrl/sh-pfc/pfc-sh7372.c
View File

@ -1643,10 +1643,9 @@ struct sh_pfc_soc_info sh7372_pinmux_info = {
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_PORT0,
.last_gpio = GPIO_FN_SDENC_DV_CLKI,
.gpios = pinmux_gpios,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

5
drivers/pinctrl/sh-pfc/pfc-sh73a0.c
View File

@ -2779,10 +2779,9 @@ struct sh_pfc_soc_info sh73a0_pinmux_info = {
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_PORT0,
.last_gpio = GPIO_FN_FSIAISLD_PU,
.gpios = pinmux_gpios,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

5
drivers/pinctrl/sh-pfc/pfc-sh7720.c
View File

@ -1223,10 +1223,9 @@ struct sh_pfc_soc_info sh7720_pinmux_info = {
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_PTA7,
.last_gpio = GPIO_FN_STATUS1,
.gpios = pinmux_gpios,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

5
drivers/pinctrl/sh-pfc/pfc-sh7722.c
View File

@ -1767,10 +1767,9 @@ struct sh_pfc_soc_info sh7722_pinmux_info = {
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_PTA7,
.last_gpio = GPIO_FN_KEYOUT5_IN5,
.gpios = pinmux_gpios,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

5
drivers/pinctrl/sh-pfc/pfc-sh7723.c
View File

@ -1891,10 +1891,9 @@ struct sh_pfc_soc_info sh7723_pinmux_info = {
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_PTA7,
.last_gpio = GPIO_FN_IDEA0,
.gpios = pinmux_gpios,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

5
drivers/pinctrl/sh-pfc/pfc-sh7724.c
View File

@ -2213,10 +2213,9 @@ struct sh_pfc_soc_info sh7724_pinmux_info = {
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_PTA7,
.last_gpio = GPIO_FN_INTC_IRQ0,
.gpios = pinmux_gpios,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

5
drivers/pinctrl/sh-pfc/pfc-sh7734.c
View File

@ -2463,10 +2463,9 @@ struct sh_pfc_soc_info sh7734_pinmux_info = {
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_GP_0_0,
.last_gpio = GPIO_FN_ST_CLKOUT,
.gpios = pinmux_gpios,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

5
drivers/pinctrl/sh-pfc/pfc-sh7757.c
View File

@ -2270,10 +2270,9 @@ struct sh_pfc_soc_info sh7757_pinmux_info = {
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_PTA0,
.last_gpio = GPIO_FN_ON_DQ0,
.gpios = pinmux_gpios,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

5
drivers/pinctrl/sh-pfc/pfc-sh7785.c
View File

@ -1292,10 +1292,9 @@ struct sh_pfc_soc_info sh7785_pinmux_info = {
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_PA7,
.last_gpio = GPIO_FN_IRQOUT,
.gpios = pinmux_gpios,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

5
drivers/pinctrl/sh-pfc/pfc-sh7786.c
View File

@ -825,10 +825,9 @@ struct sh_pfc_soc_info sh7786_pinmux_info = {
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_PA7,
.last_gpio = GPIO_FN_IRL4,
.gpios = pinmux_gpios,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

3
drivers/pinctrl/sh-pfc/pfc-shx3.c
View File

@ -572,9 +572,8 @@ struct sh_pfc_soc_info shx3_pinmux_info = {
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_PA7,
.last_gpio = GPIO_FN_STATUS0,
.gpios = shx3_pinmux_gpios,
.nr_gpios = ARRAY_SIZE(shx3_pinmux_gpios),
.gpio_data = shx3_pinmux_data,
.gpio_data_size = ARRAY_SIZE(shx3_pinmux_data),
.cfg_regs = shx3_pinmux_config_regs,

16
drivers/pinctrl/sh-pfc/pinctrl.c
View File

@ -336,7 +336,7 @@ static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
{
int i;
pmx->nr_pads = pfc->info->last_gpio - pfc->info->first_gpio + 1;
pmx->nr_pads = pfc->info->nr_gpios;
pmx->pads = devm_kzalloc(pfc->dev, sizeof(*pmx->pads) * pmx->nr_pads,
GFP_KERNEL);
@ -345,17 +345,11 @@ static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
return -ENOMEM;
}
/*
* We don't necessarily have a 1:1 mapping between pin and linux
* GPIO number, as the latter maps to the associated enum_id.
* Care needs to be taken to translate back to pin space when
* dealing with any pin configurations.
*/
for (i = 0; i < pmx->nr_pads; i++) {
struct pinctrl_pin_desc *pin = pmx->pads + i;
struct pinmux_gpio *gpio = pfc->info->gpios + i;
pin->number = pfc->info->first_gpio + i;
pin->number = i;
pin->name = gpio->name;
/* XXX */
@ -421,9 +415,9 @@ int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
pmx->range.name = DRV_NAME,
pmx->range.id = 0;
pmx->range.npins = pfc->info->last_gpio - pfc->info->first_gpio + 1;
pmx->range.base = pfc->info->first_gpio;
pmx->range.pin_base = pfc->info->first_gpio;
pmx->range.npins = pfc->info->nr_gpios;
pmx->range.base = 0;
pmx->range.pin_base = 0;
pinctrl_add_gpio_range(pmx->pctl, &pmx->range);

4
drivers/pinctrl/sh-pfc/sh_pfc.h
View File

@ -99,9 +99,9 @@ struct sh_pfc_soc_info {
struct pinmux_range mark;
struct pinmux_range function;
unsigned first_gpio, last_gpio;
struct pinmux_gpio *gpios;
unsigned int nr_gpios;
struct pinmux_cfg_reg *cfg_regs;
struct pinmux_data_reg *data_regs;