blackfin: Provide atomic_{or,xor,and}
Implement atomic logic ops -- atomic_{or,xor,and}. These will replace the atomic_{set,clear}_mask functions that are available on some archs. TODO: use inline asm or at least asm macros to collapse the lot. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -16,19 +16,33 @@
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#include <linux/types.h>
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#include <linux/types.h>
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asmlinkage int __raw_uncached_fetch_asm(const volatile int *ptr);
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asmlinkage int __raw_uncached_fetch_asm(const volatile int *ptr);
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asmlinkage int __raw_atomic_update_asm(volatile int *ptr, int value);
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asmlinkage int __raw_atomic_add_asm(volatile int *ptr, int value);
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asmlinkage int __raw_atomic_clear_asm(volatile int *ptr, int value);
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asmlinkage int __raw_atomic_set_asm(volatile int *ptr, int value);
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asmlinkage int __raw_atomic_and_asm(volatile int *ptr, int value);
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asmlinkage int __raw_atomic_or_asm(volatile int *ptr, int value);
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asmlinkage int __raw_atomic_xor_asm(volatile int *ptr, int value);
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asmlinkage int __raw_atomic_xor_asm(volatile int *ptr, int value);
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asmlinkage int __raw_atomic_test_asm(const volatile int *ptr, int value);
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asmlinkage int __raw_atomic_test_asm(const volatile int *ptr, int value);
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#define atomic_read(v) __raw_uncached_fetch_asm(&(v)->counter)
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#define atomic_read(v) __raw_uncached_fetch_asm(&(v)->counter)
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#define atomic_add_return(i, v) __raw_atomic_update_asm(&(v)->counter, i)
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#define atomic_add_return(i, v) __raw_atomic_add_asm(&(v)->counter, i)
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#define atomic_sub_return(i, v) __raw_atomic_update_asm(&(v)->counter, -(i))
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#define atomic_sub_return(i, v) __raw_atomic_add_asm(&(v)->counter, -(i))
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#define atomic_clear_mask(m, v) __raw_atomic_clear_asm(&(v)->counter, m)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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#define atomic_set_mask(m, v) __raw_atomic_set_asm(&(v)->counter, m)
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#define atomic_or(i, v) (void)__raw_atomic_or_asm(&(v)->counter, i)
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#define atomic_and(i, v) (void)__raw_atomic_and_asm(&(v)->counter, i)
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#define atomic_xor(i, v) (void)__raw_atomic_xor_asm(&(v)->counter, i)
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static inline __deprecated void atomic_clear_mask(unsigned int mask, atomic_t *v)
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{
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atomic_and(~mask, v);
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}
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static inline __deprecated void atomic_set_mask(unsigned int mask, atomic_t *v)
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{
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atomic_or(mask, v);
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}
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#endif
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#endif
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@ -83,11 +83,12 @@ EXPORT_SYMBOL(insl);
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EXPORT_SYMBOL(insl_16);
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EXPORT_SYMBOL(insl_16);
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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EXPORT_SYMBOL(__raw_atomic_update_asm);
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EXPORT_SYMBOL(__raw_atomic_add_asm);
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EXPORT_SYMBOL(__raw_atomic_clear_asm);
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EXPORT_SYMBOL(__raw_atomic_and_asm);
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EXPORT_SYMBOL(__raw_atomic_set_asm);
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EXPORT_SYMBOL(__raw_atomic_or_asm);
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EXPORT_SYMBOL(__raw_atomic_xor_asm);
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EXPORT_SYMBOL(__raw_atomic_xor_asm);
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EXPORT_SYMBOL(__raw_atomic_test_asm);
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EXPORT_SYMBOL(__raw_atomic_test_asm);
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EXPORT_SYMBOL(__raw_xchg_1_asm);
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EXPORT_SYMBOL(__raw_xchg_1_asm);
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EXPORT_SYMBOL(__raw_xchg_2_asm);
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EXPORT_SYMBOL(__raw_xchg_2_asm);
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EXPORT_SYMBOL(__raw_xchg_4_asm);
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EXPORT_SYMBOL(__raw_xchg_4_asm);
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@ -587,10 +587,10 @@ ENDPROC(___raw_write_unlock_asm)
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* r0 = ptr
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* r0 = ptr
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* r1 = value
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* r1 = value
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*
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*
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* Add a signed value to a 32bit word and return the new value atomically.
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* ADD a signed value to a 32bit word and return the new value atomically.
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* Clobbers: r3:0, p1:0
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* Clobbers: r3:0, p1:0
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*/
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*/
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ENTRY(___raw_atomic_update_asm)
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ENTRY(___raw_atomic_add_asm)
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p1 = r0;
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p1 = r0;
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r3 = r1;
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r3 = r1;
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[--sp] = rets;
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[--sp] = rets;
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@ -603,19 +603,19 @@ ENTRY(___raw_atomic_update_asm)
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r0 = r3;
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r0 = r3;
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rets = [sp++];
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rets = [sp++];
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rts;
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rts;
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ENDPROC(___raw_atomic_update_asm)
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ENDPROC(___raw_atomic_add_asm)
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/*
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/*
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* r0 = ptr
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* r0 = ptr
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* r1 = mask
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* r1 = mask
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*
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*
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* Clear the mask bits from a 32bit word and return the old 32bit value
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* AND the mask bits from a 32bit word and return the old 32bit value
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* atomically.
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* atomically.
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* Clobbers: r3:0, p1:0
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* Clobbers: r3:0, p1:0
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*/
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*/
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ENTRY(___raw_atomic_clear_asm)
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ENTRY(___raw_atomic_and_asm)
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p1 = r0;
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p1 = r0;
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r3 = ~r1;
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r3 = r1;
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[--sp] = rets;
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[--sp] = rets;
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call _get_core_lock;
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call _get_core_lock;
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r2 = [p1];
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r2 = [p1];
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@ -627,17 +627,17 @@ ENTRY(___raw_atomic_clear_asm)
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r0 = r3;
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r0 = r3;
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rets = [sp++];
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rets = [sp++];
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rts;
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rts;
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ENDPROC(___raw_atomic_clear_asm)
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ENDPROC(___raw_atomic_and_asm)
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/*
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/*
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* r0 = ptr
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* r0 = ptr
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* r1 = mask
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* r1 = mask
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*
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*
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* Set the mask bits into a 32bit word and return the old 32bit value
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* OR the mask bits into a 32bit word and return the old 32bit value
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* atomically.
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* atomically.
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* Clobbers: r3:0, p1:0
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* Clobbers: r3:0, p1:0
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*/
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*/
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ENTRY(___raw_atomic_set_asm)
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ENTRY(___raw_atomic_or_asm)
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p1 = r0;
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p1 = r0;
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r3 = r1;
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r3 = r1;
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[--sp] = rets;
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[--sp] = rets;
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@ -651,7 +651,7 @@ ENTRY(___raw_atomic_set_asm)
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r0 = r3;
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r0 = r3;
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rets = [sp++];
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rets = [sp++];
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rts;
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rts;
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ENDPROC(___raw_atomic_set_asm)
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ENDPROC(___raw_atomic_or_asm)
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/*
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/*
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* r0 = ptr
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* r0 = ptr
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@ -787,7 +787,7 @@ ENTRY(___raw_bit_set_asm)
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r2 = r1;
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r2 = r1;
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r1 = 1;
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r1 = 1;
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r1 <<= r2;
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r1 <<= r2;
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jump ___raw_atomic_set_asm
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jump ___raw_atomic_or_asm
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ENDPROC(___raw_bit_set_asm)
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ENDPROC(___raw_bit_set_asm)
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/*
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/*
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@ -798,10 +798,10 @@ ENDPROC(___raw_bit_set_asm)
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* Clobbers: r3:0, p1:0
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* Clobbers: r3:0, p1:0
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*/
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*/
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ENTRY(___raw_bit_clear_asm)
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ENTRY(___raw_bit_clear_asm)
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r2 = r1;
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r2 = 1;
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r1 = 1;
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r2 <<= r1;
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r1 <<= r2;
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r1 = ~r2;
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jump ___raw_atomic_clear_asm
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jump ___raw_atomic_and_asm
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ENDPROC(___raw_bit_clear_asm)
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ENDPROC(___raw_bit_clear_asm)
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/*
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/*
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