clockevents/drivers/time-armada-370-xp: Migrate to new 'set-state' interface
Migrate time-armada-370-xp driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This commit is contained in:
parent
4134d29bfc
commit
d96f4412bc
|
@ -121,33 +121,33 @@ armada_370_xp_clkevt_next_event(unsigned long delta,
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static int armada_370_xp_clkevt_shutdown(struct clock_event_device *evt)
|
||||||
armada_370_xp_clkevt_mode(enum clock_event_mode mode,
|
|
||||||
struct clock_event_device *dev)
|
|
||||||
{
|
{
|
||||||
if (mode == CLOCK_EVT_MODE_PERIODIC) {
|
/*
|
||||||
|
* Disable timer.
|
||||||
|
*/
|
||||||
|
local_timer_ctrl_clrset(TIMER0_EN, 0);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Setup timer to fire at 1/HZ intervals.
|
* ACK pending timer interrupt.
|
||||||
*/
|
*/
|
||||||
writel(ticks_per_jiffy - 1, local_base + TIMER0_RELOAD_OFF);
|
writel(TIMER0_CLR_MASK, local_base + LCL_TIMER_EVENTS_STATUS);
|
||||||
writel(ticks_per_jiffy - 1, local_base + TIMER0_VAL_OFF);
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
static int armada_370_xp_clkevt_set_periodic(struct clock_event_device *evt)
|
||||||
* Enable timer.
|
{
|
||||||
*/
|
/*
|
||||||
local_timer_ctrl_clrset(0, TIMER0_RELOAD_EN | enable_mask);
|
* Setup timer to fire at 1/HZ intervals.
|
||||||
} else {
|
*/
|
||||||
/*
|
writel(ticks_per_jiffy - 1, local_base + TIMER0_RELOAD_OFF);
|
||||||
* Disable timer.
|
writel(ticks_per_jiffy - 1, local_base + TIMER0_VAL_OFF);
|
||||||
*/
|
|
||||||
local_timer_ctrl_clrset(TIMER0_EN, 0);
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* ACK pending timer interrupt.
|
* Enable timer.
|
||||||
*/
|
*/
|
||||||
writel(TIMER0_CLR_MASK, local_base + LCL_TIMER_EVENTS_STATUS);
|
local_timer_ctrl_clrset(0, TIMER0_RELOAD_EN | enable_mask);
|
||||||
}
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int armada_370_xp_clkevt_irq;
|
static int armada_370_xp_clkevt_irq;
|
||||||
|
@ -185,7 +185,10 @@ static int armada_370_xp_timer_setup(struct clock_event_device *evt)
|
||||||
evt->shift = 32,
|
evt->shift = 32,
|
||||||
evt->rating = 300,
|
evt->rating = 300,
|
||||||
evt->set_next_event = armada_370_xp_clkevt_next_event,
|
evt->set_next_event = armada_370_xp_clkevt_next_event,
|
||||||
evt->set_mode = armada_370_xp_clkevt_mode,
|
evt->set_state_shutdown = armada_370_xp_clkevt_shutdown;
|
||||||
|
evt->set_state_periodic = armada_370_xp_clkevt_set_periodic;
|
||||||
|
evt->set_state_oneshot = armada_370_xp_clkevt_shutdown;
|
||||||
|
evt->tick_resume = armada_370_xp_clkevt_shutdown;
|
||||||
evt->irq = armada_370_xp_clkevt_irq;
|
evt->irq = armada_370_xp_clkevt_irq;
|
||||||
evt->cpumask = cpumask_of(cpu);
|
evt->cpumask = cpumask_of(cpu);
|
||||||
|
|
||||||
|
@ -197,7 +200,7 @@ static int armada_370_xp_timer_setup(struct clock_event_device *evt)
|
||||||
|
|
||||||
static void armada_370_xp_timer_stop(struct clock_event_device *evt)
|
static void armada_370_xp_timer_stop(struct clock_event_device *evt)
|
||||||
{
|
{
|
||||||
evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt);
|
evt->set_state_shutdown(evt);
|
||||||
disable_percpu_irq(evt->irq);
|
disable_percpu_irq(evt->irq);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue