[SPARC64]: __inline__ --> inline
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
parent
ec3b67c11d
commit
d979f1792d
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@ -1,7 +1,7 @@
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/*
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* binfmt_elf32.c: Support 32-bit Sparc ELF binaries on Ultra.
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*
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* Copyright (C) 1995, 1996, 1997, 1998 David S. Miller (davem@redhat.com)
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* Copyright (C) 1995, 1996, 1997, 1998 David S. Miller (davem@davemloft.net)
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* Copyright (C) 1995, 1996, 1997, 1998 Jakub Jelinek (jj@ultra.linux.cz)
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*/
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@ -133,7 +133,7 @@ struct elf_prpsinfo32
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#undef cputime_to_timeval
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#define cputime_to_timeval cputime_to_compat_timeval
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static __inline__ void
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static inline void
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cputime_to_compat_timeval(const cputime_t cputime, struct compat_timeval *value)
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{
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unsigned long jiffies = cputime_to_jiffies(cputime);
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@ -1,7 +1,6 @@
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/* $Id: central.c,v 1.15 2001/12/19 00:29:51 davem Exp $
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* central.c: Central FHC driver for Sunfire/Starfire/Wildfire.
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/* central.c: Central FHC driver for Sunfire/Starfire/Wildfire.
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*
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* Copyright (C) 1997, 1999 David S. Miller (davem@redhat.com)
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* Copyright (C) 1997, 1999 David S. Miller (davem@davemloft.net)
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*/
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#include <linux/kernel.h>
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@ -385,7 +384,7 @@ void __init central_probe(void)
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init_all_fhc_hw();
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}
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static __inline__ void fhc_ledblink(struct linux_fhc *fhc, int on)
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static inline void fhc_ledblink(struct linux_fhc *fhc, int on)
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{
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u32 tmp;
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@ -402,7 +401,7 @@ static __inline__ void fhc_ledblink(struct linux_fhc *fhc, int on)
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upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
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}
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static __inline__ void central_ledblink(struct linux_central *central, int on)
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static inline void central_ledblink(struct linux_central *central, int on)
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{
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u8 tmp;
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@ -1,5 +1,4 @@
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/* $Id: semaphore.c,v 1.9 2001/11/18 00:12:56 davem Exp $
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* semaphore.c: Sparc64 semaphore implementation.
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/* semaphore.c: Sparc64 semaphore implementation.
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*
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* This is basically the PPC semaphore scheme ported to use
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* the sparc64 atomic instructions, so see the PPC code for
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@ -19,7 +18,7 @@
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* sem->count = tmp;
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* return old_count;
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*/
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static __inline__ int __sem_update_count(struct semaphore *sem, int incr)
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static inline int __sem_update_count(struct semaphore *sem, int incr)
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{
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int old_count, tmp;
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@ -459,7 +459,7 @@ again:
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}
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}
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static __inline__ void spitfire_xcall_deliver(u64 data0, u64 data1, u64 data2, cpumask_t mask)
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static inline void spitfire_xcall_deliver(u64 data0, u64 data1, u64 data2, cpumask_t mask)
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{
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u64 pstate;
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int i;
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@ -906,7 +906,7 @@ extern atomic_t dcpage_flushes;
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extern atomic_t dcpage_flushes_xcall;
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#endif
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static __inline__ void __local_flush_dcache_page(struct page *page)
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static inline void __local_flush_dcache_page(struct page *page)
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{
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#ifdef DCACHE_ALIASING_POSSIBLE
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__flush_dcache_page(page_address(page),
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@ -1,7 +1,6 @@
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/* $Id: traps.c,v 1.85 2002/02/09 19:49:31 davem Exp $
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* arch/sparc64/kernel/traps.c
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/* arch/sparc64/kernel/traps.c
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*
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* Copyright (C) 1995,1997 David S. Miller (davem@caip.rutgers.edu)
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* Copyright (C) 1995,1997 David S. Miller (davem@davemloft.net)
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* Copyright (C) 1997,1999,2000 Jakub Jelinek (jakub@redhat.com)
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*/
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@ -765,7 +764,7 @@ static unsigned long cheetah_afsr_errors;
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*/
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struct cheetah_err_info *cheetah_error_log;
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static __inline__ struct cheetah_err_info *cheetah_get_error_log(unsigned long afsr)
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static inline struct cheetah_err_info *cheetah_get_error_log(unsigned long afsr)
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{
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struct cheetah_err_info *p;
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int cpu = smp_processor_id();
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@ -1085,7 +1084,7 @@ static unsigned char cheetah_mtag_syntab[] = {
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};
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/* Return the highest priority error conditon mentioned. */
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static __inline__ unsigned long cheetah_get_hipri(unsigned long afsr)
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static inline unsigned long cheetah_get_hipri(unsigned long afsr)
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{
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unsigned long tmp = 0;
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int i;
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@ -201,7 +201,7 @@ inline void flush_dcache_page_impl(struct page *page)
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#define dcache_dirty_cpu(page) \
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(((page)->flags >> PG_dcache_cpu_shift) & PG_dcache_cpu_mask)
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static __inline__ void set_dcache_dirty(struct page *page, int this_cpu)
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static inline void set_dcache_dirty(struct page *page, int this_cpu)
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{
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unsigned long mask = this_cpu;
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unsigned long non_cpu_bits;
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@ -223,7 +223,7 @@ static __inline__ void set_dcache_dirty(struct page *page, int this_cpu)
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: "g1", "g7");
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}
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static __inline__ void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu)
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static inline void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu)
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{
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unsigned long mask = (1UL << PG_dcache_dirty);
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@ -1,8 +1,7 @@
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/* $Id: console.c,v 1.9 1997/10/29 07:41:43 ecd Exp $
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* console.c: Routines that deal with sending and receiving IO
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/* console.c: Routines that deal with sending and receiving IO
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* to/from the current console device using the PROM.
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*
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* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
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* Copyright (C) 1995 David S. Miller (davem@davemloft.net)
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* Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
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*/
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@ -19,7 +18,7 @@ extern int prom_stdin, prom_stdout;
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/* Non blocking get character from console input device, returns -1
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* if no input was taken. This can be used for polling.
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*/
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__inline__ int
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inline int
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prom_nbgetchar(void)
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{
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char inc;
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@ -35,7 +34,7 @@ prom_nbgetchar(void)
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/* Non blocking put character to console device, returns -1 if
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* unsuccessful.
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*/
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__inline__ int
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inline int
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prom_nbputchar(char c)
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{
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char outc;
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@ -18,14 +18,12 @@
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/* Return the child of node 'node' or zero if no this node has no
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* direct descendent.
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*/
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__inline__ int
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__prom_getchild(int node)
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inline int __prom_getchild(int node)
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{
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return p1275_cmd ("child", P1275_INOUT(1, 1), node);
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}
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__inline__ int
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prom_getchild(int node)
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inline int prom_getchild(int node)
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{
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int cnode;
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@ -35,8 +33,7 @@ prom_getchild(int node)
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return (int)cnode;
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}
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__inline__ int
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prom_getparent(int node)
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inline int prom_getparent(int node)
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{
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int cnode;
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@ -49,14 +46,12 @@ prom_getparent(int node)
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/* Return the next sibling of node 'node' or zero if no more siblings
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* at this level of depth in the tree.
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*/
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__inline__ int
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__prom_getsibling(int node)
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inline int __prom_getsibling(int node)
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{
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return p1275_cmd(prom_peer_name, P1275_INOUT(1, 1), node);
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}
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__inline__ int
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prom_getsibling(int node)
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inline int prom_getsibling(int node)
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{
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int sibnode;
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@ -72,8 +67,7 @@ prom_getsibling(int node)
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/* Return the length in bytes of property 'prop' at node 'node'.
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* Return -1 on error.
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*/
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__inline__ int
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prom_getproplen(int node, const char *prop)
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inline int prom_getproplen(int node, const char *prop)
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{
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if((!node) || (!prop)) return -1;
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return p1275_cmd ("getproplen",
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@ -86,8 +80,8 @@ prom_getproplen(int node, const char *prop)
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* 'buffer' which has a size of 'bufsize'. If the acquisition
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* was successful the length will be returned, else -1 is returned.
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*/
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__inline__ int
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prom_getproperty(int node, const char *prop, char *buffer, int bufsize)
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inline int prom_getproperty(int node, const char *prop,
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char *buffer, int bufsize)
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{
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int plen;
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@ -107,8 +101,7 @@ prom_getproperty(int node, const char *prop, char *buffer, int bufsize)
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/* Acquire an integer property and return its value. Returns -1
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* on failure.
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*/
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__inline__ int
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prom_getint(int node, const char *prop)
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inline int prom_getint(int node, const char *prop)
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{
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int intprop;
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@ -122,8 +115,7 @@ prom_getint(int node, const char *prop)
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* integer.
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*/
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int
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prom_getintdefault(int node, const char *property, int deflt)
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int prom_getintdefault(int node, const char *property, int deflt)
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{
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int retval;
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@ -134,8 +126,7 @@ prom_getintdefault(int node, const char *property, int deflt)
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}
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/* Acquire a boolean property, 1=TRUE 0=FALSE. */
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int
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prom_getbool(int node, const char *prop)
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int prom_getbool(int node, const char *prop)
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{
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int retval;
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@ -148,8 +139,7 @@ prom_getbool(int node, const char *prop)
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* string on error. The char pointer is the user supplied string
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* buffer.
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*/
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void
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prom_getstring(int node, const char *prop, char *user_buf, int ubuf_size)
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void prom_getstring(int node, const char *prop, char *user_buf, int ubuf_size)
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{
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int len;
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@ -163,8 +153,7 @@ prom_getstring(int node, const char *prop, char *user_buf, int ubuf_size)
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/* Does the device at node 'node' have name 'name'?
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* YES = 1 NO = 0
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*/
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int
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prom_nodematch(int node, const char *name)
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int prom_nodematch(int node, const char *name)
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{
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char namebuf[128];
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prom_getproperty(node, "name", namebuf, sizeof(namebuf));
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@ -175,8 +164,7 @@ prom_nodematch(int node, const char *name)
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/* Search siblings at 'node_start' for a node with name
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* 'nodename'. Return node if successful, zero if not.
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*/
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int
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prom_searchsiblings(int node_start, const char *nodename)
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int prom_searchsiblings(int node_start, const char *nodename)
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{
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int thisnode, error;
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@ -197,8 +185,7 @@ prom_searchsiblings(int node_start, const char *nodename)
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/* Return the first property type for node 'node'.
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* buffer should be at least 32B in length
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*/
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__inline__ char *
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prom_firstprop(int node, char *buffer)
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inline char *prom_firstprop(int node, char *buffer)
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{
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*buffer = 0;
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if(node == -1) return buffer;
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@ -212,8 +199,7 @@ prom_firstprop(int node, char *buffer)
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* at node 'node' . Returns NULL string if no more
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* property types for this node.
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*/
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__inline__ char *
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prom_nextprop(int node, const char *oprop, char *buffer)
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inline char *prom_nextprop(int node, const char *oprop, char *buffer)
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{
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char buf[32];
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@ -279,8 +265,7 @@ prom_setprop(int node, const char *pname, char *value, int size)
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node, pname, value, P1275_SIZE(size));
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}
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__inline__ int
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prom_inst2pkg(int inst)
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inline int prom_inst2pkg(int inst)
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{
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int node;
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@ -1,5 +1,4 @@
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/* $Id: atomic.h,v 1.22 2001/07/11 23:56:07 davem Exp $
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* atomic.h: Thankfully the V9 is at least reasonable for this
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/* atomic.h: Thankfully the V9 is at least reasonable for this
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* stuff.
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*
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* Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com)
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@ -74,7 +73,7 @@ extern int atomic64_sub_ret(int, atomic64_t *);
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#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
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static inline int atomic_add_unless(atomic_t *v, int a, int u)
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{
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int c, old;
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c = atomic_read(v);
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@ -95,7 +94,7 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
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((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
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#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
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static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
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static inline int atomic64_add_unless(atomic64_t *v, long a, long u)
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{
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long c, old;
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c = atomic64_read(v);
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@ -1,4 +1,3 @@
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/* $Id: byteorder.h,v 1.8 1997/12/18 02:44:14 ecd Exp $ */
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#ifndef _SPARC64_BYTEORDER_H
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#define _SPARC64_BYTEORDER_H
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@ -7,7 +6,7 @@
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#ifdef __GNUC__
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static __inline__ __u16 ___arch__swab16p(const __u16 *addr)
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static inline __u16 ___arch__swab16p(const __u16 *addr)
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{
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__u16 ret;
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@ -17,7 +16,7 @@ static __inline__ __u16 ___arch__swab16p(const __u16 *addr)
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return ret;
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}
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static __inline__ __u32 ___arch__swab32p(const __u32 *addr)
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static inline __u32 ___arch__swab32p(const __u32 *addr)
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{
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__u32 ret;
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@ -27,7 +26,7 @@ static __inline__ __u32 ___arch__swab32p(const __u32 *addr)
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return ret;
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}
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static __inline__ __u64 ___arch__swab64p(const __u64 *addr)
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static inline __u64 ___arch__swab64p(const __u64 *addr)
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{
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__u64 ret;
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@ -16,7 +16,7 @@ struct fpustate {
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#define FPUSTATE (struct fpustate *)(current_thread_info()->fpregs)
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static __inline__ unsigned long fprs_read(void)
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static inline unsigned long fprs_read(void)
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{
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unsigned long retval;
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@ -25,7 +25,7 @@ static __inline__ unsigned long fprs_read(void)
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return retval;
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}
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static __inline__ void fprs_write(unsigned long val)
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static inline void fprs_write(unsigned long val)
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{
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__asm__ __volatile__("wr %0, 0x0, %%fprs" : : "r" (val));
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}
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@ -1,4 +1,3 @@
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/* $Id: io.h,v 1.47 2001/12/13 10:36:02 davem Exp $ */
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#ifndef __SPARC64_IO_H
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#define __SPARC64_IO_H
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@ -19,7 +18,7 @@ extern unsigned long kern_base, kern_size;
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#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
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#define BIO_VMERGE_BOUNDARY 8192
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static __inline__ u8 _inb(unsigned long addr)
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static inline u8 _inb(unsigned long addr)
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{
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u8 ret;
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@ -30,7 +29,7 @@ static __inline__ u8 _inb(unsigned long addr)
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return ret;
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}
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static __inline__ u16 _inw(unsigned long addr)
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static inline u16 _inw(unsigned long addr)
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{
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u16 ret;
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@ -41,7 +40,7 @@ static __inline__ u16 _inw(unsigned long addr)
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return ret;
|
||||
}
|
||||
|
||||
static __inline__ u32 _inl(unsigned long addr)
|
||||
static inline u32 _inl(unsigned long addr)
|
||||
{
|
||||
u32 ret;
|
||||
|
||||
|
|
@ -52,21 +51,21 @@ static __inline__ u32 _inl(unsigned long addr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static __inline__ void _outb(u8 b, unsigned long addr)
|
||||
static inline void _outb(u8 b, unsigned long addr)
|
||||
{
|
||||
__asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */"
|
||||
: /* no outputs */
|
||||
: "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
|
||||
}
|
||||
|
||||
static __inline__ void _outw(u16 w, unsigned long addr)
|
||||
static inline void _outw(u16 w, unsigned long addr)
|
||||
{
|
||||
__asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */"
|
||||
: /* no outputs */
|
||||
: "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
|
||||
}
|
||||
|
||||
static __inline__ void _outl(u32 l, unsigned long addr)
|
||||
static inline void _outl(u32 l, unsigned long addr)
|
||||
{
|
||||
__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */"
|
||||
: /* no outputs */
|
||||
|
|
@ -205,7 +204,7 @@ static inline void _writeq(u64 q, volatile void __iomem *addr)
|
|||
#define writeq(__q, __addr) _writeq(__q, __addr)
|
||||
|
||||
/* Now versions without byte-swapping. */
|
||||
static __inline__ u8 _raw_readb(unsigned long addr)
|
||||
static inline u8 _raw_readb(unsigned long addr)
|
||||
{
|
||||
u8 ret;
|
||||
|
||||
|
|
@ -216,7 +215,7 @@ static __inline__ u8 _raw_readb(unsigned long addr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static __inline__ u16 _raw_readw(unsigned long addr)
|
||||
static inline u16 _raw_readw(unsigned long addr)
|
||||
{
|
||||
u16 ret;
|
||||
|
||||
|
|
@ -227,7 +226,7 @@ static __inline__ u16 _raw_readw(unsigned long addr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static __inline__ u32 _raw_readl(unsigned long addr)
|
||||
static inline u32 _raw_readl(unsigned long addr)
|
||||
{
|
||||
u32 ret;
|
||||
|
||||
|
|
@ -238,7 +237,7 @@ static __inline__ u32 _raw_readl(unsigned long addr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static __inline__ u64 _raw_readq(unsigned long addr)
|
||||
static inline u64 _raw_readq(unsigned long addr)
|
||||
{
|
||||
u64 ret;
|
||||
|
||||
|
|
@ -249,28 +248,28 @@ static __inline__ u64 _raw_readq(unsigned long addr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static __inline__ void _raw_writeb(u8 b, unsigned long addr)
|
||||
static inline void _raw_writeb(u8 b, unsigned long addr)
|
||||
{
|
||||
__asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */"
|
||||
: /* no outputs */
|
||||
: "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
|
||||
}
|
||||
|
||||
static __inline__ void _raw_writew(u16 w, unsigned long addr)
|
||||
static inline void _raw_writew(u16 w, unsigned long addr)
|
||||
{
|
||||
__asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */"
|
||||
: /* no outputs */
|
||||
: "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
|
||||
}
|
||||
|
||||
static __inline__ void _raw_writel(u32 l, unsigned long addr)
|
||||
static inline void _raw_writel(u32 l, unsigned long addr)
|
||||
{
|
||||
__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */"
|
||||
: /* no outputs */
|
||||
: "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
|
||||
}
|
||||
|
||||
static __inline__ void _raw_writeq(u64 q, unsigned long addr)
|
||||
static inline void _raw_writeq(u64 q, unsigned long addr)
|
||||
{
|
||||
__asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */"
|
||||
: /* no outputs */
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
/* $Id: irq.h,v 1.21 2002/01/23 11:27:36 davem Exp $
|
||||
* irq.h: IRQ registers on the 64-bit Sparc.
|
||||
/* irq.h: IRQ registers on the 64-bit Sparc.
|
||||
*
|
||||
* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
|
||||
* Copyright (C) 1996 David S. Miller (davem@davemloft.net)
|
||||
* Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
|
||||
*/
|
||||
|
||||
|
|
@ -67,21 +66,21 @@ extern void virt_irq_free(unsigned int virt_irq);
|
|||
|
||||
extern void fixup_irqs(void);
|
||||
|
||||
static __inline__ void set_softint(unsigned long bits)
|
||||
static inline void set_softint(unsigned long bits)
|
||||
{
|
||||
__asm__ __volatile__("wr %0, 0x0, %%set_softint"
|
||||
: /* No outputs */
|
||||
: "r" (bits));
|
||||
}
|
||||
|
||||
static __inline__ void clear_softint(unsigned long bits)
|
||||
static inline void clear_softint(unsigned long bits)
|
||||
{
|
||||
__asm__ __volatile__("wr %0, 0x0, %%clear_softint"
|
||||
: /* No outputs */
|
||||
: "r" (bits));
|
||||
}
|
||||
|
||||
static __inline__ unsigned long get_softint(void)
|
||||
static inline unsigned long get_softint(void)
|
||||
{
|
||||
unsigned long retval;
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
/* $Id: mostek.h,v 1.4 2001/01/11 15:07:09 davem Exp $
|
||||
* mostek.h: Describes the various Mostek time of day clock registers.
|
||||
/* mostek.h: Describes the various Mostek time of day clock registers.
|
||||
*
|
||||
* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
|
||||
* Copyright (C) 1995 David S. Miller (davem@davemloft.net)
|
||||
* Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
|
||||
*/
|
||||
|
||||
|
|
@ -38,7 +37,7 @@
|
|||
*
|
||||
* We now deal with physical addresses for I/O to the chip. -DaveM
|
||||
*/
|
||||
static __inline__ u8 mostek_read(void __iomem *addr)
|
||||
static inline u8 mostek_read(void __iomem *addr)
|
||||
{
|
||||
u8 ret;
|
||||
|
||||
|
|
@ -48,7 +47,7 @@ static __inline__ u8 mostek_read(void __iomem *addr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static __inline__ void mostek_write(void __iomem *addr, u8 val)
|
||||
static inline void mostek_write(void __iomem *addr, u8 val)
|
||||
{
|
||||
__asm__ __volatile__("stba %0, [%1] %2"
|
||||
: /* no outputs */
|
||||
|
|
|
|||
|
|
@ -1,5 +1,4 @@
|
|||
/* $Id: ns87303.h,v 1.3 2000/01/09 15:16:34 ecd Exp $
|
||||
* ns87303.h: Configuration Register Description for the
|
||||
/* ns87303.h: Configuration Register Description for the
|
||||
* National Semiconductor PC87303 (SuperIO).
|
||||
*
|
||||
* Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
|
||||
|
|
@ -85,7 +84,7 @@
|
|||
|
||||
extern spinlock_t ns87303_lock;
|
||||
|
||||
static __inline__ int ns87303_modify(unsigned long port, unsigned int index,
|
||||
static inline int ns87303_modify(unsigned long port, unsigned int index,
|
||||
unsigned char clr, unsigned char set)
|
||||
{
|
||||
static unsigned char reserved[] = {
|
||||
|
|
|
|||
|
|
@ -1,5 +1,4 @@
|
|||
/* $Id: parport.h,v 1.11 2001/05/11 07:54:24 davem Exp $
|
||||
* parport.h: sparc64 specific parport initialization and dma.
|
||||
/* parport.h: sparc64 specific parport initialization and dma.
|
||||
*
|
||||
* Copyright (C) 1999 Eddie C. Dost (ecd@skynet.be)
|
||||
*/
|
||||
|
|
@ -42,7 +41,7 @@ static struct sparc_ebus_info {
|
|||
|
||||
static DECLARE_BITMAP(dma_slot_map, PARPORT_PC_MAX_PORTS);
|
||||
|
||||
static __inline__ int request_dma(unsigned int dmanr, const char *device_id)
|
||||
static inline int request_dma(unsigned int dmanr, const char *device_id)
|
||||
{
|
||||
if (dmanr >= PARPORT_PC_MAX_PORTS)
|
||||
return -EINVAL;
|
||||
|
|
@ -51,7 +50,7 @@ static __inline__ int request_dma(unsigned int dmanr, const char *device_id)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static __inline__ void free_dma(unsigned int dmanr)
|
||||
static inline void free_dma(unsigned int dmanr)
|
||||
{
|
||||
if (dmanr >= PARPORT_PC_MAX_PORTS) {
|
||||
printk(KERN_WARNING "Trying to free DMA%d\n", dmanr);
|
||||
|
|
@ -63,7 +62,7 @@ static __inline__ void free_dma(unsigned int dmanr)
|
|||
}
|
||||
}
|
||||
|
||||
static __inline__ void enable_dma(unsigned int dmanr)
|
||||
static inline void enable_dma(unsigned int dmanr)
|
||||
{
|
||||
ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1);
|
||||
|
||||
|
|
@ -73,32 +72,32 @@ static __inline__ void enable_dma(unsigned int dmanr)
|
|||
BUG();
|
||||
}
|
||||
|
||||
static __inline__ void disable_dma(unsigned int dmanr)
|
||||
static inline void disable_dma(unsigned int dmanr)
|
||||
{
|
||||
ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 0);
|
||||
}
|
||||
|
||||
static __inline__ void clear_dma_ff(unsigned int dmanr)
|
||||
static inline void clear_dma_ff(unsigned int dmanr)
|
||||
{
|
||||
/* nothing */
|
||||
}
|
||||
|
||||
static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
|
||||
static inline void set_dma_mode(unsigned int dmanr, char mode)
|
||||
{
|
||||
ebus_dma_prepare(&sparc_ebus_dmas[dmanr].info, (mode != DMA_MODE_WRITE));
|
||||
}
|
||||
|
||||
static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int addr)
|
||||
static inline void set_dma_addr(unsigned int dmanr, unsigned int addr)
|
||||
{
|
||||
sparc_ebus_dmas[dmanr].addr = addr;
|
||||
}
|
||||
|
||||
static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
|
||||
static inline void set_dma_count(unsigned int dmanr, unsigned int count)
|
||||
{
|
||||
sparc_ebus_dmas[dmanr].count = count;
|
||||
}
|
||||
|
||||
static __inline__ unsigned int get_dma_residue(unsigned int dmanr)
|
||||
static inline unsigned int get_dma_residue(unsigned int dmanr)
|
||||
{
|
||||
return ebus_dma_residue(&sparc_ebus_dmas[dmanr].info);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -53,7 +53,7 @@ typedef struct {
|
|||
#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
|
||||
|
||||
#undef __FD_SET
|
||||
static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
|
||||
static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
|
||||
{
|
||||
unsigned long _tmp = fd / __NFDBITS;
|
||||
unsigned long _rem = fd % __NFDBITS;
|
||||
|
|
@ -61,7 +61,7 @@ static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
|
|||
}
|
||||
|
||||
#undef __FD_CLR
|
||||
static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
|
||||
static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
|
||||
{
|
||||
unsigned long _tmp = fd / __NFDBITS;
|
||||
unsigned long _rem = fd % __NFDBITS;
|
||||
|
|
@ -69,7 +69,7 @@ static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
|
|||
}
|
||||
|
||||
#undef __FD_ISSET
|
||||
static __inline__ int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p)
|
||||
static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p)
|
||||
{
|
||||
unsigned long _tmp = fd / __NFDBITS;
|
||||
unsigned long _rem = fd % __NFDBITS;
|
||||
|
|
@ -81,7 +81,7 @@ static __inline__ int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p)
|
|||
* for 256 and 1024-bit fd_sets respectively)
|
||||
*/
|
||||
#undef __FD_ZERO
|
||||
static __inline__ void __FD_ZERO(__kernel_fd_set *p)
|
||||
static inline void __FD_ZERO(__kernel_fd_set *p)
|
||||
{
|
||||
unsigned long *tmp = p->fds_bits;
|
||||
int i;
|
||||
|
|
|
|||
|
|
@ -29,12 +29,12 @@
|
|||
* numbers + offsets, and vice versa.
|
||||
*/
|
||||
|
||||
static __inline__ unsigned long sbus_devaddr(int slotnum, unsigned long offset)
|
||||
static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset)
|
||||
{
|
||||
return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<28)+(offset));
|
||||
}
|
||||
|
||||
static __inline__ int sbus_dev_slot(unsigned long dev_addr)
|
||||
static inline int sbus_dev_slot(unsigned long dev_addr)
|
||||
{
|
||||
return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>28);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
/* $Id: spitfire.h,v 1.18 2001/11/29 16:42:10 kanoj Exp $
|
||||
* spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations.
|
||||
/* spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations.
|
||||
*
|
||||
* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
|
||||
* Copyright (C) 1996 David S. Miller (davem@davemloft.net)
|
||||
*/
|
||||
|
||||
#ifndef _SPARC64_SPITFIRE_H
|
||||
|
|
@ -67,7 +66,7 @@ extern void cheetah_enable_pcache(void);
|
|||
/* The data cache is write through, so this just invalidates the
|
||||
* specified line.
|
||||
*/
|
||||
static __inline__ void spitfire_put_dcache_tag(unsigned long addr, unsigned long tag)
|
||||
static inline void spitfire_put_dcache_tag(unsigned long addr, unsigned long tag)
|
||||
{
|
||||
__asm__ __volatile__("stxa %0, [%1] %2\n\t"
|
||||
"membar #Sync"
|
||||
|
|
@ -81,7 +80,7 @@ static __inline__ void spitfire_put_dcache_tag(unsigned long addr, unsigned long
|
|||
* a flush instruction (to any address) is sufficient to handle
|
||||
* this issue after the line is invalidated.
|
||||
*/
|
||||
static __inline__ void spitfire_put_icache_tag(unsigned long addr, unsigned long tag)
|
||||
static inline void spitfire_put_icache_tag(unsigned long addr, unsigned long tag)
|
||||
{
|
||||
__asm__ __volatile__("stxa %0, [%1] %2\n\t"
|
||||
"membar #Sync"
|
||||
|
|
@ -89,7 +88,7 @@ static __inline__ void spitfire_put_icache_tag(unsigned long addr, unsigned long
|
|||
: "r" (tag), "r" (addr), "i" (ASI_IC_TAG));
|
||||
}
|
||||
|
||||
static __inline__ unsigned long spitfire_get_dtlb_data(int entry)
|
||||
static inline unsigned long spitfire_get_dtlb_data(int entry)
|
||||
{
|
||||
unsigned long data;
|
||||
|
||||
|
|
@ -103,7 +102,7 @@ static __inline__ unsigned long spitfire_get_dtlb_data(int entry)
|
|||
return data;
|
||||
}
|
||||
|
||||
static __inline__ unsigned long spitfire_get_dtlb_tag(int entry)
|
||||
static inline unsigned long spitfire_get_dtlb_tag(int entry)
|
||||
{
|
||||
unsigned long tag;
|
||||
|
||||
|
|
@ -113,7 +112,7 @@ static __inline__ unsigned long spitfire_get_dtlb_tag(int entry)
|
|||
return tag;
|
||||
}
|
||||
|
||||
static __inline__ void spitfire_put_dtlb_data(int entry, unsigned long data)
|
||||
static inline void spitfire_put_dtlb_data(int entry, unsigned long data)
|
||||
{
|
||||
__asm__ __volatile__("stxa %0, [%1] %2\n\t"
|
||||
"membar #Sync"
|
||||
|
|
@ -122,7 +121,7 @@ static __inline__ void spitfire_put_dtlb_data(int entry, unsigned long data)
|
|||
"i" (ASI_DTLB_DATA_ACCESS));
|
||||
}
|
||||
|
||||
static __inline__ unsigned long spitfire_get_itlb_data(int entry)
|
||||
static inline unsigned long spitfire_get_itlb_data(int entry)
|
||||
{
|
||||
unsigned long data;
|
||||
|
||||
|
|
@ -136,7 +135,7 @@ static __inline__ unsigned long spitfire_get_itlb_data(int entry)
|
|||
return data;
|
||||
}
|
||||
|
||||
static __inline__ unsigned long spitfire_get_itlb_tag(int entry)
|
||||
static inline unsigned long spitfire_get_itlb_tag(int entry)
|
||||
{
|
||||
unsigned long tag;
|
||||
|
||||
|
|
@ -146,7 +145,7 @@ static __inline__ unsigned long spitfire_get_itlb_tag(int entry)
|
|||
return tag;
|
||||
}
|
||||
|
||||
static __inline__ void spitfire_put_itlb_data(int entry, unsigned long data)
|
||||
static inline void spitfire_put_itlb_data(int entry, unsigned long data)
|
||||
{
|
||||
__asm__ __volatile__("stxa %0, [%1] %2\n\t"
|
||||
"membar #Sync"
|
||||
|
|
@ -155,7 +154,7 @@ static __inline__ void spitfire_put_itlb_data(int entry, unsigned long data)
|
|||
"i" (ASI_ITLB_DATA_ACCESS));
|
||||
}
|
||||
|
||||
static __inline__ void spitfire_flush_dtlb_nucleus_page(unsigned long page)
|
||||
static inline void spitfire_flush_dtlb_nucleus_page(unsigned long page)
|
||||
{
|
||||
__asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
|
||||
"membar #Sync"
|
||||
|
|
@ -163,7 +162,7 @@ static __inline__ void spitfire_flush_dtlb_nucleus_page(unsigned long page)
|
|||
: "r" (page | 0x20), "i" (ASI_DMMU_DEMAP));
|
||||
}
|
||||
|
||||
static __inline__ void spitfire_flush_itlb_nucleus_page(unsigned long page)
|
||||
static inline void spitfire_flush_itlb_nucleus_page(unsigned long page)
|
||||
{
|
||||
__asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
|
||||
"membar #Sync"
|
||||
|
|
@ -172,7 +171,7 @@ static __inline__ void spitfire_flush_itlb_nucleus_page(unsigned long page)
|
|||
}
|
||||
|
||||
/* Cheetah has "all non-locked" tlb flushes. */
|
||||
static __inline__ void cheetah_flush_dtlb_all(void)
|
||||
static inline void cheetah_flush_dtlb_all(void)
|
||||
{
|
||||
__asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
|
||||
"membar #Sync"
|
||||
|
|
@ -180,7 +179,7 @@ static __inline__ void cheetah_flush_dtlb_all(void)
|
|||
: "r" (0x80), "i" (ASI_DMMU_DEMAP));
|
||||
}
|
||||
|
||||
static __inline__ void cheetah_flush_itlb_all(void)
|
||||
static inline void cheetah_flush_itlb_all(void)
|
||||
{
|
||||
__asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
|
||||
"membar #Sync"
|
||||
|
|
@ -202,7 +201,7 @@ static __inline__ void cheetah_flush_itlb_all(void)
|
|||
* ASI_{D,I}TLB_DATA_ACCESS loads, doing the load twice fixes
|
||||
* the problem for me. -DaveM
|
||||
*/
|
||||
static __inline__ unsigned long cheetah_get_ldtlb_data(int entry)
|
||||
static inline unsigned long cheetah_get_ldtlb_data(int entry)
|
||||
{
|
||||
unsigned long data;
|
||||
|
||||
|
|
@ -215,7 +214,7 @@ static __inline__ unsigned long cheetah_get_ldtlb_data(int entry)
|
|||
return data;
|
||||
}
|
||||
|
||||
static __inline__ unsigned long cheetah_get_litlb_data(int entry)
|
||||
static inline unsigned long cheetah_get_litlb_data(int entry)
|
||||
{
|
||||
unsigned long data;
|
||||
|
||||
|
|
@ -228,7 +227,7 @@ static __inline__ unsigned long cheetah_get_litlb_data(int entry)
|
|||
return data;
|
||||
}
|
||||
|
||||
static __inline__ unsigned long cheetah_get_ldtlb_tag(int entry)
|
||||
static inline unsigned long cheetah_get_ldtlb_tag(int entry)
|
||||
{
|
||||
unsigned long tag;
|
||||
|
||||
|
|
@ -240,7 +239,7 @@ static __inline__ unsigned long cheetah_get_ldtlb_tag(int entry)
|
|||
return tag;
|
||||
}
|
||||
|
||||
static __inline__ unsigned long cheetah_get_litlb_tag(int entry)
|
||||
static inline unsigned long cheetah_get_litlb_tag(int entry)
|
||||
{
|
||||
unsigned long tag;
|
||||
|
||||
|
|
@ -252,7 +251,7 @@ static __inline__ unsigned long cheetah_get_litlb_tag(int entry)
|
|||
return tag;
|
||||
}
|
||||
|
||||
static __inline__ void cheetah_put_ldtlb_data(int entry, unsigned long data)
|
||||
static inline void cheetah_put_ldtlb_data(int entry, unsigned long data)
|
||||
{
|
||||
__asm__ __volatile__("stxa %0, [%1] %2\n\t"
|
||||
"membar #Sync"
|
||||
|
|
@ -262,7 +261,7 @@ static __inline__ void cheetah_put_ldtlb_data(int entry, unsigned long data)
|
|||
"i" (ASI_DTLB_DATA_ACCESS));
|
||||
}
|
||||
|
||||
static __inline__ void cheetah_put_litlb_data(int entry, unsigned long data)
|
||||
static inline void cheetah_put_litlb_data(int entry, unsigned long data)
|
||||
{
|
||||
__asm__ __volatile__("stxa %0, [%1] %2\n\t"
|
||||
"membar #Sync"
|
||||
|
|
@ -272,7 +271,7 @@ static __inline__ void cheetah_put_litlb_data(int entry, unsigned long data)
|
|||
"i" (ASI_ITLB_DATA_ACCESS));
|
||||
}
|
||||
|
||||
static __inline__ unsigned long cheetah_get_dtlb_data(int entry, int tlb)
|
||||
static inline unsigned long cheetah_get_dtlb_data(int entry, int tlb)
|
||||
{
|
||||
unsigned long data;
|
||||
|
||||
|
|
@ -284,7 +283,7 @@ static __inline__ unsigned long cheetah_get_dtlb_data(int entry, int tlb)
|
|||
return data;
|
||||
}
|
||||
|
||||
static __inline__ unsigned long cheetah_get_dtlb_tag(int entry, int tlb)
|
||||
static inline unsigned long cheetah_get_dtlb_tag(int entry, int tlb)
|
||||
{
|
||||
unsigned long tag;
|
||||
|
||||
|
|
@ -294,7 +293,7 @@ static __inline__ unsigned long cheetah_get_dtlb_tag(int entry, int tlb)
|
|||
return tag;
|
||||
}
|
||||
|
||||
static __inline__ void cheetah_put_dtlb_data(int entry, unsigned long data, int tlb)
|
||||
static inline void cheetah_put_dtlb_data(int entry, unsigned long data, int tlb)
|
||||
{
|
||||
__asm__ __volatile__("stxa %0, [%1] %2\n\t"
|
||||
"membar #Sync"
|
||||
|
|
@ -304,7 +303,7 @@ static __inline__ void cheetah_put_dtlb_data(int entry, unsigned long data, int
|
|||
"i" (ASI_DTLB_DATA_ACCESS));
|
||||
}
|
||||
|
||||
static __inline__ unsigned long cheetah_get_itlb_data(int entry)
|
||||
static inline unsigned long cheetah_get_itlb_data(int entry)
|
||||
{
|
||||
unsigned long data;
|
||||
|
||||
|
|
@ -317,7 +316,7 @@ static __inline__ unsigned long cheetah_get_itlb_data(int entry)
|
|||
return data;
|
||||
}
|
||||
|
||||
static __inline__ unsigned long cheetah_get_itlb_tag(int entry)
|
||||
static inline unsigned long cheetah_get_itlb_tag(int entry)
|
||||
{
|
||||
unsigned long tag;
|
||||
|
||||
|
|
@ -327,7 +326,7 @@ static __inline__ unsigned long cheetah_get_itlb_tag(int entry)
|
|||
return tag;
|
||||
}
|
||||
|
||||
static __inline__ void cheetah_put_itlb_data(int entry, unsigned long data)
|
||||
static inline void cheetah_put_itlb_data(int entry, unsigned long data)
|
||||
{
|
||||
__asm__ __volatile__("stxa %0, [%1] %2\n\t"
|
||||
"membar #Sync"
|
||||
|
|
|
|||
|
|
@ -1,4 +1,3 @@
|
|||
/* $Id: system.h,v 1.69 2002/02/09 19:49:31 davem Exp $ */
|
||||
#ifndef __SPARC64_SYSTEM_H
|
||||
#define __SPARC64_SYSTEM_H
|
||||
|
||||
|
|
@ -240,7 +239,7 @@ static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long
|
|||
|
||||
extern void __xchg_called_with_bad_pointer(void);
|
||||
|
||||
static __inline__ unsigned long __xchg(unsigned long x, __volatile__ void * ptr,
|
||||
static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr,
|
||||
int size)
|
||||
{
|
||||
switch (size) {
|
||||
|
|
@ -263,7 +262,7 @@ extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noret
|
|||
|
||||
#define __HAVE_ARCH_CMPXCHG 1
|
||||
|
||||
static __inline__ unsigned long
|
||||
static inline unsigned long
|
||||
__cmpxchg_u32(volatile int *m, int old, int new)
|
||||
{
|
||||
__asm__ __volatile__("membar #StoreLoad | #LoadLoad\n"
|
||||
|
|
@ -276,7 +275,7 @@ __cmpxchg_u32(volatile int *m, int old, int new)
|
|||
return new;
|
||||
}
|
||||
|
||||
static __inline__ unsigned long
|
||||
static inline unsigned long
|
||||
__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
|
||||
{
|
||||
__asm__ __volatile__("membar #StoreLoad | #LoadLoad\n"
|
||||
|
|
@ -293,7 +292,7 @@ __cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
|
|||
if something tries to do an invalid cmpxchg(). */
|
||||
extern void __cmpxchg_called_with_bad_pointer(void);
|
||||
|
||||
static __inline__ unsigned long
|
||||
static inline unsigned long
|
||||
__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
|
||||
{
|
||||
switch (size) {
|
||||
|
|
|
|||
|
|
@ -1,4 +1,3 @@
|
|||
/* $Id: upa.h,v 1.3 1999/09/21 14:39:47 davem Exp $ */
|
||||
#ifndef _SPARC64_UPA_H
|
||||
#define _SPARC64_UPA_H
|
||||
|
||||
|
|
@ -25,7 +24,7 @@
|
|||
|
||||
/* UPA I/O space accessors */
|
||||
#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
|
||||
static __inline__ unsigned char _upa_readb(unsigned long addr)
|
||||
static inline unsigned char _upa_readb(unsigned long addr)
|
||||
{
|
||||
unsigned char ret;
|
||||
|
||||
|
|
@ -36,7 +35,7 @@ static __inline__ unsigned char _upa_readb(unsigned long addr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static __inline__ unsigned short _upa_readw(unsigned long addr)
|
||||
static inline unsigned short _upa_readw(unsigned long addr)
|
||||
{
|
||||
unsigned short ret;
|
||||
|
||||
|
|
@ -47,7 +46,7 @@ static __inline__ unsigned short _upa_readw(unsigned long addr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static __inline__ unsigned int _upa_readl(unsigned long addr)
|
||||
static inline unsigned int _upa_readl(unsigned long addr)
|
||||
{
|
||||
unsigned int ret;
|
||||
|
||||
|
|
@ -58,7 +57,7 @@ static __inline__ unsigned int _upa_readl(unsigned long addr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static __inline__ unsigned long _upa_readq(unsigned long addr)
|
||||
static inline unsigned long _upa_readq(unsigned long addr)
|
||||
{
|
||||
unsigned long ret;
|
||||
|
||||
|
|
@ -69,28 +68,28 @@ static __inline__ unsigned long _upa_readq(unsigned long addr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static __inline__ void _upa_writeb(unsigned char b, unsigned long addr)
|
||||
static inline void _upa_writeb(unsigned char b, unsigned long addr)
|
||||
{
|
||||
__asm__ __volatile__("stba\t%0, [%1] %2\t/* upa_writeb */"
|
||||
: /* no outputs */
|
||||
: "r" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
|
||||
}
|
||||
|
||||
static __inline__ void _upa_writew(unsigned short w, unsigned long addr)
|
||||
static inline void _upa_writew(unsigned short w, unsigned long addr)
|
||||
{
|
||||
__asm__ __volatile__("stha\t%0, [%1] %2\t/* upa_writew */"
|
||||
: /* no outputs */
|
||||
: "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
|
||||
}
|
||||
|
||||
static __inline__ void _upa_writel(unsigned int l, unsigned long addr)
|
||||
static inline void _upa_writel(unsigned int l, unsigned long addr)
|
||||
{
|
||||
__asm__ __volatile__("stwa\t%0, [%1] %2\t/* upa_writel */"
|
||||
: /* no outputs */
|
||||
: "r" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
|
||||
}
|
||||
|
||||
static __inline__ void _upa_writeq(unsigned long q, unsigned long addr)
|
||||
static inline void _upa_writeq(unsigned long q, unsigned long addr)
|
||||
{
|
||||
__asm__ __volatile__("stxa\t%0, [%1] %2\t/* upa_writeq */"
|
||||
: /* no outputs */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,3 @@
|
|||
/* $Id: visasm.h,v 1.5 2001/04/24 01:09:12 davem Exp $ */
|
||||
#ifndef _SPARC64_VISASM_H
|
||||
#define _SPARC64_VISASM_H
|
||||
|
||||
|
|
@ -44,7 +43,7 @@
|
|||
wr %o5, 0, %fprs;
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
static __inline__ void save_and_clear_fpu(void) {
|
||||
static inline void save_and_clear_fpu(void) {
|
||||
__asm__ __volatile__ (
|
||||
" rd %%fprs, %%o5\n"
|
||||
" andcc %%o5, %0, %%g0\n"
|
||||
|
|
|
|||
Loading…
Reference in New Issue