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[SPARC64]: __inline__ --> inline 

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2007-10-27 00:13:04 -07:00
parent ec3b67c11d
commit d979f1792d
22 changed files with 125 additions and 155 deletions
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4
arch/sparc64/kernel/binfmt_elf32.c
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@ -1,7 +1,7 @@
/* /*
* binfmt_elf32.c: Support 32-bit Sparc ELF binaries on Ultra. * binfmt_elf32.c: Support 32-bit Sparc ELF binaries on Ultra.
* *
* Copyright (C) 1995, 1996, 1997, 1998 David S. Miller (davem@redhat.com) * Copyright (C) 1995, 1996, 1997, 1998 David S. Miller (davem@davemloft.net)
* Copyright (C) 1995, 1996, 1997, 1998 Jakub Jelinek (jj@ultra.linux.cz) * Copyright (C) 1995, 1996, 1997, 1998 Jakub Jelinek (jj@ultra.linux.cz)
*/ */
@ -133,7 +133,7 @@ struct elf_prpsinfo32
#undef cputime_to_timeval #undef cputime_to_timeval
#define cputime_to_timeval cputime_to_compat_timeval #define cputime_to_timeval cputime_to_compat_timeval
static __inline__ void static inline void
cputime_to_compat_timeval(const cputime_t cputime, struct compat_timeval *value) cputime_to_compat_timeval(const cputime_t cputime, struct compat_timeval *value)
{ {
unsigned long jiffies = cputime_to_jiffies(cputime); unsigned long jiffies = cputime_to_jiffies(cputime);

9
arch/sparc64/kernel/central.c
View File

@ -1,7 +1,6 @@
/* $Id: central.c,v 1.15 2001/12/19 00:29:51 davem Exp $ /* central.c: Central FHC driver for Sunfire/Starfire/Wildfire.
* central.c: Central FHC driver for Sunfire/Starfire/Wildfire.
* *
* Copyright (C) 1997, 1999 David S. Miller (davem@redhat.com) * Copyright (C) 1997, 1999 David S. Miller (davem@davemloft.net)
*/ */
#include <linux/kernel.h> #include <linux/kernel.h>
@ -385,7 +384,7 @@ void __init central_probe(void)
init_all_fhc_hw(); init_all_fhc_hw();
} }
static __inline__ void fhc_ledblink(struct linux_fhc *fhc, int on) static inline void fhc_ledblink(struct linux_fhc *fhc, int on)
{ {
u32 tmp; u32 tmp;
@ -402,7 +401,7 @@ static __inline__ void fhc_ledblink(struct linux_fhc *fhc, int on)
upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL); upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
} }
static __inline__ void central_ledblink(struct linux_central *central, int on) static inline void central_ledblink(struct linux_central *central, int on)
{ {
u8 tmp; u8 tmp;

5
arch/sparc64/kernel/semaphore.c
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@ -1,5 +1,4 @@
/* $Id: semaphore.c,v 1.9 2001/11/18 00:12:56 davem Exp $ /* semaphore.c: Sparc64 semaphore implementation.
* semaphore.c: Sparc64 semaphore implementation.
* *
* This is basically the PPC semaphore scheme ported to use * This is basically the PPC semaphore scheme ported to use
* the sparc64 atomic instructions, so see the PPC code for * the sparc64 atomic instructions, so see the PPC code for
@ -19,7 +18,7 @@
* sem->count = tmp; * sem->count = tmp;
* return old_count; * return old_count;
*/ */
static __inline__ int __sem_update_count(struct semaphore *sem, int incr) static inline int __sem_update_count(struct semaphore *sem, int incr)
{ {
int old_count, tmp; int old_count, tmp;

4
arch/sparc64/kernel/smp.c
View File

@ -459,7 +459,7 @@ again:
} }
} }
static __inline__ void spitfire_xcall_deliver(u64 data0, u64 data1, u64 data2, cpumask_t mask) static inline void spitfire_xcall_deliver(u64 data0, u64 data1, u64 data2, cpumask_t mask)
{ {
u64 pstate; u64 pstate;
int i; int i;
@ -906,7 +906,7 @@ extern atomic_t dcpage_flushes;
extern atomic_t dcpage_flushes_xcall; extern atomic_t dcpage_flushes_xcall;
#endif #endif
static __inline__ void __local_flush_dcache_page(struct page *page) static inline void __local_flush_dcache_page(struct page *page)
{ {
#ifdef DCACHE_ALIASING_POSSIBLE #ifdef DCACHE_ALIASING_POSSIBLE
__flush_dcache_page(page_address(page), __flush_dcache_page(page_address(page),

9
arch/sparc64/kernel/traps.c
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@ -1,7 +1,6 @@
/* $Id: traps.c,v 1.85 2002/02/09 19:49:31 davem Exp $ /* arch/sparc64/kernel/traps.c
* arch/sparc64/kernel/traps.c
* *
* Copyright (C) 1995,1997 David S. Miller (davem@caip.rutgers.edu) * Copyright (C) 1995,1997 David S. Miller (davem@davemloft.net)
* Copyright (C) 1997,1999,2000 Jakub Jelinek (jakub@redhat.com) * Copyright (C) 1997,1999,2000 Jakub Jelinek (jakub@redhat.com)
*/ */
@ -765,7 +764,7 @@ static unsigned long cheetah_afsr_errors;
*/ */
struct cheetah_err_info *cheetah_error_log; struct cheetah_err_info *cheetah_error_log;
static __inline__ struct cheetah_err_info *cheetah_get_error_log(unsigned long afsr) static inline struct cheetah_err_info *cheetah_get_error_log(unsigned long afsr)
{ {
struct cheetah_err_info *p; struct cheetah_err_info *p;
int cpu = smp_processor_id(); int cpu = smp_processor_id();
@ -1085,7 +1084,7 @@ static unsigned char cheetah_mtag_syntab[] = {
}; };
/* Return the highest priority error conditon mentioned. */ /* Return the highest priority error conditon mentioned. */
static __inline__ unsigned long cheetah_get_hipri(unsigned long afsr) static inline unsigned long cheetah_get_hipri(unsigned long afsr)
{ {
unsigned long tmp = 0; unsigned long tmp = 0;
int i; int i;

4
arch/sparc64/mm/init.c
View File

@ -201,7 +201,7 @@ inline void flush_dcache_page_impl(struct page *page)
#define dcache_dirty_cpu(page) \ #define dcache_dirty_cpu(page) \
(((page)->flags >> PG_dcache_cpu_shift) & PG_dcache_cpu_mask) (((page)->flags >> PG_dcache_cpu_shift) & PG_dcache_cpu_mask)
static __inline__ void set_dcache_dirty(struct page *page, int this_cpu) static inline void set_dcache_dirty(struct page *page, int this_cpu)
{ {
unsigned long mask = this_cpu; unsigned long mask = this_cpu;
unsigned long non_cpu_bits; unsigned long non_cpu_bits;
@ -223,7 +223,7 @@ static __inline__ void set_dcache_dirty(struct page *page, int this_cpu)
: "g1", "g7"); : "g1", "g7");
} }
static __inline__ void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu) static inline void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu)
{ {
unsigned long mask = (1UL << PG_dcache_dirty); unsigned long mask = (1UL << PG_dcache_dirty);

9
arch/sparc64/prom/console.c
View File

@ -1,8 +1,7 @@
/* $Id: console.c,v 1.9 1997/10/29 07:41:43 ecd Exp $ /* console.c: Routines that deal with sending and receiving IO
* console.c: Routines that deal with sending and receiving IO
* to/from the current console device using the PROM. * to/from the current console device using the PROM.
* *
* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) * Copyright (C) 1995 David S. Miller (davem@davemloft.net)
* Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
*/ */
@ -19,7 +18,7 @@ extern int prom_stdin, prom_stdout;
/* Non blocking get character from console input device, returns -1 /* Non blocking get character from console input device, returns -1
* if no input was taken. This can be used for polling. * if no input was taken. This can be used for polling.
*/ */
__inline__ int inline int
prom_nbgetchar(void) prom_nbgetchar(void)
{ {
char inc; char inc;
@ -35,7 +34,7 @@ prom_nbgetchar(void)
/* Non blocking put character to console device, returns -1 if /* Non blocking put character to console device, returns -1 if
* unsuccessful. * unsuccessful.
*/ */
__inline__ int inline int
prom_nbputchar(char c) prom_nbputchar(char c)
{ {
char outc; char outc;

49
arch/sparc64/prom/tree.c
View File

@ -18,14 +18,12 @@
/* Return the child of node 'node' or zero if no this node has no /* Return the child of node 'node' or zero if no this node has no
* direct descendent. * direct descendent.
*/ */
__inline__ int inline int __prom_getchild(int node)
__prom_getchild(int node)
{ {
return p1275_cmd ("child", P1275_INOUT(1, 1), node); return p1275_cmd ("child", P1275_INOUT(1, 1), node);
} }
__inline__ int inline int prom_getchild(int node)
prom_getchild(int node)
{ {
int cnode; int cnode;
@ -35,8 +33,7 @@ prom_getchild(int node)
return (int)cnode; return (int)cnode;
} }
__inline__ int inline int prom_getparent(int node)
prom_getparent(int node)
{ {
int cnode; int cnode;
@ -49,14 +46,12 @@ prom_getparent(int node)
/* Return the next sibling of node 'node' or zero if no more siblings /* Return the next sibling of node 'node' or zero if no more siblings
* at this level of depth in the tree. * at this level of depth in the tree.
*/ */
__inline__ int inline int __prom_getsibling(int node)
__prom_getsibling(int node)
{ {
return p1275_cmd(prom_peer_name, P1275_INOUT(1, 1), node); return p1275_cmd(prom_peer_name, P1275_INOUT(1, 1), node);
} }
__inline__ int inline int prom_getsibling(int node)
prom_getsibling(int node)
{ {
int sibnode; int sibnode;
@ -72,8 +67,7 @@ prom_getsibling(int node)
/* Return the length in bytes of property 'prop' at node 'node'. /* Return the length in bytes of property 'prop' at node 'node'.
* Return -1 on error. * Return -1 on error.
*/ */
__inline__ int inline int prom_getproplen(int node, const char *prop)
prom_getproplen(int node, const char *prop)
{ {
if((!node) || (!prop)) return -1; if((!node) || (!prop)) return -1;
return p1275_cmd ("getproplen", return p1275_cmd ("getproplen",
@ -86,8 +80,8 @@ prom_getproplen(int node, const char *prop)
* 'buffer' which has a size of 'bufsize'. If the acquisition * 'buffer' which has a size of 'bufsize'. If the acquisition
* was successful the length will be returned, else -1 is returned. * was successful the length will be returned, else -1 is returned.
*/ */
__inline__ int inline int prom_getproperty(int node, const char *prop,
prom_getproperty(int node, const char *prop, char *buffer, int bufsize) char *buffer, int bufsize)
{ {
int plen; int plen;
@ -107,8 +101,7 @@ prom_getproperty(int node, const char *prop, char *buffer, int bufsize)
/* Acquire an integer property and return its value. Returns -1 /* Acquire an integer property and return its value. Returns -1
* on failure. * on failure.
*/ */
__inline__ int inline int prom_getint(int node, const char *prop)
prom_getint(int node, const char *prop)
{ {
int intprop; int intprop;
@ -122,8 +115,7 @@ prom_getint(int node, const char *prop)
* integer. * integer.
*/ */
int int prom_getintdefault(int node, const char *property, int deflt)
prom_getintdefault(int node, const char *property, int deflt)
{ {
int retval; int retval;
@ -134,8 +126,7 @@ prom_getintdefault(int node, const char *property, int deflt)
} }
/* Acquire a boolean property, 1=TRUE 0=FALSE. */ /* Acquire a boolean property, 1=TRUE 0=FALSE. */
int int prom_getbool(int node, const char *prop)
prom_getbool(int node, const char *prop)
{ {
int retval; int retval;
@ -148,8 +139,7 @@ prom_getbool(int node, const char *prop)
* string on error. The char pointer is the user supplied string * string on error. The char pointer is the user supplied string
* buffer. * buffer.
*/ */
void void prom_getstring(int node, const char *prop, char *user_buf, int ubuf_size)
prom_getstring(int node, const char *prop, char *user_buf, int ubuf_size)
{ {
int len; int len;
@ -163,8 +153,7 @@ prom_getstring(int node, const char *prop, char *user_buf, int ubuf_size)
/* Does the device at node 'node' have name 'name'? /* Does the device at node 'node' have name 'name'?
* YES = 1 NO = 0 * YES = 1 NO = 0
*/ */
int int prom_nodematch(int node, const char *name)
prom_nodematch(int node, const char *name)
{ {
char namebuf[128]; char namebuf[128];
prom_getproperty(node, "name", namebuf, sizeof(namebuf)); prom_getproperty(node, "name", namebuf, sizeof(namebuf));
@ -175,8 +164,7 @@ prom_nodematch(int node, const char *name)
/* Search siblings at 'node_start' for a node with name /* Search siblings at 'node_start' for a node with name
* 'nodename'. Return node if successful, zero if not. * 'nodename'. Return node if successful, zero if not.
*/ */
int int prom_searchsiblings(int node_start, const char *nodename)
prom_searchsiblings(int node_start, const char *nodename)
{ {
int thisnode, error; int thisnode, error;
@ -197,8 +185,7 @@ prom_searchsiblings(int node_start, const char *nodename)
/* Return the first property type for node 'node'. /* Return the first property type for node 'node'.
* buffer should be at least 32B in length * buffer should be at least 32B in length
*/ */
__inline__ char * inline char *prom_firstprop(int node, char *buffer)
prom_firstprop(int node, char *buffer)
{ {
*buffer = 0; *buffer = 0;
if(node == -1) return buffer; if(node == -1) return buffer;
@ -212,8 +199,7 @@ prom_firstprop(int node, char *buffer)
* at node 'node' . Returns NULL string if no more * at node 'node' . Returns NULL string if no more
* property types for this node. * property types for this node.
*/ */
__inline__ char * inline char *prom_nextprop(int node, const char *oprop, char *buffer)
prom_nextprop(int node, const char *oprop, char *buffer)
{ {
char buf[32]; char buf[32];
@ -279,8 +265,7 @@ prom_setprop(int node, const char *pname, char *value, int size)
node, pname, value, P1275_SIZE(size)); node, pname, value, P1275_SIZE(size));
} }
__inline__ int inline int prom_inst2pkg(int inst)
prom_inst2pkg(int inst)
{ {
int node; int node;

7
include/asm-sparc64/atomic.h
View File

@ -1,5 +1,4 @@
/* $Id: atomic.h,v 1.22 2001/07/11 23:56:07 davem Exp $ /* atomic.h: Thankfully the V9 is at least reasonable for this
* atomic.h: Thankfully the V9 is at least reasonable for this
* stuff. * stuff.
* *
* Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com) * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com)
@ -74,7 +73,7 @@ extern int atomic64_sub_ret(int, atomic64_t *);
#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) static inline int atomic_add_unless(atomic_t *v, int a, int u)
{ {
int c, old; int c, old;
c = atomic_read(v); c = atomic_read(v);
@ -95,7 +94,7 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
#define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) #define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) static inline int atomic64_add_unless(atomic64_t *v, long a, long u)
{ {
long c, old; long c, old;
c = atomic64_read(v); c = atomic64_read(v);

7
include/asm-sparc64/byteorder.h
View File

@ -1,4 +1,3 @@
/* $Id: byteorder.h,v 1.8 1997/12/18 02:44:14 ecd Exp $ */
#ifndef _SPARC64_BYTEORDER_H #ifndef _SPARC64_BYTEORDER_H
#define _SPARC64_BYTEORDER_H #define _SPARC64_BYTEORDER_H
@ -7,7 +6,7 @@
#ifdef __GNUC__ #ifdef __GNUC__
static __inline__ __u16 ___arch__swab16p(const __u16 *addr) static inline __u16 ___arch__swab16p(const __u16 *addr)
{ {
__u16 ret; __u16 ret;
@ -17,7 +16,7 @@ static __inline__ __u16 ___arch__swab16p(const __u16 *addr)
return ret; return ret;
} }
static __inline__ __u32 ___arch__swab32p(const __u32 *addr) static inline __u32 ___arch__swab32p(const __u32 *addr)
{ {
__u32 ret; __u32 ret;
@ -27,7 +26,7 @@ static __inline__ __u32 ___arch__swab32p(const __u32 *addr)
return ret; return ret;
} }
static __inline__ __u64 ___arch__swab64p(const __u64 *addr) static inline __u64 ___arch__swab64p(const __u64 *addr)
{ {
__u64 ret; __u64 ret;

4
include/asm-sparc64/fpumacro.h
View File

@ -16,7 +16,7 @@ struct fpustate {
#define FPUSTATE (struct fpustate *)(current_thread_info()->fpregs) #define FPUSTATE (struct fpustate *)(current_thread_info()->fpregs)
static __inline__ unsigned long fprs_read(void) static inline unsigned long fprs_read(void)
{ {
unsigned long retval; unsigned long retval;
@ -25,7 +25,7 @@ static __inline__ unsigned long fprs_read(void)
return retval; return retval;
} }
static __inline__ void fprs_write(unsigned long val) static inline void fprs_write(unsigned long val)
{ {
__asm__ __volatile__("wr %0, 0x0, %%fprs" : : "r" (val)); __asm__ __volatile__("wr %0, 0x0, %%fprs" : : "r" (val));
} }

29
include/asm-sparc64/io.h
View File

@ -1,4 +1,3 @@
/* $Id: io.h,v 1.47 2001/12/13 10:36:02 davem Exp $ */
#ifndef __SPARC64_IO_H #ifndef __SPARC64_IO_H
#define __SPARC64_IO_H #define __SPARC64_IO_H
@ -19,7 +18,7 @@ extern unsigned long kern_base, kern_size;
#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
#define BIO_VMERGE_BOUNDARY 8192 #define BIO_VMERGE_BOUNDARY 8192
static __inline__ u8 _inb(unsigned long addr) static inline u8 _inb(unsigned long addr)
{ {
u8 ret; u8 ret;
@ -30,7 +29,7 @@ static __inline__ u8 _inb(unsigned long addr)
return ret; return ret;
} }
static __inline__ u16 _inw(unsigned long addr) static inline u16 _inw(unsigned long addr)
{ {
u16 ret; u16 ret;
@ -41,7 +40,7 @@ static __inline__ u16 _inw(unsigned long addr)
return ret; return ret;
} }
static __inline__ u32 _inl(unsigned long addr) static inline u32 _inl(unsigned long addr)
{ {
u32 ret; u32 ret;
@ -52,21 +51,21 @@ static __inline__ u32 _inl(unsigned long addr)
return ret; return ret;
} }
static __inline__ void _outb(u8 b, unsigned long addr) static inline void _outb(u8 b, unsigned long addr)
{ {
__asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */" __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */"
: /* no outputs */ : /* no outputs */
: "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
} }
static __inline__ void _outw(u16 w, unsigned long addr) static inline void _outw(u16 w, unsigned long addr)
{ {
__asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */" __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */"
: /* no outputs */ : /* no outputs */
: "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
} }
static __inline__ void _outl(u32 l, unsigned long addr) static inline void _outl(u32 l, unsigned long addr)
{ {
__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */" __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */"
: /* no outputs */ : /* no outputs */
@ -205,7 +204,7 @@ static inline void _writeq(u64 q, volatile void __iomem *addr)
#define writeq(__q, __addr) _writeq(__q, __addr) #define writeq(__q, __addr) _writeq(__q, __addr)
/* Now versions without byte-swapping. */ /* Now versions without byte-swapping. */
static __inline__ u8 _raw_readb(unsigned long addr) static inline u8 _raw_readb(unsigned long addr)
{ {
u8 ret; u8 ret;
@ -216,7 +215,7 @@ static __inline__ u8 _raw_readb(unsigned long addr)
return ret; return ret;
} }
static __inline__ u16 _raw_readw(unsigned long addr) static inline u16 _raw_readw(unsigned long addr)
{ {
u16 ret; u16 ret;
@ -227,7 +226,7 @@ static __inline__ u16 _raw_readw(unsigned long addr)
return ret; return ret;
} }
static __inline__ u32 _raw_readl(unsigned long addr) static inline u32 _raw_readl(unsigned long addr)
{ {
u32 ret; u32 ret;
@ -238,7 +237,7 @@ static __inline__ u32 _raw_readl(unsigned long addr)
return ret; return ret;
} }
static __inline__ u64 _raw_readq(unsigned long addr) static inline u64 _raw_readq(unsigned long addr)
{ {
u64 ret; u64 ret;
@ -249,28 +248,28 @@ static __inline__ u64 _raw_readq(unsigned long addr)
return ret; return ret;
} }
static __inline__ void _raw_writeb(u8 b, unsigned long addr) static inline void _raw_writeb(u8 b, unsigned long addr)
{ {
__asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */" __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */"
: /* no outputs */ : /* no outputs */
: "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
} }
static __inline__ void _raw_writew(u16 w, unsigned long addr) static inline void _raw_writew(u16 w, unsigned long addr)
{ {
__asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */" __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */"
: /* no outputs */ : /* no outputs */
: "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
} }
static __inline__ void _raw_writel(u32 l, unsigned long addr) static inline void _raw_writel(u32 l, unsigned long addr)
{ {
__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */" __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */"
: /* no outputs */ : /* no outputs */
: "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
} }
static __inline__ void _raw_writeq(u64 q, unsigned long addr) static inline void _raw_writeq(u64 q, unsigned long addr)
{ {
__asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */" __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */"
: /* no outputs */ : /* no outputs */

11
include/asm-sparc64/irq.h
View File

@ -1,7 +1,6 @@
/* $Id: irq.h,v 1.21 2002/01/23 11:27:36 davem Exp $ /* irq.h: IRQ registers on the 64-bit Sparc.
* irq.h: IRQ registers on the 64-bit Sparc.
* *
* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
* Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz) * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
*/ */
@ -67,21 +66,21 @@ extern void virt_irq_free(unsigned int virt_irq);
extern void fixup_irqs(void); extern void fixup_irqs(void);
static __inline__ void set_softint(unsigned long bits) static inline void set_softint(unsigned long bits)
{ {
__asm__ __volatile__("wr %0, 0x0, %%set_softint" __asm__ __volatile__("wr %0, 0x0, %%set_softint"
: /* No outputs */ : /* No outputs */
: "r" (bits)); : "r" (bits));
} }
static __inline__ void clear_softint(unsigned long bits) static inline void clear_softint(unsigned long bits)
{ {
__asm__ __volatile__("wr %0, 0x0, %%clear_softint" __asm__ __volatile__("wr %0, 0x0, %%clear_softint"
: /* No outputs */ : /* No outputs */
: "r" (bits)); : "r" (bits));
} }
static __inline__ unsigned long get_softint(void) static inline unsigned long get_softint(void)
{ {
unsigned long retval; unsigned long retval;

9
include/asm-sparc64/mostek.h
View File

@ -1,7 +1,6 @@
/* $Id: mostek.h,v 1.4 2001/01/11 15:07:09 davem Exp $ /* mostek.h: Describes the various Mostek time of day clock registers.
* mostek.h: Describes the various Mostek time of day clock registers.
* *
* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) * Copyright (C) 1995 David S. Miller (davem@davemloft.net)
* Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
*/ */
@ -38,7 +37,7 @@
* *
* We now deal with physical addresses for I/O to the chip. -DaveM * We now deal with physical addresses for I/O to the chip. -DaveM
*/ */
static __inline__ u8 mostek_read(void __iomem *addr) static inline u8 mostek_read(void __iomem *addr)
{ {
u8 ret; u8 ret;
@ -48,7 +47,7 @@ static __inline__ u8 mostek_read(void __iomem *addr)
return ret; return ret;
} }
static __inline__ void mostek_write(void __iomem *addr, u8 val) static inline void mostek_write(void __iomem *addr, u8 val)
{ {
__asm__ __volatile__("stba %0, [%1] %2" __asm__ __volatile__("stba %0, [%1] %2"
: /* no outputs */ : /* no outputs */

5
include/asm-sparc64/ns87303.h
View File

@ -1,5 +1,4 @@
/* $Id: ns87303.h,v 1.3 2000/01/09 15:16:34 ecd Exp $ /* ns87303.h: Configuration Register Description for the
* ns87303.h: Configuration Register Description for the
* National Semiconductor PC87303 (SuperIO). * National Semiconductor PC87303 (SuperIO).
* *
* Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
@ -85,7 +84,7 @@
extern spinlock_t ns87303_lock; extern spinlock_t ns87303_lock;
static __inline__ int ns87303_modify(unsigned long port, unsigned int index, static inline int ns87303_modify(unsigned long port, unsigned int index,
unsigned char clr, unsigned char set) unsigned char clr, unsigned char set)
{ {
static unsigned char reserved[] = { static unsigned char reserved[] = {

21
include/asm-sparc64/parport.h
View File

@ -1,5 +1,4 @@
/* $Id: parport.h,v 1.11 2001/05/11 07:54:24 davem Exp $ /* parport.h: sparc64 specific parport initialization and dma.
* parport.h: sparc64 specific parport initialization and dma.
* *
* Copyright (C) 1999 Eddie C. Dost (ecd@skynet.be) * Copyright (C) 1999 Eddie C. Dost (ecd@skynet.be)
*/ */
@ -42,7 +41,7 @@ static struct sparc_ebus_info {
static DECLARE_BITMAP(dma_slot_map, PARPORT_PC_MAX_PORTS); static DECLARE_BITMAP(dma_slot_map, PARPORT_PC_MAX_PORTS);
static __inline__ int request_dma(unsigned int dmanr, const char *device_id) static inline int request_dma(unsigned int dmanr, const char *device_id)
{ {
if (dmanr >= PARPORT_PC_MAX_PORTS) if (dmanr >= PARPORT_PC_MAX_PORTS)
return -EINVAL; return -EINVAL;
@ -51,7 +50,7 @@ static __inline__ int request_dma(unsigned int dmanr, const char *device_id)
return 0; return 0;
} }
static __inline__ void free_dma(unsigned int dmanr) static inline void free_dma(unsigned int dmanr)
{ {
if (dmanr >= PARPORT_PC_MAX_PORTS) { if (dmanr >= PARPORT_PC_MAX_PORTS) {
printk(KERN_WARNING "Trying to free DMA%d\n", dmanr); printk(KERN_WARNING "Trying to free DMA%d\n", dmanr);
@ -63,7 +62,7 @@ static __inline__ void free_dma(unsigned int dmanr)
} }
} }
static __inline__ void enable_dma(unsigned int dmanr) static inline void enable_dma(unsigned int dmanr)
{ {
ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1); ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1);
@ -73,32 +72,32 @@ static __inline__ void enable_dma(unsigned int dmanr)
BUG(); BUG();
} }
static __inline__ void disable_dma(unsigned int dmanr) static inline void disable_dma(unsigned int dmanr)
{ {
ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 0); ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 0);
} }
static __inline__ void clear_dma_ff(unsigned int dmanr) static inline void clear_dma_ff(unsigned int dmanr)
{ {
/* nothing */ /* nothing */
} }
static __inline__ void set_dma_mode(unsigned int dmanr, char mode) static inline void set_dma_mode(unsigned int dmanr, char mode)
{ {
ebus_dma_prepare(&sparc_ebus_dmas[dmanr].info, (mode != DMA_MODE_WRITE)); ebus_dma_prepare(&sparc_ebus_dmas[dmanr].info, (mode != DMA_MODE_WRITE));
} }
static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int addr) static inline void set_dma_addr(unsigned int dmanr, unsigned int addr)
{ {
sparc_ebus_dmas[dmanr].addr = addr; sparc_ebus_dmas[dmanr].addr = addr;
} }
static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) static inline void set_dma_count(unsigned int dmanr, unsigned int count)
{ {
sparc_ebus_dmas[dmanr].count = count; sparc_ebus_dmas[dmanr].count = count;
} }
static __inline__ unsigned int get_dma_residue(unsigned int dmanr) static inline unsigned int get_dma_residue(unsigned int dmanr)
{ {
return ebus_dma_residue(&sparc_ebus_dmas[dmanr].info); return ebus_dma_residue(&sparc_ebus_dmas[dmanr].info);
} }

8
include/asm-sparc64/posix_types.h
View File

@ -53,7 +53,7 @@ typedef struct {
#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) #if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
#undef __FD_SET #undef __FD_SET
static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
{ {
unsigned long _tmp = fd / __NFDBITS; unsigned long _tmp = fd / __NFDBITS;
unsigned long _rem = fd % __NFDBITS; unsigned long _rem = fd % __NFDBITS;
@ -61,7 +61,7 @@ static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
} }
#undef __FD_CLR #undef __FD_CLR
static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
{ {
unsigned long _tmp = fd / __NFDBITS; unsigned long _tmp = fd / __NFDBITS;
unsigned long _rem = fd % __NFDBITS; unsigned long _rem = fd % __NFDBITS;
@ -69,7 +69,7 @@ static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
} }
#undef __FD_ISSET #undef __FD_ISSET
static __inline__ int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p) static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p)
{ {
unsigned long _tmp = fd / __NFDBITS; unsigned long _tmp = fd / __NFDBITS;
unsigned long _rem = fd % __NFDBITS; unsigned long _rem = fd % __NFDBITS;
@ -81,7 +81,7 @@ static __inline__ int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p)
* for 256 and 1024-bit fd_sets respectively) * for 256 and 1024-bit fd_sets respectively)
*/ */
#undef __FD_ZERO #undef __FD_ZERO
static __inline__ void __FD_ZERO(__kernel_fd_set *p) static inline void __FD_ZERO(__kernel_fd_set *p)
{ {
unsigned long *tmp = p->fds_bits; unsigned long *tmp = p->fds_bits;
int i; int i;

4
include/asm-sparc64/sbus.h
View File

@ -29,12 +29,12 @@
* numbers + offsets, and vice versa. * numbers + offsets, and vice versa.
*/ */
static __inline__ unsigned long sbus_devaddr(int slotnum, unsigned long offset) static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset)
{ {
return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<28)+(offset)); return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<28)+(offset));
} }
static __inline__ int sbus_dev_slot(unsigned long dev_addr) static inline int sbus_dev_slot(unsigned long dev_addr)
{ {
return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>28); return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>28);
} }

53
include/asm-sparc64/spitfire.h
View File

@ -1,7 +1,6 @@
/* $Id: spitfire.h,v 1.18 2001/11/29 16:42:10 kanoj Exp $ /* spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations.
* spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations.
* *
* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
*/ */
#ifndef _SPARC64_SPITFIRE_H #ifndef _SPARC64_SPITFIRE_H
@ -67,7 +66,7 @@ extern void cheetah_enable_pcache(void);
/* The data cache is write through, so this just invalidates the /* The data cache is write through, so this just invalidates the
* specified line. * specified line.
*/ */
static __inline__ void spitfire_put_dcache_tag(unsigned long addr, unsigned long tag) static inline void spitfire_put_dcache_tag(unsigned long addr, unsigned long tag)
{ {
__asm__ __volatile__("stxa %0, [%1] %2\n\t" __asm__ __volatile__("stxa %0, [%1] %2\n\t"
"membar #Sync" "membar #Sync"
@ -81,7 +80,7 @@ static __inline__ void spitfire_put_dcache_tag(unsigned long addr, unsigned long
* a flush instruction (to any address) is sufficient to handle * a flush instruction (to any address) is sufficient to handle
* this issue after the line is invalidated. * this issue after the line is invalidated.
*/ */
static __inline__ void spitfire_put_icache_tag(unsigned long addr, unsigned long tag) static inline void spitfire_put_icache_tag(unsigned long addr, unsigned long tag)
{ {
__asm__ __volatile__("stxa %0, [%1] %2\n\t" __asm__ __volatile__("stxa %0, [%1] %2\n\t"
"membar #Sync" "membar #Sync"
@ -89,7 +88,7 @@ static __inline__ void spitfire_put_icache_tag(unsigned long addr, unsigned long
: "r" (tag), "r" (addr), "i" (ASI_IC_TAG)); : "r" (tag), "r" (addr), "i" (ASI_IC_TAG));
} }
static __inline__ unsigned long spitfire_get_dtlb_data(int entry) static inline unsigned long spitfire_get_dtlb_data(int entry)
{ {
unsigned long data; unsigned long data;
@ -103,7 +102,7 @@ static __inline__ unsigned long spitfire_get_dtlb_data(int entry)
return data; return data;
} }
static __inline__ unsigned long spitfire_get_dtlb_tag(int entry) static inline unsigned long spitfire_get_dtlb_tag(int entry)
{ {
unsigned long tag; unsigned long tag;
@ -113,7 +112,7 @@ static __inline__ unsigned long spitfire_get_dtlb_tag(int entry)
return tag; return tag;
} }
static __inline__ void spitfire_put_dtlb_data(int entry, unsigned long data) static inline void spitfire_put_dtlb_data(int entry, unsigned long data)
{ {
__asm__ __volatile__("stxa %0, [%1] %2\n\t" __asm__ __volatile__("stxa %0, [%1] %2\n\t"
"membar #Sync" "membar #Sync"
@ -122,7 +121,7 @@ static __inline__ void spitfire_put_dtlb_data(int entry, unsigned long data)
"i" (ASI_DTLB_DATA_ACCESS)); "i" (ASI_DTLB_DATA_ACCESS));
} }
static __inline__ unsigned long spitfire_get_itlb_data(int entry) static inline unsigned long spitfire_get_itlb_data(int entry)
{ {
unsigned long data; unsigned long data;
@ -136,7 +135,7 @@ static __inline__ unsigned long spitfire_get_itlb_data(int entry)
return data; return data;
} }
static __inline__ unsigned long spitfire_get_itlb_tag(int entry) static inline unsigned long spitfire_get_itlb_tag(int entry)
{ {
unsigned long tag; unsigned long tag;
@ -146,7 +145,7 @@ static __inline__ unsigned long spitfire_get_itlb_tag(int entry)
return tag; return tag;
} }
static __inline__ void spitfire_put_itlb_data(int entry, unsigned long data) static inline void spitfire_put_itlb_data(int entry, unsigned long data)
{ {
__asm__ __volatile__("stxa %0, [%1] %2\n\t" __asm__ __volatile__("stxa %0, [%1] %2\n\t"
"membar #Sync" "membar #Sync"
@ -155,7 +154,7 @@ static __inline__ void spitfire_put_itlb_data(int entry, unsigned long data)
"i" (ASI_ITLB_DATA_ACCESS)); "i" (ASI_ITLB_DATA_ACCESS));
} }
static __inline__ void spitfire_flush_dtlb_nucleus_page(unsigned long page) static inline void spitfire_flush_dtlb_nucleus_page(unsigned long page)
{ {
__asm__ __volatile__("stxa %%g0, [%0] %1\n\t" __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
"membar #Sync" "membar #Sync"
@ -163,7 +162,7 @@ static __inline__ void spitfire_flush_dtlb_nucleus_page(unsigned long page)
: "r" (page | 0x20), "i" (ASI_DMMU_DEMAP)); : "r" (page | 0x20), "i" (ASI_DMMU_DEMAP));
} }
static __inline__ void spitfire_flush_itlb_nucleus_page(unsigned long page) static inline void spitfire_flush_itlb_nucleus_page(unsigned long page)
{ {
__asm__ __volatile__("stxa %%g0, [%0] %1\n\t" __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
"membar #Sync" "membar #Sync"
@ -172,7 +171,7 @@ static __inline__ void spitfire_flush_itlb_nucleus_page(unsigned long page)
} }
/* Cheetah has "all non-locked" tlb flushes. */ /* Cheetah has "all non-locked" tlb flushes. */
static __inline__ void cheetah_flush_dtlb_all(void) static inline void cheetah_flush_dtlb_all(void)
{ {
__asm__ __volatile__("stxa %%g0, [%0] %1\n\t" __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
"membar #Sync" "membar #Sync"
@ -180,7 +179,7 @@ static __inline__ void cheetah_flush_dtlb_all(void)
: "r" (0x80), "i" (ASI_DMMU_DEMAP)); : "r" (0x80), "i" (ASI_DMMU_DEMAP));
} }
static __inline__ void cheetah_flush_itlb_all(void) static inline void cheetah_flush_itlb_all(void)
{ {
__asm__ __volatile__("stxa %%g0, [%0] %1\n\t" __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
"membar #Sync" "membar #Sync"
@ -202,7 +201,7 @@ static __inline__ void cheetah_flush_itlb_all(void)
* ASI_{D,I}TLB_DATA_ACCESS loads, doing the load twice fixes * ASI_{D,I}TLB_DATA_ACCESS loads, doing the load twice fixes
* the problem for me. -DaveM * the problem for me. -DaveM
*/ */
static __inline__ unsigned long cheetah_get_ldtlb_data(int entry) static inline unsigned long cheetah_get_ldtlb_data(int entry)
{ {
unsigned long data; unsigned long data;
@ -215,7 +214,7 @@ static __inline__ unsigned long cheetah_get_ldtlb_data(int entry)
return data; return data;
} }
static __inline__ unsigned long cheetah_get_litlb_data(int entry) static inline unsigned long cheetah_get_litlb_data(int entry)
{ {
unsigned long data; unsigned long data;
@ -228,7 +227,7 @@ static __inline__ unsigned long cheetah_get_litlb_data(int entry)
return data; return data;
} }
static __inline__ unsigned long cheetah_get_ldtlb_tag(int entry) static inline unsigned long cheetah_get_ldtlb_tag(int entry)
{ {
unsigned long tag; unsigned long tag;
@ -240,7 +239,7 @@ static __inline__ unsigned long cheetah_get_ldtlb_tag(int entry)
return tag; return tag;
} }
static __inline__ unsigned long cheetah_get_litlb_tag(int entry) static inline unsigned long cheetah_get_litlb_tag(int entry)
{ {
unsigned long tag; unsigned long tag;
@ -252,7 +251,7 @@ static __inline__ unsigned long cheetah_get_litlb_tag(int entry)
return tag; return tag;
} }
static __inline__ void cheetah_put_ldtlb_data(int entry, unsigned long data) static inline void cheetah_put_ldtlb_data(int entry, unsigned long data)
{ {
__asm__ __volatile__("stxa %0, [%1] %2\n\t" __asm__ __volatile__("stxa %0, [%1] %2\n\t"
"membar #Sync" "membar #Sync"
@ -262,7 +261,7 @@ static __inline__ void cheetah_put_ldtlb_data(int entry, unsigned long data)
"i" (ASI_DTLB_DATA_ACCESS)); "i" (ASI_DTLB_DATA_ACCESS));
} }
static __inline__ void cheetah_put_litlb_data(int entry, unsigned long data) static inline void cheetah_put_litlb_data(int entry, unsigned long data)
{ {
__asm__ __volatile__("stxa %0, [%1] %2\n\t" __asm__ __volatile__("stxa %0, [%1] %2\n\t"
"membar #Sync" "membar #Sync"
@ -272,7 +271,7 @@ static __inline__ void cheetah_put_litlb_data(int entry, unsigned long data)
"i" (ASI_ITLB_DATA_ACCESS)); "i" (ASI_ITLB_DATA_ACCESS));
} }
static __inline__ unsigned long cheetah_get_dtlb_data(int entry, int tlb) static inline unsigned long cheetah_get_dtlb_data(int entry, int tlb)
{ {
unsigned long data; unsigned long data;
@ -284,7 +283,7 @@ static __inline__ unsigned long cheetah_get_dtlb_data(int entry, int tlb)
return data; return data;
} }
static __inline__ unsigned long cheetah_get_dtlb_tag(int entry, int tlb) static inline unsigned long cheetah_get_dtlb_tag(int entry, int tlb)
{ {
unsigned long tag; unsigned long tag;
@ -294,7 +293,7 @@ static __inline__ unsigned long cheetah_get_dtlb_tag(int entry, int tlb)
return tag; return tag;
} }
static __inline__ void cheetah_put_dtlb_data(int entry, unsigned long data, int tlb) static inline void cheetah_put_dtlb_data(int entry, unsigned long data, int tlb)
{ {
__asm__ __volatile__("stxa %0, [%1] %2\n\t" __asm__ __volatile__("stxa %0, [%1] %2\n\t"
"membar #Sync" "membar #Sync"
@ -304,7 +303,7 @@ static __inline__ void cheetah_put_dtlb_data(int entry, unsigned long data, int
"i" (ASI_DTLB_DATA_ACCESS)); "i" (ASI_DTLB_DATA_ACCESS));
} }
static __inline__ unsigned long cheetah_get_itlb_data(int entry) static inline unsigned long cheetah_get_itlb_data(int entry)
{ {
unsigned long data; unsigned long data;
@ -317,7 +316,7 @@ static __inline__ unsigned long cheetah_get_itlb_data(int entry)
return data; return data;
} }
static __inline__ unsigned long cheetah_get_itlb_tag(int entry) static inline unsigned long cheetah_get_itlb_tag(int entry)
{ {
unsigned long tag; unsigned long tag;
@ -327,7 +326,7 @@ static __inline__ unsigned long cheetah_get_itlb_tag(int entry)
return tag; return tag;
} }
static __inline__ void cheetah_put_itlb_data(int entry, unsigned long data) static inline void cheetah_put_itlb_data(int entry, unsigned long data)
{ {
__asm__ __volatile__("stxa %0, [%1] %2\n\t" __asm__ __volatile__("stxa %0, [%1] %2\n\t"
"membar #Sync" "membar #Sync"

9
include/asm-sparc64/system.h
View File

@ -1,4 +1,3 @@
/* $Id: system.h,v 1.69 2002/02/09 19:49:31 davem Exp $ */
#ifndef __SPARC64_SYSTEM_H #ifndef __SPARC64_SYSTEM_H
#define __SPARC64_SYSTEM_H #define __SPARC64_SYSTEM_H
@ -240,7 +239,7 @@ static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long
extern void __xchg_called_with_bad_pointer(void); extern void __xchg_called_with_bad_pointer(void);
static __inline__ unsigned long __xchg(unsigned long x, __volatile__ void * ptr, static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr,
int size) int size)
{ {
switch (size) { switch (size) {
@ -263,7 +262,7 @@ extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noret
#define __HAVE_ARCH_CMPXCHG 1 #define __HAVE_ARCH_CMPXCHG 1
static __inline__ unsigned long static inline unsigned long
__cmpxchg_u32(volatile int *m, int old, int new) __cmpxchg_u32(volatile int *m, int old, int new)
{ {
__asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n"
@ -276,7 +275,7 @@ __cmpxchg_u32(volatile int *m, int old, int new)
return new; return new;
} }
static __inline__ unsigned long static inline unsigned long
__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new) __cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
{ {
__asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n"
@ -293,7 +292,7 @@ __cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
if something tries to do an invalid cmpxchg(). */ if something tries to do an invalid cmpxchg(). */
extern void __cmpxchg_called_with_bad_pointer(void); extern void __cmpxchg_called_with_bad_pointer(void);
static __inline__ unsigned long static inline unsigned long
__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
{ {
switch (size) { switch (size) {

17
include/asm-sparc64/upa.h
View File

@ -1,4 +1,3 @@
/* $Id: upa.h,v 1.3 1999/09/21 14:39:47 davem Exp $ */
#ifndef _SPARC64_UPA_H #ifndef _SPARC64_UPA_H
#define _SPARC64_UPA_H #define _SPARC64_UPA_H
@ -25,7 +24,7 @@
/* UPA I/O space accessors */ /* UPA I/O space accessors */
#if defined(__KERNEL__) && !defined(__ASSEMBLY__) #if defined(__KERNEL__) && !defined(__ASSEMBLY__)
static __inline__ unsigned char _upa_readb(unsigned long addr) static inline unsigned char _upa_readb(unsigned long addr)
{ {
unsigned char ret; unsigned char ret;
@ -36,7 +35,7 @@ static __inline__ unsigned char _upa_readb(unsigned long addr)
return ret; return ret;
} }
static __inline__ unsigned short _upa_readw(unsigned long addr) static inline unsigned short _upa_readw(unsigned long addr)
{ {
unsigned short ret; unsigned short ret;
@ -47,7 +46,7 @@ static __inline__ unsigned short _upa_readw(unsigned long addr)
return ret; return ret;
} }
static __inline__ unsigned int _upa_readl(unsigned long addr) static inline unsigned int _upa_readl(unsigned long addr)
{ {
unsigned int ret; unsigned int ret;
@ -58,7 +57,7 @@ static __inline__ unsigned int _upa_readl(unsigned long addr)
return ret; return ret;
} }
static __inline__ unsigned long _upa_readq(unsigned long addr) static inline unsigned long _upa_readq(unsigned long addr)
{ {
unsigned long ret; unsigned long ret;
@ -69,28 +68,28 @@ static __inline__ unsigned long _upa_readq(unsigned long addr)
return ret; return ret;
} }
static __inline__ void _upa_writeb(unsigned char b, unsigned long addr) static inline void _upa_writeb(unsigned char b, unsigned long addr)
{ {
__asm__ __volatile__("stba\t%0, [%1] %2\t/* upa_writeb */" __asm__ __volatile__("stba\t%0, [%1] %2\t/* upa_writeb */"
: /* no outputs */ : /* no outputs */
: "r" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); : "r" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
} }
static __inline__ void _upa_writew(unsigned short w, unsigned long addr) static inline void _upa_writew(unsigned short w, unsigned long addr)
{ {
__asm__ __volatile__("stha\t%0, [%1] %2\t/* upa_writew */" __asm__ __volatile__("stha\t%0, [%1] %2\t/* upa_writew */"
: /* no outputs */ : /* no outputs */
: "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
} }
static __inline__ void _upa_writel(unsigned int l, unsigned long addr) static inline void _upa_writel(unsigned int l, unsigned long addr)
{ {
__asm__ __volatile__("stwa\t%0, [%1] %2\t/* upa_writel */" __asm__ __volatile__("stwa\t%0, [%1] %2\t/* upa_writel */"
: /* no outputs */ : /* no outputs */
: "r" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); : "r" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
} }
static __inline__ void _upa_writeq(unsigned long q, unsigned long addr) static inline void _upa_writeq(unsigned long q, unsigned long addr)
{ {
__asm__ __volatile__("stxa\t%0, [%1] %2\t/* upa_writeq */" __asm__ __volatile__("stxa\t%0, [%1] %2\t/* upa_writeq */"
: /* no outputs */ : /* no outputs */

3
include/asm-sparc64/visasm.h
View File

@ -1,4 +1,3 @@
/* $Id: visasm.h,v 1.5 2001/04/24 01:09:12 davem Exp $ */
#ifndef _SPARC64_VISASM_H #ifndef _SPARC64_VISASM_H
#define _SPARC64_VISASM_H #define _SPARC64_VISASM_H
@ -44,7 +43,7 @@
wr %o5, 0, %fprs; wr %o5, 0, %fprs;
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
static __inline__ void save_and_clear_fpu(void) { static inline void save_and_clear_fpu(void) {
__asm__ __volatile__ ( __asm__ __volatile__ (
" rd %%fprs, %%o5\n" " rd %%fprs, %%o5\n"
" andcc %%o5, %0, %%g0\n" " andcc %%o5, %0, %%g0\n"