x86, io_apic: Introduce eoi_ioapic_pin call-back
This callback replaces the old __eoi_ioapic_pin function which needs a special path for interrupt remapping. Signed-off-by: Joerg Roedel <joro@8bytes.org> Acked-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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@ -161,6 +161,7 @@ extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
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extern void native_compose_msi_msg(struct pci_dev *pdev,
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unsigned int irq, unsigned int dest,
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struct msi_msg *msg, u8 hpet_id);
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extern void native_eoi_ioapic_pin(int apic, int pin, int vector);
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int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct io_apic_irq_attr *attr);
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extern int save_ioapic_entries(void);
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@ -211,6 +212,9 @@ static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned
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{
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x86_io_apic_ops.modify(apic, reg, value);
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}
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extern void io_apic_eoi(unsigned int apic, unsigned int vector);
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#else /* !CONFIG_X86_IO_APIC */
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#define io_apic_assign_pci_irqs 0
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@ -246,6 +250,7 @@ static inline void disable_ioapic_support(void) { }
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#define native_ioapic_set_affinity NULL
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#define native_setup_ioapic_entry NULL
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#define native_compose_msi_msg NULL
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#define native_eoi_ioapic_pin NULL
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#endif
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#endif /* _ASM_X86_IO_APIC_H */
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@ -212,6 +212,7 @@ struct x86_io_apic_ops {
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int (*setup_entry)(int irq, struct IO_APIC_route_entry *entry,
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unsigned int destination, int vector,
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struct io_apic_irq_attr *attr);
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void (*eoi_ioapic_pin)(int apic, int pin, int vector);
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};
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extern struct x86_init_ops x86_init;
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@ -310,7 +310,7 @@ static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx)
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+ (mpc_ioapic_addr(idx) & ~PAGE_MASK);
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}
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static inline void io_apic_eoi(unsigned int apic, unsigned int vector)
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void io_apic_eoi(unsigned int apic, unsigned int vector)
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{
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struct io_apic __iomem *io_apic = io_apic_base(apic);
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writel(vector, &io_apic->eoi);
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@ -557,19 +557,10 @@ static void unmask_ioapic_irq(struct irq_data *data)
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* Otherwise, we simulate the EOI message manually by changing the trigger
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* mode to edge and then back to level, with RTE being masked during this.
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*/
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static void __eoi_ioapic_pin(int apic, int pin, int vector, struct irq_cfg *cfg)
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void native_eoi_ioapic_pin(int apic, int pin, int vector)
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{
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if (mpc_ioapic_ver(apic) >= 0x20) {
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/*
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* Intr-remapping uses pin number as the virtual vector
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* in the RTE. Actual vector is programmed in
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* intr-remapping table entry. Hence for the io-apic
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* EOI we use the pin number.
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*/
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if (cfg && irq_remapped(cfg))
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io_apic_eoi(apic, pin);
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else
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io_apic_eoi(apic, vector);
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io_apic_eoi(apic, vector);
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} else {
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struct IO_APIC_route_entry entry, entry1;
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@ -597,7 +588,8 @@ void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg)
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raw_spin_lock_irqsave(&ioapic_lock, flags);
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for_each_irq_pin(entry, cfg->irq_2_pin)
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__eoi_ioapic_pin(entry->apic, entry->pin, cfg->vector, cfg);
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x86_io_apic_ops.eoi_ioapic_pin(entry->apic, entry->pin,
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cfg->vector);
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raw_spin_unlock_irqrestore(&ioapic_lock, flags);
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}
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@ -634,7 +626,7 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)
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}
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raw_spin_lock_irqsave(&ioapic_lock, flags);
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__eoi_ioapic_pin(apic, pin, entry.vector, NULL);
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x86_io_apic_ops.eoi_ioapic_pin(apic, pin, entry.vector);
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raw_spin_unlock_irqrestore(&ioapic_lock, flags);
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}
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@ -129,4 +129,5 @@ struct x86_io_apic_ops x86_io_apic_ops = {
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.print_entries = native_io_apic_print_entries,
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.set_affinity = native_ioapic_set_affinity,
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.setup_entry = native_setup_ioapic_entry,
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.eoi_ioapic_pin = native_eoi_ioapic_pin,
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};
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@ -143,11 +143,23 @@ static int irq_remapping_setup_msi_irqs(struct pci_dev *dev,
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return do_setup_msix_irqs(dev, nvec);
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}
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void eoi_ioapic_pin_remapped(int apic, int pin, int vector)
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{
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/*
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* Intr-remapping uses pin number as the virtual vector
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* in the RTE. Actual vector is programmed in
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* intr-remapping table entry. Hence for the io-apic
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* EOI we use the pin number.
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*/
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io_apic_eoi(apic, pin);
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}
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static void __init irq_remapping_modify_x86_ops(void)
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{
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x86_io_apic_ops.disable = irq_remapping_disable_io_apic;
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x86_io_apic_ops.set_affinity = set_remapped_irq_affinity;
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x86_io_apic_ops.setup_entry = setup_ioapic_remapped_entry;
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x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped;
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x86_msi.setup_msi_irqs = irq_remapping_setup_msi_irqs;
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x86_msi.setup_hpet_msi = setup_hpet_msi_remapped;
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x86_msi.compose_msi_msg = compose_remapped_msi_msg;
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