clocksource: sh_mtu2: Add memory base to sh_mtu2_channel structure
The channel memory base is channel-specific, add it to the channel structure in preparation for support of multiple channels per device. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Wolfram Sang <wsa@sang-engineering.com>
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@ -38,7 +38,10 @@ struct sh_mtu2_device;
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struct sh_mtu2_channel {
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struct sh_mtu2_channel {
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struct sh_mtu2_device *mtu;
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struct sh_mtu2_device *mtu;
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void __iomem *base;
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int irq;
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int irq;
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struct clock_event_device ced;
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struct clock_event_device ced;
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};
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};
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@ -74,39 +77,35 @@ static unsigned long mtu2_reg_offs[] = {
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static inline unsigned long sh_mtu2_read(struct sh_mtu2_channel *ch, int reg_nr)
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static inline unsigned long sh_mtu2_read(struct sh_mtu2_channel *ch, int reg_nr)
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{
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{
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struct sh_timer_config *cfg = ch->mtu->pdev->dev.platform_data;
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void __iomem *base = ch->mtu->mapbase;
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unsigned long offs;
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unsigned long offs;
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if (reg_nr == TSTR)
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if (reg_nr == TSTR)
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return ioread8(base + cfg->channel_offset);
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return ioread8(ch->mtu->mapbase);
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offs = mtu2_reg_offs[reg_nr];
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offs = mtu2_reg_offs[reg_nr];
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if ((reg_nr == TCNT) || (reg_nr == TGR))
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if ((reg_nr == TCNT) || (reg_nr == TGR))
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return ioread16(base + offs);
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return ioread16(ch->base + offs);
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else
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else
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return ioread8(base + offs);
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return ioread8(ch->base + offs);
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}
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}
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static inline void sh_mtu2_write(struct sh_mtu2_channel *ch, int reg_nr,
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static inline void sh_mtu2_write(struct sh_mtu2_channel *ch, int reg_nr,
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unsigned long value)
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unsigned long value)
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{
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{
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struct sh_timer_config *cfg = ch->mtu->pdev->dev.platform_data;
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void __iomem *base = ch->mtu->mapbase;
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unsigned long offs;
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unsigned long offs;
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if (reg_nr == TSTR) {
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if (reg_nr == TSTR) {
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iowrite8(value, base + cfg->channel_offset);
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iowrite8(value, ch->mtu->mapbase);
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return;
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return;
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}
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}
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offs = mtu2_reg_offs[reg_nr];
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offs = mtu2_reg_offs[reg_nr];
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if ((reg_nr == TCNT) || (reg_nr == TGR))
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if ((reg_nr == TCNT) || (reg_nr == TGR))
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iowrite16(value, base + offs);
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iowrite16(value, ch->base + offs);
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else
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else
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iowrite8(value, base + offs);
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iowrite8(value, ch->base + offs);
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}
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}
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static void sh_mtu2_start_stop_ch(struct sh_mtu2_channel *ch, int start)
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static void sh_mtu2_start_stop_ch(struct sh_mtu2_channel *ch, int start)
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@ -315,13 +314,18 @@ static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
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goto err0;
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goto err0;
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}
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}
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/* map memory, let mapbase point to our channel */
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/*
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mtu->mapbase = ioremap_nocache(res->start, resource_size(res));
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* Map memory, let channel.base point to our channel and mapbase to the
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if (mtu->mapbase == NULL) {
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* start/stop shared register.
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*/
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mtu->channel.base = ioremap_nocache(res->start, resource_size(res));
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if (mtu->channel.base == NULL) {
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dev_err(&mtu->pdev->dev, "failed to remap I/O memory\n");
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dev_err(&mtu->pdev->dev, "failed to remap I/O memory\n");
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goto err0;
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goto err0;
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}
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}
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mtu->mapbase = mtu->channel.base + cfg->channel_offset;
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/* get hold of clock */
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/* get hold of clock */
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mtu->clk = clk_get(&mtu->pdev->dev, "mtu2_fck");
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mtu->clk = clk_get(&mtu->pdev->dev, "mtu2_fck");
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if (IS_ERR(mtu->clk)) {
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if (IS_ERR(mtu->clk)) {
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@ -344,7 +348,7 @@ static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
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err2:
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err2:
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clk_put(mtu->clk);
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clk_put(mtu->clk);
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err1:
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err1:
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iounmap(mtu->mapbase);
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iounmap(mtu->channel.base);
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err0:
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err0:
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return ret;
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return ret;
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}
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}
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