xen: clean up x86-64 warnings
There are a couple of Xen features which rely on directly accessing per-cpu data via a segment register, which is not yet available on x86-64. In the meantime, just disable direct access to the vcpu info structure; this leaves some of the code as dead, but it will come to life in time, and the warnings are suppressed. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Jeremy Fitzhardinge
Ingo Molnar
parent
08115ab4d9
commit
db053b86f4
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@ -112,7 +112,14 @@ struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
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*
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* 0: not available, 1: available
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*/
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static int have_vcpu_info_placement = 1;
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static int have_vcpu_info_placement =
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#ifdef CONFIG_X86_32
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1
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#else
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0
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#endif
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;
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static void xen_vcpu_setup(int cpu)
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{
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@ -941,6 +948,7 @@ static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
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}
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#endif
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#ifdef CONFIG_X86_32
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static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
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{
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/* If there's an existing pte, then don't allow _PAGE_RW to be set */
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@ -959,6 +967,7 @@ static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
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xen_set_pte(ptep, pte);
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}
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#endif
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static __init void xen_pagetable_setup_start(pgd_t *base)
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{
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@ -1025,7 +1034,6 @@ void xen_setup_vcpu_info_placement(void)
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/* xen_vcpu_setup managed to place the vcpu_info within the
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percpu area for all cpus, so make use of it */
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#ifdef CONFIG_X86_32
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if (have_vcpu_info_placement) {
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printk(KERN_INFO "Xen: using vcpu_info placement\n");
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@ -1035,7 +1043,6 @@ void xen_setup_vcpu_info_placement(void)
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pv_irq_ops.irq_enable = xen_irq_enable_direct;
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pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
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}
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#endif
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}
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static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
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@ -1056,12 +1063,10 @@ static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
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goto patch_site
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switch (type) {
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#ifdef CONFIG_X86_32
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SITE(pv_irq_ops, irq_enable);
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SITE(pv_irq_ops, irq_disable);
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SITE(pv_irq_ops, save_fl);
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SITE(pv_irq_ops, restore_fl);
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#endif /* CONFIG_X86_32 */
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#undef SITE
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patch_site:
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@ -1399,48 +1404,11 @@ static void *m2v(phys_addr_t maddr)
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return __ka(m2p(maddr));
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}
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#ifdef CONFIG_X86_64
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static void walk(pgd_t *pgd, unsigned long addr)
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{
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unsigned l4idx = pgd_index(addr);
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unsigned l3idx = pud_index(addr);
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unsigned l2idx = pmd_index(addr);
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unsigned l1idx = pte_index(addr);
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pgd_t l4;
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pud_t l3;
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pmd_t l2;
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pte_t l1;
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xen_raw_printk("walk %p, %lx -> %d %d %d %d\n",
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pgd, addr, l4idx, l3idx, l2idx, l1idx);
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l4 = pgd[l4idx];
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xen_raw_printk(" l4: %016lx\n", l4.pgd);
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xen_raw_printk(" %016lx\n", pgd_val(l4));
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l3 = ((pud_t *)(m2v(l4.pgd)))[l3idx];
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xen_raw_printk(" l3: %016lx\n", l3.pud);
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xen_raw_printk(" %016lx\n", pud_val(l3));
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l2 = ((pmd_t *)(m2v(l3.pud)))[l2idx];
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xen_raw_printk(" l2: %016lx\n", l2.pmd);
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xen_raw_printk(" %016lx\n", pmd_val(l2));
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l1 = ((pte_t *)(m2v(l2.pmd)))[l1idx];
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xen_raw_printk(" l1: %016lx\n", l1.pte);
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xen_raw_printk(" %016lx\n", pte_val(l1));
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}
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#endif
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static void set_page_prot(void *addr, pgprot_t prot)
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{
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unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
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pte_t pte = pfn_pte(pfn, prot);
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xen_raw_printk("addr=%p pfn=%lx mfn=%lx prot=%016llx pte=%016llx\n",
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addr, pfn, get_phys_to_machine(pfn),
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pgprot_val(prot), pte.pte);
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if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
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BUG();
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}
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@ -1698,15 +1666,6 @@ asmlinkage void __init xen_start_kernel(void)
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xen_raw_console_write("about to get started...\n");
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#if 0
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xen_raw_printk("&boot_params=%p __pa(&boot_params)=%lx __va(__pa(&boot_params))=%lx\n",
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&boot_params, __pa_symbol(&boot_params),
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__va(__pa_symbol(&boot_params)));
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walk(pgd, &boot_params);
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walk(pgd, __va(__pa(&boot_params)));
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#endif
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/* Start the world */
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#ifdef CONFIG_X86_32
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i386_start_kernel();
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@ -26,8 +26,15 @@
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/* Pseudo-flag used for virtual NMI, which we don't implement yet */
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#define XEN_EFLAGS_NMI 0x80000000
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#if 0
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#include <asm/percpu.h>
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#if 1
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/*
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x86-64 does not yet support direct access to percpu variables
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via a segment override, so we just need to make sure this code
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never gets used
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*/
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#define BUG ud2a
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#define PER_CPU_VAR(var, off) 0xdeadbeef
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#endif
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/*
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Enable events. This clears the event mask and tests the pending
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@ -35,6 +42,8 @@
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events, then enter the hypervisor to get them handled.
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*/
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ENTRY(xen_irq_enable_direct)
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BUG
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/* Unmask events */
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movb $0, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask)
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@ -58,6 +67,8 @@ ENDPATCH(xen_irq_enable_direct)
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non-zero.
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*/
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ENTRY(xen_irq_disable_direct)
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BUG
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movb $1, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask)
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ENDPATCH(xen_irq_disable_direct)
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ret
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@ -74,6 +85,8 @@ ENDPATCH(xen_irq_disable_direct)
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Xen and x86 use opposite senses (mask vs enable).
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*/
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ENTRY(xen_save_fl_direct)
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BUG
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testb $0xff, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask)
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setz %ah
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addb %ah,%ah
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@ -91,6 +104,8 @@ ENDPATCH(xen_save_fl_direct)
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if so.
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*/
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ENTRY(xen_restore_fl_direct)
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BUG
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testb $X86_EFLAGS_IF>>8, %ah
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setz PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask)
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/* Preempt here doesn't matter because that will deal with
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@ -133,7 +148,6 @@ check_events:
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pop %rcx
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pop %rax
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ret
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#endif
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ENTRY(xen_adjust_exception_frame)
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mov 8+0(%rsp),%rcx
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